543 строки
14 KiB
C
543 строки
14 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// ff-protocol-latter - a part of driver for RME Fireface series
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//
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// Copyright (c) 2019 Takashi Sakamoto
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//
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// Licensed under the terms of the GNU General Public License, version 2.
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#include <linux/delay.h>
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#include "ff.h"
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#define LATTER_STF 0xffff00000004ULL
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#define LATTER_ISOC_CHANNELS 0xffff00000008ULL
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#define LATTER_ISOC_START 0xffff0000000cULL
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#define LATTER_FETCH_MODE 0xffff00000010ULL
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#define LATTER_SYNC_STATUS 0x0000801c0000ULL
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// The content of sync status register differs between models.
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//
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// Fireface UCX:
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// 0xf0000000: (unidentified)
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// 0x0f000000: effective rate of sampling clock
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// 0x00f00000: detected rate of word clock on BNC interface
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// 0x000f0000: detected rate of ADAT or S/PDIF on optical interface
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// 0x0000f000: detected rate of S/PDIF on coaxial interface
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// 0x00000e00: effective source of sampling clock
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// 0x00000e00: Internal
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// 0x00000800: (unidentified)
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// 0x00000600: Word clock on BNC interface
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// 0x00000400: ADAT on optical interface
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// 0x00000200: S/PDIF on coaxial or optical interface
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// 0x00000100: Optical interface is used for ADAT signal
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// 0x00000080: (unidentified)
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// 0x00000040: Synchronized to word clock on BNC interface
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// 0x00000020: Synchronized to ADAT or S/PDIF on optical interface
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// 0x00000010: Synchronized to S/PDIF on coaxial interface
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// 0x00000008: (unidentified)
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// 0x00000004: Lock word clock on BNC interface
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// 0x00000002: Lock ADAT or S/PDIF on optical interface
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// 0x00000001: Lock S/PDIF on coaxial interface
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//
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// Fireface 802 (and perhaps UFX):
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// 0xf0000000: effective rate of sampling clock
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// 0x0f000000: detected rate of ADAT-B on 2nd optical interface
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// 0x00f00000: detected rate of ADAT-A on 1st optical interface
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// 0x000f0000: detected rate of AES/EBU on XLR or coaxial interface
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// 0x0000f000: detected rate of word clock on BNC interface
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// 0x00000e00: effective source of sampling clock
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// 0x00000e00: internal
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// 0x00000800: ADAT-B
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// 0x00000600: ADAT-A
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// 0x00000400: AES/EBU
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// 0x00000200: Word clock
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// 0x00000080: Synchronized to ADAT-B on 2nd optical interface
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// 0x00000040: Synchronized to ADAT-A on 1st optical interface
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// 0x00000020: Synchronized to AES/EBU on XLR or 2nd optical interface
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// 0x00000010: Synchronized to word clock on BNC interface
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// 0x00000008: Lock ADAT-B on 2nd optical interface
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// 0x00000004: Lock ADAT-A on 1st optical interface
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// 0x00000002: Lock AES/EBU on XLR or 2nd optical interface
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// 0x00000001: Lock word clock on BNC interface
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//
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// The pattern for rate bits:
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// 0x00: 32.0 kHz
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// 0x01: 44.1 kHz
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// 0x02: 48.0 kHz
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// 0x04: 64.0 kHz
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// 0x05: 88.2 kHz
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// 0x06: 96.0 kHz
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// 0x08: 128.0 kHz
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// 0x09: 176.4 kHz
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// 0x0a: 192.0 kHz
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static int parse_clock_bits(u32 data, unsigned int *rate,
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enum snd_ff_clock_src *src,
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enum snd_ff_unit_version unit_version)
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{
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static const struct {
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unsigned int rate;
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u32 flag;
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} *rate_entry, rate_entries[] = {
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{ 32000, 0x00, },
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{ 44100, 0x01, },
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{ 48000, 0x02, },
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{ 64000, 0x04, },
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{ 88200, 0x05, },
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{ 96000, 0x06, },
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{ 128000, 0x08, },
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{ 176400, 0x09, },
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{ 192000, 0x0a, },
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};
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static const struct {
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enum snd_ff_clock_src src;
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u32 flag;
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} *clk_entry, *clk_entries, ucx_clk_entries[] = {
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{ SND_FF_CLOCK_SRC_SPDIF, 0x00000200, },
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{ SND_FF_CLOCK_SRC_ADAT1, 0x00000400, },
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{ SND_FF_CLOCK_SRC_WORD, 0x00000600, },
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{ SND_FF_CLOCK_SRC_INTERNAL, 0x00000e00, },
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}, ufx_ff802_clk_entries[] = {
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{ SND_FF_CLOCK_SRC_WORD, 0x00000200, },
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{ SND_FF_CLOCK_SRC_SPDIF, 0x00000400, },
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{ SND_FF_CLOCK_SRC_ADAT1, 0x00000600, },
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{ SND_FF_CLOCK_SRC_ADAT2, 0x00000800, },
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{ SND_FF_CLOCK_SRC_INTERNAL, 0x00000e00, },
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};
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u32 rate_bits;
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unsigned int clk_entry_count;
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int i;
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if (unit_version == SND_FF_UNIT_VERSION_UCX) {
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rate_bits = (data & 0x0f000000) >> 24;
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clk_entries = ucx_clk_entries;
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clk_entry_count = ARRAY_SIZE(ucx_clk_entries);
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} else {
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rate_bits = (data & 0xf0000000) >> 28;
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clk_entries = ufx_ff802_clk_entries;
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clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries);
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}
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for (i = 0; i < ARRAY_SIZE(rate_entries); ++i) {
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rate_entry = rate_entries + i;
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if (rate_bits == rate_entry->flag) {
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*rate = rate_entry->rate;
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break;
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}
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}
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if (i == ARRAY_SIZE(rate_entries))
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return -EIO;
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for (i = 0; i < clk_entry_count; ++i) {
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clk_entry = clk_entries + i;
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if ((data & 0x000e00) == clk_entry->flag) {
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*src = clk_entry->src;
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break;
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}
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}
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if (i == clk_entry_count)
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return -EIO;
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return 0;
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}
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static int latter_get_clock(struct snd_ff *ff, unsigned int *rate,
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enum snd_ff_clock_src *src)
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{
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__le32 reg;
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u32 data;
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int err;
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err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
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LATTER_SYNC_STATUS, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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data = le32_to_cpu(reg);
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return parse_clock_bits(data, rate, src, ff->unit_version);
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}
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static int latter_switch_fetching_mode(struct snd_ff *ff, bool enable)
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{
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u32 data;
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__le32 reg;
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if (enable)
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data = 0x00000000;
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else
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data = 0xffffffff;
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reg = cpu_to_le32(data);
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return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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LATTER_FETCH_MODE, ®, sizeof(reg), 0);
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}
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static int latter_allocate_resources(struct snd_ff *ff, unsigned int rate)
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{
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enum snd_ff_stream_mode mode;
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unsigned int code;
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__le32 reg;
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unsigned int count;
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int i;
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int err;
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// Set the number of data blocks transferred in a second.
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if (rate % 48000 == 0)
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code = 0x04;
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else if (rate % 44100 == 0)
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code = 0x02;
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else if (rate % 32000 == 0)
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code = 0x00;
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else
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return -EINVAL;
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if (rate >= 64000 && rate < 128000)
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code |= 0x08;
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else if (rate >= 128000)
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code |= 0x10;
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reg = cpu_to_le32(code);
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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LATTER_STF, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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// Confirm to shift transmission clock.
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count = 0;
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while (count++ < 10) {
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unsigned int curr_rate;
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enum snd_ff_clock_src src;
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err = latter_get_clock(ff, &curr_rate, &src);
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if (err < 0)
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return err;
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if (curr_rate == rate)
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break;
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}
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if (count > 10)
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return -ETIMEDOUT;
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for (i = 0; i < ARRAY_SIZE(amdtp_rate_table); ++i) {
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if (rate == amdtp_rate_table[i])
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break;
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}
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if (i == ARRAY_SIZE(amdtp_rate_table))
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return -EINVAL;
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err = snd_ff_stream_get_multiplier_mode(i, &mode);
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if (err < 0)
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return err;
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// Keep resources for in-stream.
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ff->tx_resources.channels_mask = 0x00000000000000ffuLL;
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err = fw_iso_resources_allocate(&ff->tx_resources,
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amdtp_stream_get_max_payload(&ff->tx_stream),
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fw_parent_device(ff->unit)->max_speed);
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if (err < 0)
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return err;
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// Keep resources for out-stream.
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ff->rx_resources.channels_mask = 0x00000000000000ffuLL;
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err = fw_iso_resources_allocate(&ff->rx_resources,
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amdtp_stream_get_max_payload(&ff->rx_stream),
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fw_parent_device(ff->unit)->max_speed);
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if (err < 0)
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fw_iso_resources_free(&ff->tx_resources);
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return err;
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}
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static int latter_begin_session(struct snd_ff *ff, unsigned int rate)
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{
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unsigned int generation = ff->rx_resources.generation;
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unsigned int flag;
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u32 data;
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__le32 reg;
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int err;
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if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) {
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// For Fireface UCX. Always use the maximum number of data
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// channels in data block of packet.
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if (rate >= 32000 && rate <= 48000)
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flag = 0x92;
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else if (rate >= 64000 && rate <= 96000)
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flag = 0x8e;
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else if (rate >= 128000 && rate <= 192000)
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flag = 0x8c;
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else
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return -EINVAL;
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} else {
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// For Fireface UFX and 802. Due to bandwidth limitation on
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// IEEE 1394a (400 Mbps), Analog 1-12 and AES are available
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// without any ADAT at quadruple speed.
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if (rate >= 32000 && rate <= 48000)
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flag = 0x9e;
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else if (rate >= 64000 && rate <= 96000)
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flag = 0x96;
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else if (rate >= 128000 && rate <= 192000)
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flag = 0x8e;
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else
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return -EINVAL;
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}
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if (generation != fw_parent_device(ff->unit)->card->generation) {
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err = fw_iso_resources_update(&ff->tx_resources);
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if (err < 0)
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return err;
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err = fw_iso_resources_update(&ff->rx_resources);
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if (err < 0)
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return err;
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}
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data = (ff->tx_resources.channel << 8) | ff->rx_resources.channel;
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reg = cpu_to_le32(data);
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err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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LATTER_ISOC_CHANNELS, ®, sizeof(reg), 0);
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if (err < 0)
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return err;
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reg = cpu_to_le32(flag);
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return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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LATTER_ISOC_START, ®, sizeof(reg), 0);
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}
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static void latter_finish_session(struct snd_ff *ff)
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{
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__le32 reg;
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reg = cpu_to_le32(0x00000000);
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snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
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LATTER_ISOC_START, ®, sizeof(reg), 0);
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}
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static void latter_dump_status(struct snd_ff *ff, struct snd_info_buffer *buffer)
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{
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static const struct {
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char *const label;
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u32 locked_mask;
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u32 synced_mask;
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} *clk_entry, *clk_entries, ucx_clk_entries[] = {
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{ "S/PDIF", 0x00000001, 0x00000010, },
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{ "ADAT", 0x00000002, 0x00000020, },
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{ "WDClk", 0x00000004, 0x00000040, },
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}, ufx_ff802_clk_entries[] = {
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{ "WDClk", 0x00000001, 0x00000010, },
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{ "AES/EBU", 0x00000002, 0x00000020, },
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{ "ADAT-A", 0x00000004, 0x00000040, },
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{ "ADAT-B", 0x00000008, 0x00000080, },
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};
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__le32 reg;
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u32 data;
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unsigned int rate;
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enum snd_ff_clock_src src;
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const char *label;
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unsigned int clk_entry_count;
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int i;
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int err;
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err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
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LATTER_SYNC_STATUS, ®, sizeof(reg), 0);
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if (err < 0)
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return;
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data = le32_to_cpu(reg);
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snd_iprintf(buffer, "External source detection:\n");
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if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) {
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clk_entries = ucx_clk_entries;
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clk_entry_count = ARRAY_SIZE(ucx_clk_entries);
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} else {
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clk_entries = ufx_ff802_clk_entries;
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clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries);
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}
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for (i = 0; i < clk_entry_count; ++i) {
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clk_entry = clk_entries + i;
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snd_iprintf(buffer, "%s: ", clk_entry->label);
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if (data & clk_entry->locked_mask) {
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if (data & clk_entry->synced_mask)
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snd_iprintf(buffer, "sync\n");
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else
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snd_iprintf(buffer, "lock\n");
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} else {
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snd_iprintf(buffer, "none\n");
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}
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}
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err = parse_clock_bits(data, &rate, &src, ff->unit_version);
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if (err < 0)
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return;
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label = snd_ff_proc_get_clk_label(src);
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if (!label)
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return;
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snd_iprintf(buffer, "Referred clock: %s %d\n", label, rate);
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}
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// NOTE: transactions are transferred within 0x00-0x7f in allocated range of
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// address. This seems to be for check of discontinuity in receiver side.
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//
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// Like Fireface 400, drivers can select one of 4 options for lower 4 bytes of
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// destination address by bit flags in quadlet register (little endian) at
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// 0x'ffff'0000'0014:
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//
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// bit flags: offset of destination address
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// - 0x00002000: 0x'....'....'0000'0000
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// - 0x00004000: 0x'....'....'0000'0080
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// - 0x00008000: 0x'....'....'0000'0100
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// - 0x00010000: 0x'....'....'0000'0180
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//
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// Drivers can suppress the device to transfer asynchronous transactions by
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// clear these bit flags.
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//
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// Actually, the register is write-only and includes the other settings such as
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// input attenuation. This driver allocates for the first option
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// (0x'....'....'0000'0000) and expects userspace application to configure the
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// register for it.
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static void latter_handle_midi_msg(struct snd_ff *ff, unsigned int offset,
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__le32 *buf, size_t length)
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{
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u32 data = le32_to_cpu(*buf);
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unsigned int index = (data & 0x000000f0) >> 4;
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u8 byte[3];
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struct snd_rawmidi_substream *substream;
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unsigned int len;
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if (index >= ff->spec->midi_in_ports)
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return;
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switch (data & 0x0000000f) {
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case 0x00000008:
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case 0x00000009:
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case 0x0000000a:
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case 0x0000000b:
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case 0x0000000e:
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len = 3;
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break;
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case 0x0000000c:
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case 0x0000000d:
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len = 2;
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break;
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default:
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len = data & 0x00000003;
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if (len == 0)
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len = 3;
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break;
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}
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byte[0] = (data & 0x0000ff00) >> 8;
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byte[1] = (data & 0x00ff0000) >> 16;
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byte[2] = (data & 0xff000000) >> 24;
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substream = READ_ONCE(ff->tx_midi_substreams[index]);
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if (substream)
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snd_rawmidi_receive(substream, byte, len);
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}
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/*
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* When return minus value, given argument is not MIDI status.
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* When return 0, given argument is a beginning of system exclusive.
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* When return the others, given argument is MIDI data.
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*/
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static inline int calculate_message_bytes(u8 status)
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{
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switch (status) {
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case 0xf6: /* Tune request. */
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case 0xf8: /* Timing clock. */
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case 0xfa: /* Start. */
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case 0xfb: /* Continue. */
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case 0xfc: /* Stop. */
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case 0xfe: /* Active sensing. */
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case 0xff: /* System reset. */
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return 1;
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case 0xf1: /* MIDI time code quarter frame. */
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case 0xf3: /* Song select. */
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return 2;
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case 0xf2: /* Song position pointer. */
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return 3;
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case 0xf0: /* Exclusive. */
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return 0;
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case 0xf7: /* End of exclusive. */
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break;
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case 0xf4: /* Undefined. */
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case 0xf5: /* Undefined. */
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case 0xf9: /* Undefined. */
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case 0xfd: /* Undefined. */
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break;
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default:
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switch (status & 0xf0) {
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case 0x80: /* Note on. */
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case 0x90: /* Note off. */
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case 0xa0: /* Polyphonic key pressure. */
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case 0xb0: /* Control change and Mode change. */
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case 0xe0: /* Pitch bend change. */
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return 3;
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case 0xc0: /* Program change. */
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case 0xd0: /* Channel pressure. */
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return 2;
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default:
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break;
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}
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break;
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}
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return -EINVAL;
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}
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static int latter_fill_midi_msg(struct snd_ff *ff,
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struct snd_rawmidi_substream *substream,
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unsigned int port)
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{
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u32 data = {0};
|
|
u8 *buf = (u8 *)&data;
|
|
int consumed;
|
|
|
|
buf[0] = port << 4;
|
|
consumed = snd_rawmidi_transmit_peek(substream, buf + 1, 3);
|
|
if (consumed <= 0)
|
|
return consumed;
|
|
|
|
if (!ff->on_sysex[port]) {
|
|
if (buf[1] != 0xf0) {
|
|
if (consumed < calculate_message_bytes(buf[1]))
|
|
return 0;
|
|
} else {
|
|
// The beginning of exclusives.
|
|
ff->on_sysex[port] = true;
|
|
}
|
|
|
|
buf[0] |= consumed;
|
|
} else {
|
|
if (buf[1] != 0xf7) {
|
|
if (buf[2] == 0xf7 || buf[3] == 0xf7) {
|
|
// Transfer end code at next time.
|
|
consumed -= 1;
|
|
}
|
|
|
|
buf[0] |= consumed;
|
|
} else {
|
|
// The end of exclusives.
|
|
ff->on_sysex[port] = false;
|
|
consumed = 1;
|
|
buf[0] |= 0x0f;
|
|
}
|
|
}
|
|
|
|
ff->msg_buf[port][0] = cpu_to_le32(data);
|
|
ff->rx_bytes[port] = consumed;
|
|
|
|
return 1;
|
|
}
|
|
|
|
const struct snd_ff_protocol snd_ff_protocol_latter = {
|
|
.handle_midi_msg = latter_handle_midi_msg,
|
|
.fill_midi_msg = latter_fill_midi_msg,
|
|
.get_clock = latter_get_clock,
|
|
.switch_fetching_mode = latter_switch_fetching_mode,
|
|
.allocate_resources = latter_allocate_resources,
|
|
.begin_session = latter_begin_session,
|
|
.finish_session = latter_finish_session,
|
|
.dump_status = latter_dump_status,
|
|
};
|