Andrea Parri ab4af60534 riscv/barrier: Define __smp_{mb,rmb,wmb} ... Introduce __smp_{mb,rmb,wmb}, and rely on the generic definitions for smp_{mb,rmb,wmb}. A first consequence is that smp_{mb,rmb,wmb} map to a compiler barrier on !SMP (while their definition remains unchanged on SMP). As a further consequence, smp_load_acquire and smp_store_release have "fence rw,rw" instead of "fence iorw,iorw". Signed-off-by: Andrea Parri <parri.andrea@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2018-02-26 08:44:50 -08:00
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asm	riscv/barrier: Define __smp_{mb,rmb,wmb}	2018-02-26 08:44:50 -08:00
uapi/asm	RISC-V: Make __NR_riscv_flush_icache visible to userspace	2018-01-07 15:14:37 -08:00