326 строки
9.0 KiB
C
326 строки
9.0 KiB
C
/*
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* arch/m68k/bvme6000/config.c
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*
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* Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
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*
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* Based on:
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*
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* linux/amiga/config.c
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*
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* Copyright (C) 1993 Hamish Macdonald
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file README.legal in the main directory of this archive
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* for more details.
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/clocksource.h>
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#include <linux/console.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/major.h>
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#include <linux/genhd.h>
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#include <linux/rtc.h>
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#include <linux/interrupt.h>
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#include <linux/bcd.h>
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#include <asm/bootinfo.h>
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#include <asm/bootinfo-vme.h>
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#include <asm/byteorder.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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#include <asm/traps.h>
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#include <asm/machdep.h>
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#include <asm/bvme6000hw.h>
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static void bvme6000_get_model(char *model);
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extern void bvme6000_sched_init(void);
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extern int bvme6000_hwclk (int, struct rtc_time *);
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extern void bvme6000_reset (void);
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void bvme6000_set_vectors (void);
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int __init bvme6000_parse_bootinfo(const struct bi_record *bi)
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{
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if (be16_to_cpu(bi->tag) == BI_VME_TYPE)
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return 0;
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else
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return 1;
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}
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void bvme6000_reset(void)
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{
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volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
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pr_info("\r\n\nCalled bvme6000_reset\r\n"
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"\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
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/* The string of returns is to delay the reset until the whole
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* message is output. */
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/* Enable the watchdog, via PIT port C bit 4 */
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pit->pcddr |= 0x10; /* WDOG enable */
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while(1)
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;
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}
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static void bvme6000_get_model(char *model)
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{
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sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
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}
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/*
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* This function is called during kernel startup to initialize
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* the bvme6000 IRQ handling routines.
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*/
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static void __init bvme6000_init_IRQ(void)
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{
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m68k_setup_user_interrupt(VEC_USER, 192);
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}
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void __init config_bvme6000(void)
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{
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volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
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/* Board type is only set by newer versions of vmelilo/tftplilo */
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if (!vme_brdtype) {
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if (m68k_cputype == CPU_68060)
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vme_brdtype = VME_TYPE_BVME6000;
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else
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vme_brdtype = VME_TYPE_BVME4000;
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}
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#if 0
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/* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
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* debugger. Note trap_init() will splat the abort vector, but
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* bvme6000_init_IRQ() will put it back again. Hopefully. */
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bvme6000_set_vectors();
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#endif
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mach_sched_init = bvme6000_sched_init;
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mach_init_IRQ = bvme6000_init_IRQ;
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mach_hwclk = bvme6000_hwclk;
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mach_reset = bvme6000_reset;
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mach_get_model = bvme6000_get_model;
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pr_info("Board is %sconfigured as a System Controller\n",
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*config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
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/* Now do the PIT configuration */
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pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
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pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
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pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
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pit->padr = 0x00; /* Just to be tidy! */
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pit->paddr = 0x00; /* All inputs for now (safest) */
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pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
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pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
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/* PRI, SYSCON?, Level3, SCC clks from xtal */
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pit->pbddr = 0xf3; /* Mostly outputs */
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pit->pcdr = 0x01; /* PA transceiver disabled */
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pit->pcddr = 0x03; /* WDOG disable */
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/* Disable snooping for Ethernet and VME accesses */
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bvme_acr_addrctl = 0;
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}
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irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
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{
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unsigned long *new = (unsigned long *)vectors;
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unsigned long *old = (unsigned long *)0xf8000000;
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/* Wait for button release */
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while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
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;
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*(new+4) = *(old+4); /* Illegal instruction */
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*(new+9) = *(old+9); /* Trace */
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*(new+47) = *(old+47); /* Trap #15 */
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*(new+0x1f) = *(old+0x1f); /* ABORT switch */
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return IRQ_HANDLED;
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}
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static u64 bvme6000_read_clk(struct clocksource *cs);
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static struct clocksource bvme6000_clk = {
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.name = "rtc",
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.rating = 250,
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.read = bvme6000_read_clk,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static u32 clk_total, clk_offset;
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#define RTC_TIMER_CLOCK_FREQ 8000000
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#define RTC_TIMER_CYCLES (RTC_TIMER_CLOCK_FREQ / HZ)
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#define RTC_TIMER_COUNT ((RTC_TIMER_CYCLES / 2) - 1)
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static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
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{
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unsigned long flags;
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volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
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unsigned char msr;
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local_irq_save(flags);
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msr = rtc->msr & 0xc0;
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rtc->msr = msr | 0x20; /* Ack the interrupt */
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clk_total += RTC_TIMER_CYCLES;
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clk_offset = 0;
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legacy_timer_tick(1);
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local_irq_restore(flags);
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return IRQ_HANDLED;
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}
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/*
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* Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
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* (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
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* So, when reading the elapsed time, you should read timer1,
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* subtract it from 39999, and then add 40000 if T1 is high.
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* That gives you the number of 125ns ticks in to the 10ms period,
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* so divide by 8 to get the microsecond result.
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*/
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void bvme6000_sched_init (void)
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{
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volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
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unsigned char msr = rtc->msr & 0xc0;
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rtc->msr = 0; /* Ensure timer registers accessible */
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if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer",
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NULL))
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panic ("Couldn't register timer int");
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rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
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rtc->t1msb = RTC_TIMER_COUNT >> 8;
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rtc->t1lsb = RTC_TIMER_COUNT & 0xff;
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rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
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rtc->msr = 0x40; /* Access int.cntrl, etc */
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rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
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rtc->irr_icr1 = 0;
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rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
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rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
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rtc->msr = 0; /* Access timer 1 control */
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rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
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rtc->msr = msr;
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clocksource_register_hz(&bvme6000_clk, RTC_TIMER_CLOCK_FREQ);
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if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
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"abort", bvme6000_abort_int))
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panic ("Couldn't register abort int");
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}
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/*
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* NOTE: Don't accept any readings within 5us of rollover, as
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* the T1INT bit may be a little slow getting set. There is also
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* a fault in the chip, meaning that reads may produce invalid
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* results...
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*/
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static u64 bvme6000_read_clk(struct clocksource *cs)
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{
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unsigned long flags;
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volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
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volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
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unsigned char msr, msb;
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unsigned char t1int, t1op;
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u32 v = 800000, ov;
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local_irq_save(flags);
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msr = rtc->msr & 0xc0;
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rtc->msr = 0; /* Ensure timer registers accessible */
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do {
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ov = v;
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t1int = rtc->msr & 0x20;
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t1op = pit->pcdr & 0x04;
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rtc->t1cr_omr |= 0x40; /* Latch timer1 */
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msb = rtc->t1msb; /* Read timer1 */
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v = (msb << 8) | rtc->t1lsb; /* Read timer1 */
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} while (t1int != (rtc->msr & 0x20) ||
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t1op != (pit->pcdr & 0x04) ||
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abs(ov-v) > 80 ||
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v > RTC_TIMER_COUNT - (RTC_TIMER_COUNT / 100));
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v = RTC_TIMER_COUNT - v;
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if (!t1op) /* If in second half cycle.. */
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v += RTC_TIMER_CYCLES / 2;
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if (msb > 0 && t1int)
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clk_offset = RTC_TIMER_CYCLES;
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rtc->msr = msr;
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v += clk_offset + clk_total;
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local_irq_restore(flags);
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return v;
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}
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/*
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* Looks like op is non-zero for setting the clock, and zero for
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* reading the clock.
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*
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* struct hwclk_time {
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* unsigned sec; 0..59
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* unsigned min; 0..59
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* unsigned hour; 0..23
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* unsigned day; 1..31
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* unsigned mon; 0..11
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* unsigned year; 00...
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* int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
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* };
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*/
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int bvme6000_hwclk(int op, struct rtc_time *t)
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{
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volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
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unsigned char msr = rtc->msr & 0xc0;
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rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
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* are accessible */
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if (op)
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{ /* Write.... */
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rtc->t0cr_rtmr = t->tm_year%4;
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rtc->bcd_tenms = 0;
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rtc->bcd_sec = bin2bcd(t->tm_sec);
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rtc->bcd_min = bin2bcd(t->tm_min);
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rtc->bcd_hr = bin2bcd(t->tm_hour);
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rtc->bcd_dom = bin2bcd(t->tm_mday);
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rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
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rtc->bcd_year = bin2bcd(t->tm_year%100);
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if (t->tm_wday >= 0)
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rtc->bcd_dow = bin2bcd(t->tm_wday+1);
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rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
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}
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else
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{ /* Read.... */
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do {
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t->tm_sec = bcd2bin(rtc->bcd_sec);
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t->tm_min = bcd2bin(rtc->bcd_min);
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t->tm_hour = bcd2bin(rtc->bcd_hr);
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t->tm_mday = bcd2bin(rtc->bcd_dom);
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t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
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t->tm_year = bcd2bin(rtc->bcd_year);
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if (t->tm_year < 70)
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t->tm_year += 100;
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t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
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} while (t->tm_sec != bcd2bin(rtc->bcd_sec));
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}
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rtc->msr = msr;
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return 0;
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}
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