239 строки
5.3 KiB
Plaintext
239 строки
5.3 KiB
Plaintext
/*
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* Copyright (c) 2015 MediaTek Inc.
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* Author: Erin Lo <erin.lo@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "mt2701.dtsi"
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/ {
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model = "MediaTek MT2701 evaluation board";
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compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
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memory {
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reg = <0 0x80000000 0 0x40000000>;
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};
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sound:sound {
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compatible = "mediatek,mt2701-cs42448-machine";
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mediatek,platform = <&afe>;
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/* CS42448 Machine name */
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audio-routing =
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"Line Out Jack", "AOUT1L",
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"Line Out Jack", "AOUT1R",
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"Line Out Jack", "AOUT2L",
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"Line Out Jack", "AOUT2R",
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"Line Out Jack", "AOUT3L",
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"Line Out Jack", "AOUT3R",
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"Line Out Jack", "AOUT4L",
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"Line Out Jack", "AOUT4R",
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"AIN1L", "AMIC",
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"AIN1R", "AMIC",
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"AIN2L", "Tuner In",
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"AIN2R", "Tuner In",
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"AIN3L", "Satellite Tuner In",
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"AIN3R", "Satellite Tuner In",
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"AIN3L", "AUX In",
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"AIN3R", "AUX In";
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mediatek,audio-codec = <&cs42448>;
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mediatek,audio-codec-bt-mrg = <&bt_sco_codec>;
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pinctrl-names = "default";
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pinctrl-0 = <&aud_pins_default>;
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i2s1-in-sel-gpio1 = <&pio 53 0>;
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i2s1-in-sel-gpio2 = <&pio 54 0>;
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status = "okay";
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};
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bt_sco_codec:bt_sco_codec {
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compatible = "linux,bt-sco";
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};
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backlight_lcd: backlight_lcd {
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compatible = "pwm-backlight";
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pwms = <&bls 0 100000>;
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brightness-levels = <
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0 16 32 48 64 80 96 112
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128 144 160 176 192 208 224 240
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255
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>;
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default-brightness-level = <9>;
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};
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};
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&auxadc {
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status = "okay";
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};
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&bls {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pwm_bls_gpio>;
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins_a>;
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status = "okay";
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins_a>;
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status = "okay";
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cs42448: cs42448@48 {
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compatible = "cirrus,cs42448";
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reg = <0x48>;
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clocks = <&topckgen CLK_TOP_AUD_I2S1_MCLK>;
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clock-names = "mclk";
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};
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};
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&pio {
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i2c0_pins_a: i2c0@0 {
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pins1 {
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pinmux = <MT2701_PIN_75_SDA0__FUNC_SDA0>,
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<MT2701_PIN_76_SCL0__FUNC_SCL0>;
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bias-disable;
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};
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};
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i2c1_pins_a: i2c1@0 {
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pins1 {
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pinmux = <MT2701_PIN_57_SDA1__FUNC_SDA1>,
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<MT2701_PIN_58_SCL1__FUNC_SCL1>;
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bias-disable;
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};
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};
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i2c2_pins_a: i2c2@0 {
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pins1 {
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pinmux = <MT2701_PIN_77_SDA2__FUNC_SDA2>,
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<MT2701_PIN_78_SCL2__FUNC_SCL2>;
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bias-disable;
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};
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};
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pwm_bls_gpio: pwm_bls_gpio {
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pins_cmd_dat {
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pinmux = <MT2701_PIN_208_AUD_EXT_CK1__FUNC_DISP_PWM>;
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};
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};
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spi_pins_a: spi0@0 {
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pins_spi {
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pinmux = <MT2701_PIN_53_SPI0_CSN__FUNC_SPI0_CS>,
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<MT2701_PIN_54_SPI0_CK__FUNC_SPI0_CK>,
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<MT2701_PIN_55_SPI0_MI__FUNC_SPI0_MI>,
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<MT2701_PIN_56_SPI0_MO__FUNC_SPI0_MO>;
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bias-disable;
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};
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};
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aud_pins_default: audiodefault {
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pins_cmd_dat {
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pinmux = <MT2701_PIN_49_I2S0_DATA__FUNC_I2S0_DATA>,
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<MT2701_PIN_72_I2S0_DATA_IN__FUNC_I2S0_DATA_IN>,
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<MT2701_PIN_73_I2S0_LRCK__FUNC_I2S0_LRCK>,
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<MT2701_PIN_74_I2S0_BCK__FUNC_I2S0_BCK>,
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<MT2701_PIN_126_I2S0_MCLK__FUNC_I2S0_MCLK>,
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<MT2701_PIN_33_I2S1_DATA__FUNC_I2S1_DATA>,
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<MT2701_PIN_34_I2S1_DATA_IN__FUNC_I2S1_DATA_IN>,
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<MT2701_PIN_35_I2S1_BCK__FUNC_I2S1_BCK>,
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<MT2701_PIN_36_I2S1_LRCK__FUNC_I2S1_LRCK>,
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<MT2701_PIN_37_I2S1_MCLK__FUNC_I2S1_MCLK>,
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<MT2701_PIN_203_PWM0__FUNC_I2S2_DATA>,
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<MT2701_PIN_204_PWM1__FUNC_I2S3_DATA>,
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<MT2701_PIN_53_SPI0_CSN__FUNC_GPIO53>,
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<MT2701_PIN_54_SPI0_CK__FUNC_GPIO54>,
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<MT2701_PIN_18_PCM_CLK__FUNC_MRG_CLK>,
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<MT2701_PIN_19_PCM_SYNC__FUNC_MRG_SYNC>,
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<MT2701_PIN_20_PCM_RX__FUNC_MRG_TX>,
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<MT2701_PIN_21_PCM_TX__FUNC_MRG_RX>;
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drive-strength = <MTK_DRIVE_12mA>;
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bias-pull-down;
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};
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};
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spi_pins_b: spi1@0 {
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pins_spi {
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pinmux = <MT2701_PIN_7_SPI1_CSN__FUNC_SPI1_CS>,
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<MT2701_PIN_8_SPI1_MI__FUNC_SPI1_MI>,
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<MT2701_PIN_9_SPI1_MO__FUNC_SPI1_MO>,
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<MT2701_PIN_199_SPI1_CLK__FUNC_SPI1_CK>;
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bias-disable;
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};
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};
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spi_pins_c: spi2@0 {
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pins_spi {
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pinmux = <MT2701_PIN_101_SPI2_CSN__FUNC_SPI2_CS>,
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<MT2701_PIN_102_SPI2_MI__FUNC_SPI2_MI>,
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<MT2701_PIN_103_SPI2_MO__FUNC_SPI2_MO>,
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<MT2701_PIN_104_SPI2_CLK__FUNC_SPI2_CK>;
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bias-disable;
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_a>;
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status = "disabled";
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_b>;
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status = "disabled";
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};
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&spi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_pins_c>;
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status = "disabled";
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};
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&nor_flash {
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pinctrl-names = "default";
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pinctrl-0 = <&nor_pins_default>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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};
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};
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&pio {
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nor_pins_default: nor {
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pins1 {
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pinmux = <MT2701_PIN_240_EXT_XCS__FUNC_EXT_XCS>,
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<MT2701_PIN_241_EXT_SCK__FUNC_EXT_SCK>,
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<MT2701_PIN_239_EXT_SDIO0__FUNC_EXT_SDIO0>,
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<MT2701_PIN_238_EXT_SDIO1__FUNC_EXT_SDIO1>,
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<MT2701_PIN_237_EXT_SDIO2__FUNC_EXT_SDIO2>,
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<MT2701_PIN_236_EXT_SDIO3__FUNC_EXT_SDIO3>;
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drive-strength = <MTK_DRIVE_4mA>;
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bias-pull-up;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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