586 строки
14 KiB
C
586 строки
14 KiB
C
/*
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* linux/drivers/i2c/chips/twl4030-power.c
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*
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* Handle TWL4030 Power initialization
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*
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* Copyright (C) 2008 Nokia Corporation
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* Copyright (C) 2006 Texas Instruments, Inc
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*
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* Written by Kalle Jokiniemi
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* Peter De Schrijver <peter.de-schrijver@nokia.com>
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* Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file "COPYING" in the main directory of this
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* archive for more details.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <linux/i2c/twl.h>
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#include <linux/platform_device.h>
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#include <asm/mach-types.h>
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static u8 twl4030_start_script_address = 0x2b;
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#define PWR_P1_SW_EVENTS 0x10
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#define PWR_DEVOFF (1 << 0)
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#define SEQ_OFFSYNC (1 << 0)
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#define PHY_TO_OFF_PM_MASTER(p) (p - 0x36)
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#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
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/* resource - hfclk */
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#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
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/* PM events */
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#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
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#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
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#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
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#define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36)
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#define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37)
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#define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38)
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#define LVL_WAKEUP 0x08
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#define ENABLE_WARMRESET (1<<4)
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#define END_OF_SCRIPT 0x3f
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#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
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#define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56)
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#define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
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#define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
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#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
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#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
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/* resource configuration registers
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<RESOURCE>_DEV_GRP at address 'n+0'
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<RESOURCE>_TYPE at address 'n+1'
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<RESOURCE>_REMAP at address 'n+2'
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<RESOURCE>_DEDICATED at address 'n+3'
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*/
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#define DEV_GRP_OFFSET 0
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#define TYPE_OFFSET 1
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#define REMAP_OFFSET 2
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#define DEDICATED_OFFSET 3
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/* Bit positions in the registers */
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/* <RESOURCE>_DEV_GRP */
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#define DEV_GRP_SHIFT 5
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#define DEV_GRP_MASK (7 << DEV_GRP_SHIFT)
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/* <RESOURCE>_TYPE */
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#define TYPE_SHIFT 0
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#define TYPE_MASK (7 << TYPE_SHIFT)
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#define TYPE2_SHIFT 3
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#define TYPE2_MASK (3 << TYPE2_SHIFT)
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/* <RESOURCE>_REMAP */
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#define SLEEP_STATE_SHIFT 0
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#define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT)
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#define OFF_STATE_SHIFT 4
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#define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT)
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static u8 res_config_addrs[] = {
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[RES_VAUX1] = 0x17,
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[RES_VAUX2] = 0x1b,
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[RES_VAUX3] = 0x1f,
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[RES_VAUX4] = 0x23,
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[RES_VMMC1] = 0x27,
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[RES_VMMC2] = 0x2b,
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[RES_VPLL1] = 0x2f,
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[RES_VPLL2] = 0x33,
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[RES_VSIM] = 0x37,
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[RES_VDAC] = 0x3b,
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[RES_VINTANA1] = 0x3f,
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[RES_VINTANA2] = 0x43,
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[RES_VINTDIG] = 0x47,
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[RES_VIO] = 0x4b,
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[RES_VDD1] = 0x55,
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[RES_VDD2] = 0x63,
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[RES_VUSB_1V5] = 0x71,
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[RES_VUSB_1V8] = 0x74,
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[RES_VUSB_3V1] = 0x77,
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[RES_VUSBCP] = 0x7a,
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[RES_REGEN] = 0x7f,
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[RES_NRES_PWRON] = 0x82,
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[RES_CLKEN] = 0x85,
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[RES_SYSEN] = 0x88,
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[RES_HFCLKOUT] = 0x8b,
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[RES_32KCLKOUT] = 0x8e,
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[RES_RESET] = 0x91,
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[RES_MAIN_REF] = 0x94,
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};
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static int twl4030_write_script_byte(u8 address, u8 byte)
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{
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int err;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS);
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if (err)
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goto out;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA);
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out:
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return err;
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}
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static int twl4030_write_script_ins(u8 address, u16 pmb_message,
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u8 delay, u8 next)
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{
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int err;
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address *= 4;
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err = twl4030_write_script_byte(address++, pmb_message >> 8);
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if (err)
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goto out;
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err = twl4030_write_script_byte(address++, pmb_message & 0xff);
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if (err)
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goto out;
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err = twl4030_write_script_byte(address++, delay);
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if (err)
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goto out;
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err = twl4030_write_script_byte(address++, next);
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out:
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return err;
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}
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static int twl4030_write_script(u8 address, struct twl4030_ins *script,
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int len)
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{
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int err;
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for (; len; len--, address++, script++) {
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if (len == 1) {
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err = twl4030_write_script_ins(address,
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script->pmb_message,
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script->delay,
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END_OF_SCRIPT);
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if (err)
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break;
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} else {
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err = twl4030_write_script_ins(address,
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script->pmb_message,
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script->delay,
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address + 1);
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if (err)
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break;
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}
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}
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return err;
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}
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static int twl4030_config_wakeup3_sequence(u8 address)
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{
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int err;
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u8 data;
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/* Set SLEEP to ACTIVE SEQ address for P3 */
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3);
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if (err)
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goto out;
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/* P3 LVL_WAKEUP should be on LEVEL */
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS);
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if (err)
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goto out;
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data |= LVL_WAKEUP;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS);
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out:
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if (err)
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pr_err("TWL4030 wakeup sequence for P3 config error\n");
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return err;
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}
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static int twl4030_config_wakeup12_sequence(u8 address)
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{
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int err = 0;
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u8 data;
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/* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12);
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if (err)
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goto out;
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/* P1/P2 LVL_WAKEUP should be on LEVEL */
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS);
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if (err)
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goto out;
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data |= LVL_WAKEUP;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS);
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if (err)
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goto out;
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS);
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if (err)
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goto out;
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data |= LVL_WAKEUP;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS);
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if (err)
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goto out;
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if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
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/* Disabling AC charger effect on sleep-active transitions */
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data,
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R_CFG_P1_TRANSITION);
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if (err)
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goto out;
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data &= ~(1<<1);
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data,
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R_CFG_P1_TRANSITION);
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if (err)
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goto out;
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}
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out:
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if (err)
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pr_err("TWL4030 wakeup sequence for P1 and P2" \
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"config error\n");
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return err;
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}
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static int twl4030_config_sleep_sequence(u8 address)
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{
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int err;
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/* Set ACTIVE to SLEEP SEQ address in T2 memory*/
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S);
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if (err)
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pr_err("TWL4030 sleep sequence config error\n");
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return err;
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}
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static int twl4030_config_warmreset_sequence(u8 address)
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{
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int err;
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u8 rd_data;
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/* Set WARM RESET SEQ address for P1 */
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM);
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if (err)
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goto out;
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/* P1/P2/P3 enable WARMRESET */
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS);
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if (err)
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goto out;
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rd_data |= ENABLE_WARMRESET;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS);
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if (err)
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goto out;
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS);
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if (err)
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goto out;
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rd_data |= ENABLE_WARMRESET;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS);
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if (err)
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goto out;
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err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS);
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if (err)
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goto out;
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rd_data |= ENABLE_WARMRESET;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS);
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out:
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if (err)
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pr_err("TWL4030 warmreset seq config error\n");
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return err;
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}
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static int twl4030_configure_resource(struct twl4030_resconfig *rconfig)
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{
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int rconfig_addr;
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int err;
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u8 type;
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u8 grp;
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u8 remap;
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if (rconfig->resource > TOTAL_RESOURCES) {
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pr_err("TWL4030 Resource %d does not exist\n",
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rconfig->resource);
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return -EINVAL;
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}
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rconfig_addr = res_config_addrs[rconfig->resource];
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/* Set resource group */
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err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp,
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rconfig_addr + DEV_GRP_OFFSET);
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if (err) {
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pr_err("TWL4030 Resource %d group could not be read\n",
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rconfig->resource);
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return err;
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}
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if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) {
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grp &= ~DEV_GRP_MASK;
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grp |= rconfig->devgroup << DEV_GRP_SHIFT;
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err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
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grp, rconfig_addr + DEV_GRP_OFFSET);
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if (err < 0) {
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pr_err("TWL4030 failed to program devgroup\n");
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return err;
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}
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}
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/* Set resource types */
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err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type,
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rconfig_addr + TYPE_OFFSET);
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if (err < 0) {
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pr_err("TWL4030 Resource %d type could not be read\n",
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rconfig->resource);
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return err;
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}
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if (rconfig->type != TWL4030_RESCONFIG_UNDEF) {
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type &= ~TYPE_MASK;
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type |= rconfig->type << TYPE_SHIFT;
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}
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if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) {
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type &= ~TYPE2_MASK;
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type |= rconfig->type2 << TYPE2_SHIFT;
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}
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err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
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type, rconfig_addr + TYPE_OFFSET);
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if (err < 0) {
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pr_err("TWL4030 failed to program resource type\n");
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return err;
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}
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/* Set remap states */
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err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap,
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rconfig_addr + REMAP_OFFSET);
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if (err < 0) {
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pr_err("TWL4030 Resource %d remap could not be read\n",
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rconfig->resource);
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return err;
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}
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if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) {
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remap &= ~OFF_STATE_MASK;
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remap |= rconfig->remap_off << OFF_STATE_SHIFT;
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}
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if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) {
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remap &= ~SLEEP_STATE_MASK;
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remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT;
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}
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err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER,
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remap,
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rconfig_addr + REMAP_OFFSET);
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if (err < 0) {
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pr_err("TWL4030 failed to program remap\n");
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return err;
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}
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return 0;
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}
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static int load_twl4030_script(struct twl4030_script *tscript,
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u8 address)
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{
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int err;
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static int order;
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/* Make sure the script isn't going beyond last valid address (0x3f) */
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if ((address + tscript->size) > END_OF_SCRIPT) {
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pr_err("TWL4030 scripts too big error\n");
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return -EINVAL;
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}
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err = twl4030_write_script(address, tscript->script, tscript->size);
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if (err)
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goto out;
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if (tscript->flags & TWL4030_WRST_SCRIPT) {
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err = twl4030_config_warmreset_sequence(address);
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if (err)
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goto out;
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}
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if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) {
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err = twl4030_config_wakeup12_sequence(address);
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if (err)
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goto out;
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order = 1;
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}
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if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) {
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err = twl4030_config_wakeup3_sequence(address);
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if (err)
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goto out;
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}
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if (tscript->flags & TWL4030_SLEEP_SCRIPT) {
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if (!order)
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pr_warning("TWL4030: Bad order of scripts (sleep "\
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"script before wakeup) Leads to boot"\
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"failure on some boards\n");
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err = twl4030_config_sleep_sequence(address);
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}
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out:
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return err;
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}
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int twl4030_remove_script(u8 flags)
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{
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int err = 0;
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
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TWL4030_PM_MASTER_PROTECT_KEY);
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if (err) {
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pr_err("twl4030: unable to unlock PROTECT_KEY\n");
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return err;
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}
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
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TWL4030_PM_MASTER_PROTECT_KEY);
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if (err) {
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pr_err("twl4030: unable to unlock PROTECT_KEY\n");
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return err;
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}
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if (flags & TWL4030_WRST_SCRIPT) {
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
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R_SEQ_ADD_WARM);
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if (err)
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return err;
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}
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if (flags & TWL4030_WAKEUP12_SCRIPT) {
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err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
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R_SEQ_ADD_S2A12);
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if (err)
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return err;
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}
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if (flags & TWL4030_WAKEUP3_SCRIPT) {
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|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
|
|
R_SEQ_ADD_S2A3);
|
|
if (err)
|
|
return err;
|
|
}
|
|
if (flags & TWL4030_SLEEP_SCRIPT) {
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT,
|
|
R_SEQ_ADD_A2S);
|
|
if (err)
|
|
return err;
|
|
}
|
|
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
|
|
TWL4030_PM_MASTER_PROTECT_KEY);
|
|
if (err)
|
|
pr_err("TWL4030 Unable to relock registers\n");
|
|
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* In master mode, start the power off sequence.
|
|
* After a successful execution, TWL shuts down the power to the SoC
|
|
* and all peripherals connected to it.
|
|
*/
|
|
void twl4030_power_off(void)
|
|
{
|
|
int err;
|
|
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF,
|
|
TWL4030_PM_MASTER_P1_SW_EVENTS);
|
|
if (err)
|
|
pr_err("TWL4030 Unable to power off\n");
|
|
}
|
|
|
|
void twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
|
|
{
|
|
int err = 0;
|
|
int i;
|
|
struct twl4030_resconfig *resconfig;
|
|
u8 val, address = twl4030_start_script_address;
|
|
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
|
|
TWL4030_PM_MASTER_PROTECT_KEY);
|
|
if (err)
|
|
goto unlock;
|
|
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
|
|
TWL4030_PM_MASTER_PROTECT_KEY);
|
|
if (err)
|
|
goto unlock;
|
|
|
|
for (i = 0; i < twl4030_scripts->num; i++) {
|
|
err = load_twl4030_script(twl4030_scripts->scripts[i], address);
|
|
if (err)
|
|
goto load;
|
|
address += twl4030_scripts->scripts[i]->size;
|
|
}
|
|
|
|
resconfig = twl4030_scripts->resource_config;
|
|
if (resconfig) {
|
|
while (resconfig->resource) {
|
|
err = twl4030_configure_resource(resconfig);
|
|
if (err)
|
|
goto resource;
|
|
resconfig++;
|
|
|
|
}
|
|
}
|
|
|
|
/* Board has to be wired properly to use this feature */
|
|
if (twl4030_scripts->use_poweroff && !pm_power_off) {
|
|
/* Default for SEQ_OFFSYNC is set, lets ensure this */
|
|
err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val,
|
|
TWL4030_PM_MASTER_CFG_P123_TRANSITION);
|
|
if (err) {
|
|
pr_warning("TWL4030 Unable to read registers\n");
|
|
|
|
} else if (!(val & SEQ_OFFSYNC)) {
|
|
val |= SEQ_OFFSYNC;
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val,
|
|
TWL4030_PM_MASTER_CFG_P123_TRANSITION);
|
|
if (err) {
|
|
pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n");
|
|
goto relock;
|
|
}
|
|
}
|
|
|
|
pm_power_off = twl4030_power_off;
|
|
}
|
|
|
|
relock:
|
|
err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
|
|
TWL4030_PM_MASTER_PROTECT_KEY);
|
|
if (err)
|
|
pr_err("TWL4030 Unable to relock registers\n");
|
|
return;
|
|
|
|
unlock:
|
|
if (err)
|
|
pr_err("TWL4030 Unable to unlock registers\n");
|
|
return;
|
|
load:
|
|
if (err)
|
|
pr_err("TWL4030 failed to load scripts\n");
|
|
return;
|
|
resource:
|
|
if (err)
|
|
pr_err("TWL4030 failed to configure resource\n");
|
|
return;
|
|
}
|