177 строки
4.5 KiB
C
177 строки
4.5 KiB
C
#ifndef X86_64_MSR_H
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#define X86_64_MSR_H 1
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#include <asm/msr-index.h>
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#ifndef __ASSEMBLY__
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/*
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* Access to machine-specific registers (available on 586 and better only)
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* Note: the rd* operations modify the parameters directly (without using
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* pointer indirection), this allows gcc to optimize better
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*/
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#define rdmsr(msr,val1,val2) \
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__asm__ __volatile__("rdmsr" \
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: "=a" (val1), "=d" (val2) \
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: "c" (msr))
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#define rdmsrl(msr,val) do { unsigned long a__,b__; \
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__asm__ __volatile__("rdmsr" \
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: "=a" (a__), "=d" (b__) \
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: "c" (msr)); \
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val = a__ | (b__<<32); \
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} while(0)
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#define wrmsr(msr,val1,val2) \
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__asm__ __volatile__("wrmsr" \
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: /* no outputs */ \
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: "c" (msr), "a" (val1), "d" (val2))
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#define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32)
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/* wrmsr with exception handling */
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#define wrmsr_safe(msr,a,b) ({ int ret__; \
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asm volatile("2: wrmsr ; xorl %0,%0\n" \
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"1:\n\t" \
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".section .fixup,\"ax\"\n\t" \
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"3: movl %4,%0 ; jmp 1b\n\t" \
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".previous\n\t" \
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".section __ex_table,\"a\"\n" \
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" .align 8\n\t" \
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" .quad 2b,3b\n\t" \
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".previous" \
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: "=a" (ret__) \
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: "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \
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ret__; })
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#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
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#define rdmsr_safe(msr,a,b) \
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({ int ret__; \
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asm volatile ("1: rdmsr\n" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: movl %4,%0\n" \
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" jmp 2b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .align 8\n" \
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" .quad 1b,3b\n" \
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".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b))\
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:"c"(msr), "i"(-EIO), "0"(0)); \
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ret__; })
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#define rdtsc(low,high) \
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__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
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#define rdtscl(low) \
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__asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx")
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#define rdtscp(low,high,aux) \
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asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux))
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#define rdtscll(val) do { \
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unsigned int __a,__d; \
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asm volatile("rdtsc" : "=a" (__a), "=d" (__d)); \
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(val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \
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} while(0)
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#define rdtscpll(val, aux) do { \
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unsigned long __a, __d; \
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asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \
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(val) = (__d << 32) | __a; \
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} while (0)
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#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
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#define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0)
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#define rdpmc(counter,low,high) \
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__asm__ __volatile__("rdpmc" \
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: "=a" (low), "=d" (high) \
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: "c" (counter))
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static inline void cpuid(int op, unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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__asm__("cpuid"
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: "=a" (*eax),
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"=b" (*ebx),
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"=c" (*ecx),
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"=d" (*edx)
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: "0" (op));
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}
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/* Some CPUID calls want 'count' to be placed in ecx */
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static inline void cpuid_count(int op, int count, int *eax, int *ebx, int *ecx,
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int *edx)
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{
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__asm__("cpuid"
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: "=a" (*eax),
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"=b" (*ebx),
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"=c" (*ecx),
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"=d" (*edx)
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: "0" (op), "c" (count));
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}
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/*
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* CPUID functions returning a single datum
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*/
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static inline unsigned int cpuid_eax(unsigned int op)
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{
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unsigned int eax;
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__asm__("cpuid"
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: "=a" (eax)
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: "0" (op)
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: "bx", "cx", "dx");
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return eax;
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}
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static inline unsigned int cpuid_ebx(unsigned int op)
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{
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unsigned int eax, ebx;
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__asm__("cpuid"
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: "=a" (eax), "=b" (ebx)
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: "0" (op)
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: "cx", "dx" );
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return ebx;
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}
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static inline unsigned int cpuid_ecx(unsigned int op)
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{
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unsigned int eax, ecx;
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__asm__("cpuid"
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: "=a" (eax), "=c" (ecx)
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: "0" (op)
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: "bx", "dx" );
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return ecx;
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}
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static inline unsigned int cpuid_edx(unsigned int op)
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{
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unsigned int eax, edx;
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__asm__("cpuid"
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: "=a" (eax), "=d" (edx)
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: "0" (op)
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: "bx", "cx");
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return edx;
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}
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#ifdef CONFIG_SMP
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void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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#else /* CONFIG_SMP */
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static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
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{
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rdmsr(msr_no, *l, *h);
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}
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static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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{
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wrmsr(msr_no, l, h);
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}
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#endif /* CONFIG_SMP */
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#endif /* __ASSEMBLY__ */
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#endif /* X86_64_MSR_H */
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