59dc5bfca0
When an interrupt is taken, the SRR registers are set to return to where it left off. Unless they are modified in the meantime, or the return address or MSR are modified, there is no need to reload these registers when returning from interrupt. Introduce per-CPU flags that track the validity of SRR and HSRR registers. These are cleared when returning from interrupt, when using the registers for something else (e.g., OPAL calls), when adjusting the return address or MSR of a context, and when context switching (which changes the return address and MSR). This improves the performance of interrupt returns. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Fold in fixup patch from Nick] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210617155116.2167984-5-npiggin@gmail.com |
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| .. | ||
| Makefile | ||
| ptrace-adv.c | ||
| ptrace-altivec.c | ||
| ptrace-decl.h | ||
| ptrace-fpu.c | ||
| ptrace-noadv.c | ||
| ptrace-novsx.c | ||
| ptrace-spe.c | ||
| ptrace-tm.c | ||
| ptrace-view.c | ||
| ptrace-vsx.c | ||
| ptrace.c | ||
| ptrace32.c | ||