1186 строки
32 KiB
C
1186 строки
32 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*/
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/usb/otg.h>
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#include "ci_hdrc_imx.h"
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#define MX25_USB_PHY_CTRL_OFFSET 0x08
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#define MX25_BM_EXTERNAL_VBUS_DIVIDER BIT(23)
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#define MX25_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
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#define MX25_EHCI_INTERFACE_DIFF_UNI (0 << 0)
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#define MX25_EHCI_INTERFACE_MASK (0xf)
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#define MX25_OTG_SIC_SHIFT 29
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#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
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#define MX25_OTG_PM_BIT BIT(24)
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#define MX25_OTG_PP_BIT BIT(11)
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#define MX25_OTG_OCPOL_BIT BIT(3)
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#define MX25_H1_SIC_SHIFT 21
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#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
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#define MX25_H1_PP_BIT BIT(18)
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#define MX25_H1_PM_BIT BIT(16)
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#define MX25_H1_IPPUE_UP_BIT BIT(7)
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#define MX25_H1_IPPUE_DOWN_BIT BIT(6)
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#define MX25_H1_TLL_BIT BIT(5)
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#define MX25_H1_USBTE_BIT BIT(4)
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#define MX25_H1_OCPOL_BIT BIT(2)
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#define MX27_H1_PM_BIT BIT(8)
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#define MX27_H2_PM_BIT BIT(16)
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#define MX27_OTG_PM_BIT BIT(24)
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#define MX53_USB_OTG_PHY_CTRL_0_OFFSET 0x08
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#define MX53_USB_OTG_PHY_CTRL_1_OFFSET 0x0c
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#define MX53_USB_CTRL_1_OFFSET 0x10
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#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK (0x11 << 2)
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#define MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI BIT(2)
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#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK (0x11 << 6)
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#define MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI BIT(6)
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#define MX53_USB_UH2_CTRL_OFFSET 0x14
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#define MX53_USB_UH3_CTRL_OFFSET 0x18
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#define MX53_USB_CLKONOFF_CTRL_OFFSET 0x24
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#define MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF BIT(21)
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#define MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF BIT(22)
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#define MX53_BM_OVER_CUR_DIS_H1 BIT(5)
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#define MX53_BM_OVER_CUR_DIS_OTG BIT(8)
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#define MX53_BM_OVER_CUR_DIS_UHx BIT(30)
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#define MX53_USB_CTRL_1_UH2_ULPI_EN BIT(26)
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#define MX53_USB_CTRL_1_UH3_ULPI_EN BIT(27)
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#define MX53_USB_UHx_CTRL_WAKE_UP_EN BIT(7)
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#define MX53_USB_UHx_CTRL_ULPI_INT_EN BIT(8)
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#define MX53_USB_PHYCTRL1_PLLDIV_MASK 0x3
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#define MX53_USB_PLL_DIV_24_MHZ 0x01
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#define MX6_BM_NON_BURST_SETTING BIT(1)
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#define MX6_BM_OVER_CUR_DIS BIT(7)
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#define MX6_BM_OVER_CUR_POLARITY BIT(8)
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#define MX6_BM_PWR_POLARITY BIT(9)
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#define MX6_BM_WAKEUP_ENABLE BIT(10)
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#define MX6_BM_UTMI_ON_CLOCK BIT(13)
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#define MX6_BM_ID_WAKEUP BIT(16)
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#define MX6_BM_VBUS_WAKEUP BIT(17)
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#define MX6SX_BM_DPDM_WAKEUP_EN BIT(29)
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#define MX6_BM_WAKEUP_INTR BIT(31)
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#define MX6_USB_HSIC_CTRL_OFFSET 0x10
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/* Send resume signal without 480Mhz PHY clock */
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#define MX6SX_BM_HSIC_AUTO_RESUME BIT(23)
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/* set before portsc.suspendM = 1 */
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#define MX6_BM_HSIC_DEV_CONN BIT(21)
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/* HSIC enable */
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#define MX6_BM_HSIC_EN BIT(12)
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/* Force HSIC module 480M clock on, even when in Host is in suspend mode */
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#define MX6_BM_HSIC_CLK_ON BIT(11)
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#define MX6_USB_OTG1_PHY_CTRL 0x18
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/* For imx6dql, it is host-only controller, for later imx6, it is otg's */
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#define MX6_USB_OTG2_PHY_CTRL 0x1c
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#define MX6SX_USB_VBUS_WAKEUP_SOURCE(v) (v << 8)
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#define MX6SX_USB_VBUS_WAKEUP_SOURCE_VBUS MX6SX_USB_VBUS_WAKEUP_SOURCE(0)
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#define MX6SX_USB_VBUS_WAKEUP_SOURCE_AVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(1)
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#define MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID MX6SX_USB_VBUS_WAKEUP_SOURCE(2)
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#define MX6SX_USB_VBUS_WAKEUP_SOURCE_SESS_END MX6SX_USB_VBUS_WAKEUP_SOURCE(3)
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#define VF610_OVER_CUR_DIS BIT(7)
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#define MX7D_USBNC_USB_CTRL2 0x4
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#define MX7D_USB_VBUS_WAKEUP_SOURCE_MASK 0x3
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#define MX7D_USB_VBUS_WAKEUP_SOURCE(v) (v << 0)
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#define MX7D_USB_VBUS_WAKEUP_SOURCE_VBUS MX7D_USB_VBUS_WAKEUP_SOURCE(0)
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#define MX7D_USB_VBUS_WAKEUP_SOURCE_AVALID MX7D_USB_VBUS_WAKEUP_SOURCE(1)
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#define MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID MX7D_USB_VBUS_WAKEUP_SOURCE(2)
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#define MX7D_USB_VBUS_WAKEUP_SOURCE_SESS_END MX7D_USB_VBUS_WAKEUP_SOURCE(3)
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#define MX7D_USBNC_AUTO_RESUME BIT(2)
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/* The default DM/DP value is pull-down */
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#define MX7D_USBNC_USB_CTRL2_OPMODE(v) (v << 6)
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#define MX7D_USBNC_USB_CTRL2_OPMODE_NON_DRIVING MX7D_USBNC_USB_CTRL2_OPMODE(1)
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#define MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK (BIT(7) | BIT(6))
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#define MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN BIT(8)
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#define MX7D_USBNC_USB_CTRL2_DP_OVERRIDE_VAL BIT(12)
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#define MX7D_USBNC_USB_CTRL2_DP_OVERRIDE_EN BIT(13)
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#define MX7D_USBNC_USB_CTRL2_DM_OVERRIDE_VAL BIT(14)
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#define MX7D_USBNC_USB_CTRL2_DM_OVERRIDE_EN BIT(15)
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#define MX7D_USBNC_USB_CTRL2_DP_DM_MASK (BIT(12) | BIT(13) | \
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BIT(14) | BIT(15))
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#define MX7D_USB_OTG_PHY_CFG1 0x30
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#define MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL BIT(0)
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#define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 BIT(1)
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#define MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 BIT(2)
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#define MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB BIT(3)
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#define MX7D_USB_OTG_PHY_CFG2_DRVVBUS0 BIT(16)
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#define MX7D_USB_OTG_PHY_CFG2 0x34
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#define MX7D_USB_OTG_PHY_STATUS 0x3c
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#define MX7D_USB_OTG_PHY_STATUS_LINE_STATE0 BIT(0)
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#define MX7D_USB_OTG_PHY_STATUS_LINE_STATE1 BIT(1)
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#define MX7D_USB_OTG_PHY_STATUS_VBUS_VLD BIT(3)
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#define MX7D_USB_OTG_PHY_STATUS_CHRGDET BIT(29)
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#define MX7D_USB_OTG_PHY_CFG1 0x30
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#define TXPREEMPAMPTUNE0_BIT 28
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#define TXPREEMPAMPTUNE0_MASK (3 << 28)
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#define TXVREFTUNE0_BIT 20
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#define TXVREFTUNE0_MASK (0xf << 20)
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#define MX6_USB_OTG_WAKEUP_BITS (MX6_BM_WAKEUP_ENABLE | MX6_BM_VBUS_WAKEUP | \
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MX6_BM_ID_WAKEUP)
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struct usbmisc_ops {
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/* It's called once when probe a usb device */
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int (*init)(struct imx_usbmisc_data *data);
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/* It's called once after adding a usb device */
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int (*post)(struct imx_usbmisc_data *data);
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/* It's called when we need to enable/disable usb wakeup */
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int (*set_wakeup)(struct imx_usbmisc_data *data, bool enabled);
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/* It's called before setting portsc.suspendM */
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int (*hsic_set_connect)(struct imx_usbmisc_data *data);
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/* It's called during suspend/resume */
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int (*hsic_set_clk)(struct imx_usbmisc_data *data, bool enabled);
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/* usb charger detection */
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int (*charger_detection)(struct imx_usbmisc_data *data);
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};
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struct imx_usbmisc {
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void __iomem *base;
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spinlock_t lock;
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const struct usbmisc_ops *ops;
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};
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static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data);
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static int usbmisc_imx25_init(struct imx_usbmisc_data *data)
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{
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struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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unsigned long flags;
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u32 val = 0;
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if (data->index > 1)
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return -EINVAL;
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spin_lock_irqsave(&usbmisc->lock, flags);
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switch (data->index) {
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case 0:
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val = readl(usbmisc->base);
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val &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PP_BIT);
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val |= (MX25_EHCI_INTERFACE_DIFF_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
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val |= (MX25_OTG_PM_BIT | MX25_OTG_OCPOL_BIT);
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/*
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* If the polarity is not configured assume active high for
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* historical reasons.
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*/
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if (data->oc_pol_configured && data->oc_pol_active_low)
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val &= ~MX25_OTG_OCPOL_BIT;
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writel(val, usbmisc->base);
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break;
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case 1:
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val = readl(usbmisc->base);
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val &= ~(MX25_H1_SIC_MASK | MX25_H1_PP_BIT | MX25_H1_IPPUE_UP_BIT);
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val |= (MX25_EHCI_INTERFACE_SINGLE_UNI & MX25_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
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val |= (MX25_H1_PM_BIT | MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
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MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT);
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/*
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* If the polarity is not configured assume active high for
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* historical reasons.
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*/
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if (data->oc_pol_configured && data->oc_pol_active_low)
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val &= ~MX25_H1_OCPOL_BIT;
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writel(val, usbmisc->base);
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break;
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}
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spin_unlock_irqrestore(&usbmisc->lock, flags);
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return 0;
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}
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static int usbmisc_imx25_post(struct imx_usbmisc_data *data)
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{
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struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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void __iomem *reg;
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unsigned long flags;
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u32 val;
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if (data->index > 2)
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return -EINVAL;
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if (data->index)
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return 0;
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spin_lock_irqsave(&usbmisc->lock, flags);
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reg = usbmisc->base + MX25_USB_PHY_CTRL_OFFSET;
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val = readl(reg);
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if (data->evdo)
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val |= MX25_BM_EXTERNAL_VBUS_DIVIDER;
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else
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val &= ~MX25_BM_EXTERNAL_VBUS_DIVIDER;
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writel(val, reg);
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spin_unlock_irqrestore(&usbmisc->lock, flags);
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usleep_range(5000, 10000); /* needed to stabilize voltage */
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return 0;
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}
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static int usbmisc_imx27_init(struct imx_usbmisc_data *data)
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{
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struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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unsigned long flags;
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u32 val;
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switch (data->index) {
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case 0:
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val = MX27_OTG_PM_BIT;
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break;
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case 1:
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val = MX27_H1_PM_BIT;
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break;
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case 2:
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val = MX27_H2_PM_BIT;
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break;
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default:
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return -EINVAL;
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}
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spin_lock_irqsave(&usbmisc->lock, flags);
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if (data->disable_oc)
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val = readl(usbmisc->base) | val;
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else
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val = readl(usbmisc->base) & ~val;
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writel(val, usbmisc->base);
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spin_unlock_irqrestore(&usbmisc->lock, flags);
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return 0;
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}
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static int usbmisc_imx53_init(struct imx_usbmisc_data *data)
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{
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struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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void __iomem *reg = NULL;
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unsigned long flags;
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u32 val = 0;
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if (data->index > 3)
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return -EINVAL;
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/* Select a 24 MHz reference clock for the PHY */
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val = readl(usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
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val &= ~MX53_USB_PHYCTRL1_PLLDIV_MASK;
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val |= MX53_USB_PLL_DIV_24_MHZ;
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writel(val, usbmisc->base + MX53_USB_OTG_PHY_CTRL_1_OFFSET);
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spin_lock_irqsave(&usbmisc->lock, flags);
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switch (data->index) {
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case 0:
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if (data->disable_oc) {
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reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
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val = readl(reg) | MX53_BM_OVER_CUR_DIS_OTG;
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writel(val, reg);
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}
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break;
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case 1:
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if (data->disable_oc) {
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reg = usbmisc->base + MX53_USB_OTG_PHY_CTRL_0_OFFSET;
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val = readl(reg) | MX53_BM_OVER_CUR_DIS_H1;
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writel(val, reg);
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}
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break;
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case 2:
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if (data->ulpi) {
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/* set USBH2 into ULPI-mode. */
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reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
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val = readl(reg) | MX53_USB_CTRL_1_UH2_ULPI_EN;
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/* select ULPI clock */
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val &= ~MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_MASK;
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val |= MX53_USB_CTRL_1_H2_XCVR_CLK_SEL_ULPI;
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writel(val, reg);
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/* Set interrupt wake up enable */
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reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
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val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
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| MX53_USB_UHx_CTRL_ULPI_INT_EN;
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writel(val, reg);
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if (is_imx53_usbmisc(data)) {
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/* Disable internal 60Mhz clock */
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reg = usbmisc->base +
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MX53_USB_CLKONOFF_CTRL_OFFSET;
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val = readl(reg) |
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MX53_USB_CLKONOFF_CTRL_H2_INT60CKOFF;
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writel(val, reg);
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}
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}
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if (data->disable_oc) {
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reg = usbmisc->base + MX53_USB_UH2_CTRL_OFFSET;
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val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
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writel(val, reg);
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}
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break;
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case 3:
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if (data->ulpi) {
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/* set USBH3 into ULPI-mode. */
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reg = usbmisc->base + MX53_USB_CTRL_1_OFFSET;
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val = readl(reg) | MX53_USB_CTRL_1_UH3_ULPI_EN;
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/* select ULPI clock */
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val &= ~MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_MASK;
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val |= MX53_USB_CTRL_1_H3_XCVR_CLK_SEL_ULPI;
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writel(val, reg);
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/* Set interrupt wake up enable */
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reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
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val = readl(reg) | MX53_USB_UHx_CTRL_WAKE_UP_EN
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| MX53_USB_UHx_CTRL_ULPI_INT_EN;
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writel(val, reg);
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if (is_imx53_usbmisc(data)) {
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/* Disable internal 60Mhz clock */
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reg = usbmisc->base +
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MX53_USB_CLKONOFF_CTRL_OFFSET;
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val = readl(reg) |
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MX53_USB_CLKONOFF_CTRL_H3_INT60CKOFF;
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writel(val, reg);
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}
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}
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if (data->disable_oc) {
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reg = usbmisc->base + MX53_USB_UH3_CTRL_OFFSET;
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val = readl(reg) | MX53_BM_OVER_CUR_DIS_UHx;
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writel(val, reg);
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}
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break;
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}
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spin_unlock_irqrestore(&usbmisc->lock, flags);
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return 0;
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}
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static u32 usbmisc_wakeup_setting(struct imx_usbmisc_data *data)
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{
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u32 wakeup_setting = MX6_USB_OTG_WAKEUP_BITS;
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if (data->ext_id || data->available_role != USB_DR_MODE_OTG)
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wakeup_setting &= ~MX6_BM_ID_WAKEUP;
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if (data->ext_vbus || data->available_role == USB_DR_MODE_HOST)
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wakeup_setting &= ~MX6_BM_VBUS_WAKEUP;
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return wakeup_setting;
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}
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static int usbmisc_imx6q_set_wakeup
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(struct imx_usbmisc_data *data, bool enabled)
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{
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struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
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unsigned long flags;
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u32 val;
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int ret = 0;
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if (data->index > 3)
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return -EINVAL;
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spin_lock_irqsave(&usbmisc->lock, flags);
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val = readl(usbmisc->base + data->index * 4);
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if (enabled) {
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val &= ~MX6_USB_OTG_WAKEUP_BITS;
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val |= usbmisc_wakeup_setting(data);
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} else {
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if (val & MX6_BM_WAKEUP_INTR)
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pr_debug("wakeup int at ci_hdrc.%d\n", data->index);
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val &= ~MX6_USB_OTG_WAKEUP_BITS;
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}
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writel(val, usbmisc->base + data->index * 4);
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spin_unlock_irqrestore(&usbmisc->lock, flags);
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|
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return ret;
|
|
}
|
|
|
|
static int usbmisc_imx6q_init(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
if (data->index > 3)
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
|
|
reg = readl(usbmisc->base + data->index * 4);
|
|
if (data->disable_oc) {
|
|
reg |= MX6_BM_OVER_CUR_DIS;
|
|
} else {
|
|
reg &= ~MX6_BM_OVER_CUR_DIS;
|
|
|
|
/*
|
|
* If the polarity is not configured keep it as setup by the
|
|
* bootloader.
|
|
*/
|
|
if (data->oc_pol_configured && data->oc_pol_active_low)
|
|
reg |= MX6_BM_OVER_CUR_POLARITY;
|
|
else if (data->oc_pol_configured)
|
|
reg &= ~MX6_BM_OVER_CUR_POLARITY;
|
|
}
|
|
/* If the polarity is not set keep it as setup by the bootlader */
|
|
if (data->pwr_pol == 1)
|
|
reg |= MX6_BM_PWR_POLARITY;
|
|
writel(reg, usbmisc->base + data->index * 4);
|
|
|
|
/* SoC non-burst setting */
|
|
reg = readl(usbmisc->base + data->index * 4);
|
|
writel(reg | MX6_BM_NON_BURST_SETTING,
|
|
usbmisc->base + data->index * 4);
|
|
|
|
/* For HSIC controller */
|
|
if (data->hsic) {
|
|
reg = readl(usbmisc->base + data->index * 4);
|
|
writel(reg | MX6_BM_UTMI_ON_CLOCK,
|
|
usbmisc->base + data->index * 4);
|
|
reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET
|
|
+ (data->index - 2) * 4);
|
|
reg |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON;
|
|
writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET
|
|
+ (data->index - 2) * 4);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
usbmisc_imx6q_set_wakeup(data, false);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usbmisc_imx6_hsic_get_reg_offset(struct imx_usbmisc_data *data)
|
|
{
|
|
int offset, ret = 0;
|
|
|
|
if (data->index == 2 || data->index == 3) {
|
|
offset = (data->index - 2) * 4;
|
|
} else if (data->index == 0) {
|
|
/*
|
|
* For SoCs like i.MX7D and later, each USB controller has
|
|
* its own non-core register region. For SoCs before i.MX7D,
|
|
* the first two USB controllers are non-HSIC controllers.
|
|
*/
|
|
offset = 0;
|
|
} else {
|
|
dev_err(data->dev, "index is error for usbmisc\n");
|
|
ret = -EINVAL;
|
|
}
|
|
|
|
return ret ? ret : offset;
|
|
}
|
|
|
|
static int usbmisc_imx6_hsic_set_connect(struct imx_usbmisc_data *data)
|
|
{
|
|
unsigned long flags;
|
|
u32 val;
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
int offset;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
offset = usbmisc_imx6_hsic_get_reg_offset(data);
|
|
if (offset < 0) {
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
return offset;
|
|
}
|
|
|
|
val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
|
|
if (!(val & MX6_BM_HSIC_DEV_CONN))
|
|
writel(val | MX6_BM_HSIC_DEV_CONN,
|
|
usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
|
|
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usbmisc_imx6_hsic_set_clk(struct imx_usbmisc_data *data, bool on)
|
|
{
|
|
unsigned long flags;
|
|
u32 val;
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
int offset;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
offset = usbmisc_imx6_hsic_get_reg_offset(data);
|
|
if (offset < 0) {
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
return offset;
|
|
}
|
|
|
|
val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
|
|
val |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON;
|
|
if (on)
|
|
val |= MX6_BM_HSIC_CLK_ON;
|
|
else
|
|
val &= ~MX6_BM_HSIC_CLK_ON;
|
|
|
|
writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET + offset);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int usbmisc_imx6sx_init(struct imx_usbmisc_data *data)
|
|
{
|
|
void __iomem *reg = NULL;
|
|
unsigned long flags;
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
u32 val;
|
|
|
|
usbmisc_imx6q_init(data);
|
|
|
|
if (data->index == 0 || data->index == 1) {
|
|
reg = usbmisc->base + MX6_USB_OTG1_PHY_CTRL + data->index * 4;
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
/* Set vbus wakeup source as bvalid */
|
|
val = readl(reg);
|
|
writel(val | MX6SX_USB_VBUS_WAKEUP_SOURCE_BVALID, reg);
|
|
/*
|
|
* Disable dp/dm wakeup in device mode when vbus is
|
|
* not there.
|
|
*/
|
|
val = readl(usbmisc->base + data->index * 4);
|
|
writel(val & ~MX6SX_BM_DPDM_WAKEUP_EN,
|
|
usbmisc->base + data->index * 4);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
}
|
|
|
|
/* For HSIC controller */
|
|
if (data->hsic) {
|
|
val = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
|
|
val |= MX6SX_BM_HSIC_AUTO_RESUME;
|
|
writel(val, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usbmisc_vf610_init(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
u32 reg;
|
|
|
|
/*
|
|
* Vybrid only has one misc register set, but in two different
|
|
* areas. These is reflected in two instances of this driver.
|
|
*/
|
|
if (data->index >= 1)
|
|
return -EINVAL;
|
|
|
|
if (data->disable_oc) {
|
|
reg = readl(usbmisc->base);
|
|
writel(reg | VF610_OVER_CUR_DIS, usbmisc->base);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usbmisc_imx7d_set_wakeup
|
|
(struct imx_usbmisc_data *data, bool enabled)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
unsigned long flags;
|
|
u32 val;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base);
|
|
if (enabled) {
|
|
val &= ~MX6_USB_OTG_WAKEUP_BITS;
|
|
val |= usbmisc_wakeup_setting(data);
|
|
writel(val, usbmisc->base);
|
|
} else {
|
|
if (val & MX6_BM_WAKEUP_INTR)
|
|
dev_dbg(data->dev, "wakeup int\n");
|
|
writel(val & ~MX6_USB_OTG_WAKEUP_BITS, usbmisc->base);
|
|
}
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usbmisc_imx7d_init(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
if (data->index >= 1)
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
reg = readl(usbmisc->base);
|
|
if (data->disable_oc) {
|
|
reg |= MX6_BM_OVER_CUR_DIS;
|
|
} else {
|
|
reg &= ~MX6_BM_OVER_CUR_DIS;
|
|
|
|
/*
|
|
* If the polarity is not configured keep it as setup by the
|
|
* bootloader.
|
|
*/
|
|
if (data->oc_pol_configured && data->oc_pol_active_low)
|
|
reg |= MX6_BM_OVER_CUR_POLARITY;
|
|
else if (data->oc_pol_configured)
|
|
reg &= ~MX6_BM_OVER_CUR_POLARITY;
|
|
}
|
|
/* If the polarity is not set keep it as setup by the bootlader */
|
|
if (data->pwr_pol == 1)
|
|
reg |= MX6_BM_PWR_POLARITY;
|
|
writel(reg, usbmisc->base);
|
|
|
|
/* SoC non-burst setting */
|
|
reg = readl(usbmisc->base);
|
|
writel(reg | MX6_BM_NON_BURST_SETTING, usbmisc->base);
|
|
|
|
if (!data->hsic) {
|
|
reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
|
|
writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID
|
|
| MX7D_USBNC_AUTO_RESUME,
|
|
usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
/* PHY tuning for signal quality */
|
|
reg = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
|
|
if (data->emp_curr_control && data->emp_curr_control <=
|
|
(TXPREEMPAMPTUNE0_MASK >> TXPREEMPAMPTUNE0_BIT)) {
|
|
reg &= ~TXPREEMPAMPTUNE0_MASK;
|
|
reg |= (data->emp_curr_control << TXPREEMPAMPTUNE0_BIT);
|
|
}
|
|
|
|
if (data->dc_vol_level_adjust && data->dc_vol_level_adjust <=
|
|
(TXVREFTUNE0_MASK >> TXVREFTUNE0_BIT)) {
|
|
reg &= ~TXVREFTUNE0_MASK;
|
|
reg |= (data->dc_vol_level_adjust << TXVREFTUNE0_BIT);
|
|
}
|
|
|
|
writel(reg, usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
usbmisc_imx7d_set_wakeup(data, false);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx7d_charger_secondary_detection(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
struct usb_phy *usb_phy = data->usb_phy;
|
|
int val;
|
|
unsigned long flags;
|
|
|
|
/* Clear VDATSRCENB0 to disable VDP_SRC and IDM_SNK required by BC 1.2 spec */
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
val &= ~MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0;
|
|
writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
/* TVDMSRC_DIS */
|
|
msleep(20);
|
|
|
|
/* VDM_SRC is connected to D- and IDP_SINK is connected to D+ */
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 |
|
|
MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 |
|
|
MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL,
|
|
usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
/* TVDMSRC_ON */
|
|
msleep(40);
|
|
|
|
/*
|
|
* Per BC 1.2, check voltage of D+:
|
|
* DCP: if greater than VDAT_REF;
|
|
* CDP: if less than VDAT_REF.
|
|
*/
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
|
|
if (val & MX7D_USB_OTG_PHY_STATUS_CHRGDET) {
|
|
dev_dbg(data->dev, "It is a dedicate charging port\n");
|
|
usb_phy->chg_type = DCP_TYPE;
|
|
} else {
|
|
dev_dbg(data->dev, "It is a charging downstream port\n");
|
|
usb_phy->chg_type = CDP_TYPE;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void imx7_disable_charger_detector(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
unsigned long flags;
|
|
u32 val;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
val &= ~(MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB |
|
|
MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 |
|
|
MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0 |
|
|
MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL);
|
|
writel(val, usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
|
|
/* Set OPMODE to be 2'b00 and disable its override */
|
|
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
val &= ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK;
|
|
writel(val, usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
|
|
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
writel(val & ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN,
|
|
usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
}
|
|
|
|
static int imx7d_charger_data_contact_detect(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
unsigned long flags;
|
|
u32 val;
|
|
int i, data_pin_contact_count = 0;
|
|
|
|
/* Enable Data Contact Detect (DCD) per the USB BC 1.2 */
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB,
|
|
usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
for (i = 0; i < 100; i = i + 1) {
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
|
|
if (!(val & MX7D_USB_OTG_PHY_STATUS_LINE_STATE0)) {
|
|
if (data_pin_contact_count++ > 5)
|
|
/* Data pin makes contact */
|
|
break;
|
|
usleep_range(5000, 10000);
|
|
} else {
|
|
data_pin_contact_count = 0;
|
|
usleep_range(5000, 6000);
|
|
}
|
|
}
|
|
|
|
/* Disable DCD after finished data contact check */
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
writel(val & ~MX7D_USB_OTG_PHY_CFG2_CHRG_DCDENB,
|
|
usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
if (i == 100) {
|
|
dev_err(data->dev,
|
|
"VBUS is coming from a dedicated power supply.\n");
|
|
return -ENXIO;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx7d_charger_primary_detection(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
struct usb_phy *usb_phy = data->usb_phy;
|
|
unsigned long flags;
|
|
u32 val;
|
|
|
|
/* VDP_SRC is connected to D+ and IDM_SINK is connected to D- */
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
val &= ~MX7D_USB_OTG_PHY_CFG2_CHRG_CHRGSEL;
|
|
writel(val | MX7D_USB_OTG_PHY_CFG2_CHRG_VDATSRCENB0 |
|
|
MX7D_USB_OTG_PHY_CFG2_CHRG_VDATDETENB0,
|
|
usbmisc->base + MX7D_USB_OTG_PHY_CFG2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
/* TVDPSRC_ON */
|
|
msleep(40);
|
|
|
|
/* Check if D- is less than VDAT_REF to determine an SDP per BC 1.2 */
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
|
|
if (!(val & MX7D_USB_OTG_PHY_STATUS_CHRGDET)) {
|
|
dev_dbg(data->dev, "It is a standard downstream port\n");
|
|
usb_phy->chg_type = SDP_TYPE;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Whole charger detection process:
|
|
* 1. OPMODE override to be non-driving
|
|
* 2. Data contact check
|
|
* 3. Primary detection
|
|
* 4. Secondary detection
|
|
* 5. Disable charger detection
|
|
*/
|
|
static int imx7d_charger_detection(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
struct usb_phy *usb_phy = data->usb_phy;
|
|
unsigned long flags;
|
|
u32 val;
|
|
int ret;
|
|
|
|
/* Check if vbus is valid */
|
|
val = readl(usbmisc->base + MX7D_USB_OTG_PHY_STATUS);
|
|
if (!(val & MX7D_USB_OTG_PHY_STATUS_VBUS_VLD)) {
|
|
dev_err(data->dev, "vbus is error\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* Keep OPMODE to be non-driving mode during the whole
|
|
* charger detection process.
|
|
*/
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
val &= ~MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_MASK;
|
|
val |= MX7D_USBNC_USB_CTRL2_OPMODE_NON_DRIVING;
|
|
writel(val, usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
|
|
val = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
writel(val | MX7D_USBNC_USB_CTRL2_OPMODE_OVERRIDE_EN,
|
|
usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
ret = imx7d_charger_data_contact_detect(data);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = imx7d_charger_primary_detection(data);
|
|
if (!ret && usb_phy->chg_type != SDP_TYPE)
|
|
ret = imx7d_charger_secondary_detection(data);
|
|
|
|
imx7_disable_charger_detector(data);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int usbmisc_imx7ulp_init(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
unsigned long flags;
|
|
u32 reg;
|
|
|
|
if (data->index >= 1)
|
|
return -EINVAL;
|
|
|
|
spin_lock_irqsave(&usbmisc->lock, flags);
|
|
reg = readl(usbmisc->base);
|
|
if (data->disable_oc) {
|
|
reg |= MX6_BM_OVER_CUR_DIS;
|
|
} else {
|
|
reg &= ~MX6_BM_OVER_CUR_DIS;
|
|
|
|
/*
|
|
* If the polarity is not configured keep it as setup by the
|
|
* bootloader.
|
|
*/
|
|
if (data->oc_pol_configured && data->oc_pol_active_low)
|
|
reg |= MX6_BM_OVER_CUR_POLARITY;
|
|
else if (data->oc_pol_configured)
|
|
reg &= ~MX6_BM_OVER_CUR_POLARITY;
|
|
}
|
|
/* If the polarity is not set keep it as setup by the bootlader */
|
|
if (data->pwr_pol == 1)
|
|
reg |= MX6_BM_PWR_POLARITY;
|
|
|
|
writel(reg, usbmisc->base);
|
|
|
|
/* SoC non-burst setting */
|
|
reg = readl(usbmisc->base);
|
|
writel(reg | MX6_BM_NON_BURST_SETTING, usbmisc->base);
|
|
|
|
if (data->hsic) {
|
|
reg = readl(usbmisc->base);
|
|
writel(reg | MX6_BM_UTMI_ON_CLOCK, usbmisc->base);
|
|
|
|
reg = readl(usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
|
|
reg |= MX6_BM_HSIC_EN | MX6_BM_HSIC_CLK_ON;
|
|
writel(reg, usbmisc->base + MX6_USB_HSIC_CTRL_OFFSET);
|
|
|
|
/*
|
|
* For non-HSIC controller, the autoresume is enabled
|
|
* at MXS PHY driver (usbphy_ctrl bit18).
|
|
*/
|
|
reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
writel(reg | MX7D_USBNC_AUTO_RESUME,
|
|
usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
} else {
|
|
reg = readl(usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
reg &= ~MX7D_USB_VBUS_WAKEUP_SOURCE_MASK;
|
|
writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID,
|
|
usbmisc->base + MX7D_USBNC_USB_CTRL2);
|
|
}
|
|
|
|
spin_unlock_irqrestore(&usbmisc->lock, flags);
|
|
|
|
usbmisc_imx7d_set_wakeup(data, false);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct usbmisc_ops imx25_usbmisc_ops = {
|
|
.init = usbmisc_imx25_init,
|
|
.post = usbmisc_imx25_post,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx27_usbmisc_ops = {
|
|
.init = usbmisc_imx27_init,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx51_usbmisc_ops = {
|
|
.init = usbmisc_imx53_init,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx53_usbmisc_ops = {
|
|
.init = usbmisc_imx53_init,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx6q_usbmisc_ops = {
|
|
.set_wakeup = usbmisc_imx6q_set_wakeup,
|
|
.init = usbmisc_imx6q_init,
|
|
.hsic_set_connect = usbmisc_imx6_hsic_set_connect,
|
|
.hsic_set_clk = usbmisc_imx6_hsic_set_clk,
|
|
};
|
|
|
|
static const struct usbmisc_ops vf610_usbmisc_ops = {
|
|
.init = usbmisc_vf610_init,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx6sx_usbmisc_ops = {
|
|
.set_wakeup = usbmisc_imx6q_set_wakeup,
|
|
.init = usbmisc_imx6sx_init,
|
|
.hsic_set_connect = usbmisc_imx6_hsic_set_connect,
|
|
.hsic_set_clk = usbmisc_imx6_hsic_set_clk,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx7d_usbmisc_ops = {
|
|
.init = usbmisc_imx7d_init,
|
|
.set_wakeup = usbmisc_imx7d_set_wakeup,
|
|
.charger_detection = imx7d_charger_detection,
|
|
};
|
|
|
|
static const struct usbmisc_ops imx7ulp_usbmisc_ops = {
|
|
.init = usbmisc_imx7ulp_init,
|
|
.set_wakeup = usbmisc_imx7d_set_wakeup,
|
|
.hsic_set_connect = usbmisc_imx6_hsic_set_connect,
|
|
.hsic_set_clk = usbmisc_imx6_hsic_set_clk,
|
|
};
|
|
|
|
static inline bool is_imx53_usbmisc(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev);
|
|
|
|
return usbmisc->ops == &imx53_usbmisc_ops;
|
|
}
|
|
|
|
int imx_usbmisc_init(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc;
|
|
|
|
if (!data)
|
|
return 0;
|
|
|
|
usbmisc = dev_get_drvdata(data->dev);
|
|
if (!usbmisc->ops->init)
|
|
return 0;
|
|
return usbmisc->ops->init(data);
|
|
}
|
|
EXPORT_SYMBOL_GPL(imx_usbmisc_init);
|
|
|
|
int imx_usbmisc_init_post(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc;
|
|
|
|
if (!data)
|
|
return 0;
|
|
|
|
usbmisc = dev_get_drvdata(data->dev);
|
|
if (!usbmisc->ops->post)
|
|
return 0;
|
|
return usbmisc->ops->post(data);
|
|
}
|
|
EXPORT_SYMBOL_GPL(imx_usbmisc_init_post);
|
|
|
|
int imx_usbmisc_set_wakeup(struct imx_usbmisc_data *data, bool enabled)
|
|
{
|
|
struct imx_usbmisc *usbmisc;
|
|
|
|
if (!data)
|
|
return 0;
|
|
|
|
usbmisc = dev_get_drvdata(data->dev);
|
|
if (!usbmisc->ops->set_wakeup)
|
|
return 0;
|
|
return usbmisc->ops->set_wakeup(data, enabled);
|
|
}
|
|
EXPORT_SYMBOL_GPL(imx_usbmisc_set_wakeup);
|
|
|
|
int imx_usbmisc_hsic_set_connect(struct imx_usbmisc_data *data)
|
|
{
|
|
struct imx_usbmisc *usbmisc;
|
|
|
|
if (!data)
|
|
return 0;
|
|
|
|
usbmisc = dev_get_drvdata(data->dev);
|
|
if (!usbmisc->ops->hsic_set_connect || !data->hsic)
|
|
return 0;
|
|
return usbmisc->ops->hsic_set_connect(data);
|
|
}
|
|
EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_connect);
|
|
|
|
int imx_usbmisc_hsic_set_clk(struct imx_usbmisc_data *data, bool on)
|
|
{
|
|
struct imx_usbmisc *usbmisc;
|
|
|
|
if (!data)
|
|
return 0;
|
|
|
|
usbmisc = dev_get_drvdata(data->dev);
|
|
if (!usbmisc->ops->hsic_set_clk || !data->hsic)
|
|
return 0;
|
|
return usbmisc->ops->hsic_set_clk(data, on);
|
|
}
|
|
EXPORT_SYMBOL_GPL(imx_usbmisc_hsic_set_clk);
|
|
|
|
int imx_usbmisc_charger_detection(struct imx_usbmisc_data *data, bool connect)
|
|
{
|
|
struct imx_usbmisc *usbmisc;
|
|
struct usb_phy *usb_phy;
|
|
int ret = 0;
|
|
|
|
if (!data)
|
|
return -EINVAL;
|
|
|
|
usbmisc = dev_get_drvdata(data->dev);
|
|
usb_phy = data->usb_phy;
|
|
if (!usbmisc->ops->charger_detection)
|
|
return -ENOTSUPP;
|
|
|
|
if (connect) {
|
|
ret = usbmisc->ops->charger_detection(data);
|
|
if (ret) {
|
|
dev_err(data->dev,
|
|
"Error occurs during detection: %d\n",
|
|
ret);
|
|
usb_phy->chg_state = USB_CHARGER_ABSENT;
|
|
} else {
|
|
usb_phy->chg_state = USB_CHARGER_PRESENT;
|
|
}
|
|
} else {
|
|
usb_phy->chg_state = USB_CHARGER_ABSENT;
|
|
usb_phy->chg_type = UNKNOWN_TYPE;
|
|
}
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(imx_usbmisc_charger_detection);
|
|
|
|
static const struct of_device_id usbmisc_imx_dt_ids[] = {
|
|
{
|
|
.compatible = "fsl,imx25-usbmisc",
|
|
.data = &imx25_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx35-usbmisc",
|
|
.data = &imx25_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx27-usbmisc",
|
|
.data = &imx27_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx51-usbmisc",
|
|
.data = &imx51_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx53-usbmisc",
|
|
.data = &imx53_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx6q-usbmisc",
|
|
.data = &imx6q_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,vf610-usbmisc",
|
|
.data = &vf610_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx6sx-usbmisc",
|
|
.data = &imx6sx_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx6ul-usbmisc",
|
|
.data = &imx6sx_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx7d-usbmisc",
|
|
.data = &imx7d_usbmisc_ops,
|
|
},
|
|
{
|
|
.compatible = "fsl,imx7ulp-usbmisc",
|
|
.data = &imx7ulp_usbmisc_ops,
|
|
},
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, usbmisc_imx_dt_ids);
|
|
|
|
static int usbmisc_imx_probe(struct platform_device *pdev)
|
|
{
|
|
struct imx_usbmisc *data;
|
|
|
|
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
spin_lock_init(&data->lock);
|
|
|
|
data->base = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(data->base))
|
|
return PTR_ERR(data->base);
|
|
|
|
data->ops = of_device_get_match_data(&pdev->dev);
|
|
platform_set_drvdata(pdev, data);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int usbmisc_imx_remove(struct platform_device *pdev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver usbmisc_imx_driver = {
|
|
.probe = usbmisc_imx_probe,
|
|
.remove = usbmisc_imx_remove,
|
|
.driver = {
|
|
.name = "usbmisc_imx",
|
|
.of_match_table = usbmisc_imx_dt_ids,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(usbmisc_imx_driver);
|
|
|
|
MODULE_ALIAS("platform:usbmisc-imx");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("driver for imx usb non-core registers");
|
|
MODULE_AUTHOR("Richard Zhao <richard.zhao@freescale.com>");
|