324 строки
9.3 KiB
C
324 строки
9.3 KiB
C
#ifndef _ASM_POWERPC_PGTABLE_RADIX_H
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#define _ASM_POWERPC_PGTABLE_RADIX_H
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#ifndef __ASSEMBLY__
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#include <asm/cmpxchg.h>
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#endif
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#ifdef CONFIG_PPC_64K_PAGES
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#include <asm/book3s/64/radix-64k.h>
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#else
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#include <asm/book3s/64/radix-4k.h>
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#endif
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/*
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* For P9 DD1 only, we need to track whether the pte's huge.
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*/
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#define R_PAGE_LARGE _RPAGE_RSV1
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#ifndef __ASSEMBLY__
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#include <asm/book3s/64/tlbflush-radix.h>
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#include <asm/cpu_has_feature.h>
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#endif
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/* An empty PTE can still have a R or C writeback */
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#define RADIX_PTE_NONE_MASK (_PAGE_DIRTY | _PAGE_ACCESSED)
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/* Bits to set in a RPMD/RPUD/RPGD */
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#define RADIX_PMD_VAL_BITS (0x8000000000000000UL | RADIX_PTE_INDEX_SIZE)
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#define RADIX_PUD_VAL_BITS (0x8000000000000000UL | RADIX_PMD_INDEX_SIZE)
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#define RADIX_PGD_VAL_BITS (0x8000000000000000UL | RADIX_PUD_INDEX_SIZE)
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/* Don't have anything in the reserved bits and leaf bits */
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#define RADIX_PMD_BAD_BITS 0x60000000000000e0UL
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#define RADIX_PUD_BAD_BITS 0x60000000000000e0UL
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#define RADIX_PGD_BAD_BITS 0x60000000000000e0UL
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/*
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* Size of EA range mapped by our pagetables.
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*/
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#define RADIX_PGTABLE_EADDR_SIZE (RADIX_PTE_INDEX_SIZE + RADIX_PMD_INDEX_SIZE + \
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RADIX_PUD_INDEX_SIZE + RADIX_PGD_INDEX_SIZE + PAGE_SHIFT)
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#define RADIX_PGTABLE_RANGE (ASM_CONST(1) << RADIX_PGTABLE_EADDR_SIZE)
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/*
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* We support 52 bit address space, Use top bit for kernel
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* virtual mapping. Also make sure kernel fit in the top
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* quadrant.
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*
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* +------------------+
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* +------------------+ Kernel virtual map (0xc008000000000000)
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* | |
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* | |
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* | |
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* 0b11......+------------------+ Kernel linear map (0xc....)
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* | |
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* | 2 quadrant |
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* | |
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* 0b10......+------------------+
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* | |
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* | 1 quadrant |
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* | |
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* 0b01......+------------------+
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* | |
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* | 0 quadrant |
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* | |
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* 0b00......+------------------+
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*
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*
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* 3rd quadrant expanded:
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* +------------------------------+
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* | |
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* | |
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* | |
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* +------------------------------+ Kernel IO map end (0xc010000000000000)
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* | |
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* | |
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* | 1/2 of virtual map |
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* | |
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* | |
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* +------------------------------+ Kernel IO map start
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* | |
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* | 1/4 of virtual map |
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* | |
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* +------------------------------+ Kernel vmemap start
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* | |
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* | 1/4 of virtual map |
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* | |
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* +------------------------------+ Kernel virt start (0xc008000000000000)
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* | |
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* | |
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* | |
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* +------------------------------+ Kernel linear (0xc.....)
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*/
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#define RADIX_KERN_VIRT_START ASM_CONST(0xc008000000000000)
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#define RADIX_KERN_VIRT_SIZE ASM_CONST(0x0008000000000000)
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/*
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* The vmalloc space starts at the beginning of that region, and
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* occupies a quarter of it on radix config.
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* (we keep a quarter for the virtual memmap)
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*/
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#define RADIX_VMALLOC_START RADIX_KERN_VIRT_START
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#define RADIX_VMALLOC_SIZE (RADIX_KERN_VIRT_SIZE >> 2)
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#define RADIX_VMALLOC_END (RADIX_VMALLOC_START + RADIX_VMALLOC_SIZE)
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/*
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* Defines the address of the vmemap area, in its own region on
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* hash table CPUs.
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*/
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#define RADIX_VMEMMAP_BASE (RADIX_VMALLOC_END)
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#ifndef __ASSEMBLY__
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#define RADIX_PTE_TABLE_SIZE (sizeof(pte_t) << RADIX_PTE_INDEX_SIZE)
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#define RADIX_PMD_TABLE_SIZE (sizeof(pmd_t) << RADIX_PMD_INDEX_SIZE)
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#define RADIX_PUD_TABLE_SIZE (sizeof(pud_t) << RADIX_PUD_INDEX_SIZE)
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#define RADIX_PGD_TABLE_SIZE (sizeof(pgd_t) << RADIX_PGD_INDEX_SIZE)
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#ifdef CONFIG_STRICT_KERNEL_RWX
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extern void radix__mark_rodata_ro(void);
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extern void radix__mark_initmem_nx(void);
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#endif
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static inline unsigned long __radix_pte_update(pte_t *ptep, unsigned long clr,
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unsigned long set)
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{
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pte_t pte;
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unsigned long old_pte, new_pte;
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do {
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pte = READ_ONCE(*ptep);
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old_pte = pte_val(pte);
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new_pte = (old_pte | set) & ~clr;
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} while (!pte_xchg(ptep, __pte(old_pte), __pte(new_pte)));
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return old_pte;
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}
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static inline unsigned long radix__pte_update(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep, unsigned long clr,
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unsigned long set,
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int huge)
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{
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unsigned long old_pte;
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if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
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unsigned long new_pte;
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old_pte = __radix_pte_update(ptep, ~0ul, 0);
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/*
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* new value of pte
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*/
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new_pte = (old_pte | set) & ~clr;
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radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
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if (new_pte)
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__radix_pte_update(ptep, 0, new_pte);
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} else
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old_pte = __radix_pte_update(ptep, clr, set);
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if (!huge)
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assert_pte_locked(mm, addr);
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return old_pte;
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}
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static inline pte_t radix__ptep_get_and_clear_full(struct mm_struct *mm,
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unsigned long addr,
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pte_t *ptep, int full)
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{
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unsigned long old_pte;
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if (full) {
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/*
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* If we are trying to clear the pte, we can skip
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* the DD1 pte update sequence and batch the tlb flush. The
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* tlb flush batching is done by mmu gather code. We
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* still keep the cmp_xchg update to make sure we get
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* correct R/C bit which might be updated via Nest MMU.
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*/
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old_pte = __radix_pte_update(ptep, ~0ul, 0);
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} else
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old_pte = radix__pte_update(mm, addr, ptep, ~0ul, 0, 0);
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return __pte(old_pte);
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}
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/*
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* Set the dirty and/or accessed bits atomically in a linux PTE, this
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* function doesn't need to invalidate tlb.
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*/
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static inline void radix__ptep_set_access_flags(struct mm_struct *mm,
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pte_t *ptep, pte_t entry,
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unsigned long address)
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{
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unsigned long set = pte_val(entry) & (_PAGE_DIRTY | _PAGE_ACCESSED |
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_PAGE_RW | _PAGE_EXEC);
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if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
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unsigned long old_pte, new_pte;
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old_pte = __radix_pte_update(ptep, ~0, 0);
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/*
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* new value of pte
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*/
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new_pte = old_pte | set;
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radix__flush_tlb_pte_p9_dd1(old_pte, mm, address);
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__radix_pte_update(ptep, 0, new_pte);
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} else
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__radix_pte_update(ptep, 0, set);
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asm volatile("ptesync" : : : "memory");
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}
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static inline int radix__pte_same(pte_t pte_a, pte_t pte_b)
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{
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return ((pte_raw(pte_a) ^ pte_raw(pte_b)) == 0);
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}
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static inline int radix__pte_none(pte_t pte)
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{
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return (pte_val(pte) & ~RADIX_PTE_NONE_MASK) == 0;
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}
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static inline void radix__set_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pte, int percpu)
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{
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*ptep = pte;
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asm volatile("ptesync" : : : "memory");
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}
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static inline int radix__pmd_bad(pmd_t pmd)
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{
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return !!(pmd_val(pmd) & RADIX_PMD_BAD_BITS);
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}
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static inline int radix__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
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{
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return ((pmd_raw(pmd_a) ^ pmd_raw(pmd_b)) == 0);
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}
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static inline int radix__pud_bad(pud_t pud)
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{
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return !!(pud_val(pud) & RADIX_PUD_BAD_BITS);
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}
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static inline int radix__pgd_bad(pgd_t pgd)
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{
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return !!(pgd_val(pgd) & RADIX_PGD_BAD_BITS);
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static inline int radix__pmd_trans_huge(pmd_t pmd)
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{
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return (pmd_val(pmd) & (_PAGE_PTE | _PAGE_DEVMAP)) == _PAGE_PTE;
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}
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static inline pmd_t radix__pmd_mkhuge(pmd_t pmd)
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{
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if (cpu_has_feature(CPU_FTR_POWER9_DD1))
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return __pmd(pmd_val(pmd) | _PAGE_PTE | R_PAGE_LARGE);
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return __pmd(pmd_val(pmd) | _PAGE_PTE);
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}
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static inline void radix__pmdp_huge_split_prepare(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp)
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{
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/* Nothing to do for radix. */
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return;
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}
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extern unsigned long radix__pmd_hugepage_update(struct mm_struct *mm, unsigned long addr,
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pmd_t *pmdp, unsigned long clr,
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unsigned long set);
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extern pmd_t radix__pmdp_collapse_flush(struct vm_area_struct *vma,
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unsigned long address, pmd_t *pmdp);
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extern void radix__pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
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pgtable_t pgtable);
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extern pgtable_t radix__pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
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extern pmd_t radix__pmdp_huge_get_and_clear(struct mm_struct *mm,
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unsigned long addr, pmd_t *pmdp);
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extern int radix__has_transparent_hugepage(void);
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#endif
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extern int __meminit radix__vmemmap_create_mapping(unsigned long start,
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unsigned long page_size,
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unsigned long phys);
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extern void radix__vmemmap_remove_mapping(unsigned long start,
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unsigned long page_size);
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extern int radix__map_kernel_page(unsigned long ea, unsigned long pa,
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pgprot_t flags, unsigned int psz);
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static inline unsigned long radix__get_tree_size(void)
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{
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unsigned long rts_field;
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/*
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* We support 52 bits, hence:
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* DD1 52-28 = 24, 0b11000
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* Others 52-31 = 21, 0b10101
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* RTS encoding details
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* bits 0 - 3 of rts -> bits 6 - 8 unsigned long
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* bits 4 - 5 of rts -> bits 62 - 63 of unsigned long
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*/
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if (cpu_has_feature(CPU_FTR_POWER9_DD1))
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rts_field = (0x3UL << 61);
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else {
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rts_field = (0x5UL << 5); /* 6 - 8 bits */
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rts_field |= (0x2UL << 61);
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}
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return rts_field;
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}
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#ifdef CONFIG_MEMORY_HOTPLUG
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int radix__create_section_mapping(unsigned long start, unsigned long end);
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int radix__remove_section_mapping(unsigned long start, unsigned long end);
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#endif /* CONFIG_MEMORY_HOTPLUG */
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#endif /* __ASSEMBLY__ */
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#endif
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