Linus Torvalds d590b2d4bf A few driver fixes for tegra, rockchip, and st SoCs and a two-liner ... in the framework to avoid oops when get_parent ops return out of range values on tegra platforms. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCAAGBQJV/dywAAoJENidgRMleOc9aswP/igiC+sxxh9T3RaEjii1CMnc 7ivgjPziIKVQEUGQGe2iUiFoqjJtkzcXt4wxK8WfQLEyYwT9QoPETaskreyRlmg3 bPt977Uuxoef1iTy8WhOWZiIjrEnh8nREkrGjKdzSoYaZ0RM8rF45ES89ccNk76i C87SfuazNto2+TchPmvxfmMBm+usDvzFGKbpIMd7BcB9HWU1T2JQ4+2OLm7rY8Rp A9JCct7FvJDcGFBMhgwh9k2qjcCZp803+HA2pup3/Yjnm+nSvO8ucAlhzN4heK5v ftytWX72JHIB1qlvBgxKpbfL+uVZ+4zr1FvhxLFGlzIt3/q+/c6DKNb3AOAooIH1 SsuhEH7g3/JG/rcM6KyOxFGLDpBowU+7jQKn1YNlX2PUXf72JfrO+hhNNo8NOUHi SRaikkygaWMVlaGVZ75vNuvTTsttaundjuowK+hXaVx0dX1+CE36S4dTbNA8z2Xp mbhHsU0hY9dhPfglkucTnEbMlM/g7HJgL76ICbw7K2zJLUy1euGIBiusBZDC6v1z FEjc94rIwdFkwZUiKtAVZ/0S2ncqKA76CmZ6c0hwtrofZgkx6lx0nZXN1U9SlHL4 G6makJSa/3qn8aFEi5F6H69eKE0rI3S8WCdMuZU5n47T5CGegrjYy/CHAjV7tdnp mwuntrbFbLuUVsYLQIWr =LSuc -----END PGP SIGNATURE----- Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk fixes from Stephen Boyd: "A few driver fixes for tegra, rockchip, and st SoCs and a two-liner in the framework to avoid oops when get_parent ops return out of range values on tegra platforms" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x clk: check for invalid parent index of orphans in __clk_init() clk: tegra: dfll: Properly protect OPP list clk: rockchip: add critical clock for rk3368		2015-09-19 20:17:40 -07:00
..
Makefile	clk: rockchip: add rk3368 clock controller	2015-07-06 15:09:22 -07:00
clk-cpu.c	clk: rockchip: Properly include clk.h	2015-07-20 11:11:10 -07:00
clk-inverter.c	clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)	2015-08-24 16:49:12 -07:00
clk-mmc-phase.c	clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)	2015-08-24 16:49:12 -07:00
clk-pll.c	clk: rockchip: register pll mux before pll itself	2015-08-24 16:49:15 -07:00
clk-rk3188.c	clk: rockchip: Add pclk_peri to critical clocks on RK3066/RK3188	2015-09-10 13:55:30 -07:00
clk-rk3288.c	This is the bulk of pin control changes for the v4.3 development	2015-09-04 10:22:09 -07:00
clk-rk3368.c	clk: rockchip: add critical clock for rk3368	2015-09-14 12:49:39 -07:00
clk-rockchip.c	clk: rockchip: fix function type for CLK_OF_DECLARE	2014-05-20 14:25:22 -05:00
clk.c	clk: rockchip: add support for phase inverters	2015-07-06 15:04:40 -07:00
clk.h	clk: rockchip: Fix PLL bandwidth	2015-07-28 11:59:12 -07:00
softrst.c	clk: rockchip: add reset controller	2014-07-13 12:17:07 -07:00