372 строки
9.7 KiB
C
372 строки
9.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* fireworks_command.c - a part of driver for Fireworks based devices
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*
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* Copyright (c) 2013-2014 Takashi Sakamoto
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*/
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#include "./fireworks.h"
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/*
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* This driver uses transaction version 1 or later to use extended hardware
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* information. Then too old devices are not available.
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*
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* Each commands are not required to have continuous sequence numbers. This
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* number is just used to match command and response.
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*
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* This module support a part of commands. Please see FFADO if you want to see
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* whole commands. But there are some commands which FFADO don't implement.
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*
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* Fireworks also supports AV/C general commands and AV/C Stream Format
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* Information commands. But this module don't use them.
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*/
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#define KERNEL_SEQNUM_MIN (SND_EFW_TRANSACTION_USER_SEQNUM_MAX + 2)
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#define KERNEL_SEQNUM_MAX ((u32)~0)
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/* for clock source and sampling rate */
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struct efc_clock {
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u32 source;
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u32 sampling_rate;
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u32 index;
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};
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/* command categories */
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enum efc_category {
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EFC_CAT_HWINFO = 0,
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EFC_CAT_TRANSPORT = 2,
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EFC_CAT_HWCTL = 3,
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};
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/* hardware info category commands */
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enum efc_cmd_hwinfo {
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EFC_CMD_HWINFO_GET_CAPS = 0,
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EFC_CMD_HWINFO_GET_POLLED = 1,
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EFC_CMD_HWINFO_SET_RESP_ADDR = 2
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};
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enum efc_cmd_transport {
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EFC_CMD_TRANSPORT_SET_TX_MODE = 0
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};
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/* hardware control category commands */
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enum efc_cmd_hwctl {
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EFC_CMD_HWCTL_SET_CLOCK = 0,
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EFC_CMD_HWCTL_GET_CLOCK = 1,
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EFC_CMD_HWCTL_IDENTIFY = 5
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};
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/* return values in response */
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enum efr_status {
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EFR_STATUS_OK = 0,
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EFR_STATUS_BAD = 1,
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EFR_STATUS_BAD_COMMAND = 2,
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EFR_STATUS_COMM_ERR = 3,
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EFR_STATUS_BAD_QUAD_COUNT = 4,
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EFR_STATUS_UNSUPPORTED = 5,
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EFR_STATUS_1394_TIMEOUT = 6,
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EFR_STATUS_DSP_TIMEOUT = 7,
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EFR_STATUS_BAD_RATE = 8,
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EFR_STATUS_BAD_CLOCK = 9,
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EFR_STATUS_BAD_CHANNEL = 10,
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EFR_STATUS_BAD_PAN = 11,
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EFR_STATUS_FLASH_BUSY = 12,
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EFR_STATUS_BAD_MIRROR = 13,
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EFR_STATUS_BAD_LED = 14,
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EFR_STATUS_BAD_PARAMETER = 15,
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EFR_STATUS_INCOMPLETE = 0x80000000
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};
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static const char *const efr_status_names[] = {
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[EFR_STATUS_OK] = "OK",
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[EFR_STATUS_BAD] = "bad",
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[EFR_STATUS_BAD_COMMAND] = "bad command",
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[EFR_STATUS_COMM_ERR] = "comm err",
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[EFR_STATUS_BAD_QUAD_COUNT] = "bad quad count",
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[EFR_STATUS_UNSUPPORTED] = "unsupported",
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[EFR_STATUS_1394_TIMEOUT] = "1394 timeout",
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[EFR_STATUS_DSP_TIMEOUT] = "DSP timeout",
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[EFR_STATUS_BAD_RATE] = "bad rate",
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[EFR_STATUS_BAD_CLOCK] = "bad clock",
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[EFR_STATUS_BAD_CHANNEL] = "bad channel",
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[EFR_STATUS_BAD_PAN] = "bad pan",
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[EFR_STATUS_FLASH_BUSY] = "flash busy",
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[EFR_STATUS_BAD_MIRROR] = "bad mirror",
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[EFR_STATUS_BAD_LED] = "bad LED",
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[EFR_STATUS_BAD_PARAMETER] = "bad parameter",
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[EFR_STATUS_BAD_PARAMETER + 1] = "incomplete"
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};
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static int
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efw_transaction(struct snd_efw *efw, unsigned int category,
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unsigned int command,
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const __be32 *params, unsigned int param_bytes,
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const __be32 *resp, unsigned int resp_bytes)
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{
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struct snd_efw_transaction *header;
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__be32 *buf;
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u32 seqnum;
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unsigned int buf_bytes, cmd_bytes;
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int err;
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/* calculate buffer size*/
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buf_bytes = sizeof(struct snd_efw_transaction) +
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max(param_bytes, resp_bytes);
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/* keep buffer */
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buf = kzalloc(buf_bytes, GFP_KERNEL);
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if (buf == NULL)
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return -ENOMEM;
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/* to keep consistency of sequence number */
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spin_lock(&efw->lock);
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if ((efw->seqnum < KERNEL_SEQNUM_MIN) ||
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(efw->seqnum >= KERNEL_SEQNUM_MAX - 2))
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efw->seqnum = KERNEL_SEQNUM_MIN;
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else
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efw->seqnum += 2;
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seqnum = efw->seqnum;
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spin_unlock(&efw->lock);
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/* fill transaction header fields */
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cmd_bytes = sizeof(struct snd_efw_transaction) + param_bytes;
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header = (struct snd_efw_transaction *)buf;
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header->length = cpu_to_be32(cmd_bytes / sizeof(__be32));
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header->version = cpu_to_be32(1);
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header->seqnum = cpu_to_be32(seqnum);
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header->category = cpu_to_be32(category);
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header->command = cpu_to_be32(command);
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header->status = 0;
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/* fill transaction command parameters */
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memcpy(header->params, params, param_bytes);
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err = snd_efw_transaction_run(efw->unit, buf, cmd_bytes,
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buf, buf_bytes);
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if (err < 0)
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goto end;
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/* check transaction header fields */
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if ((be32_to_cpu(header->version) < 1) ||
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(be32_to_cpu(header->category) != category) ||
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(be32_to_cpu(header->command) != command) ||
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(be32_to_cpu(header->status) != EFR_STATUS_OK)) {
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dev_err(&efw->unit->device, "EFW command failed [%u/%u]: %s\n",
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be32_to_cpu(header->category),
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be32_to_cpu(header->command),
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efr_status_names[be32_to_cpu(header->status)]);
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err = -EIO;
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goto end;
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}
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if (resp == NULL)
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goto end;
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/* fill transaction response parameters */
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memset((void *)resp, 0, resp_bytes);
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resp_bytes = min_t(unsigned int, resp_bytes,
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be32_to_cpu(header->length) * sizeof(__be32) -
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sizeof(struct snd_efw_transaction));
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memcpy((void *)resp, &buf[6], resp_bytes);
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end:
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kfree(buf);
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return err;
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}
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/*
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* The address in host system for transaction response is changable when the
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* device supports. struct hwinfo.flags includes its flag. The default is
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* MEMORY_SPACE_EFW_RESPONSE.
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*/
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int snd_efw_command_set_resp_addr(struct snd_efw *efw,
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u16 addr_high, u32 addr_low)
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{
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__be32 addr[2];
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addr[0] = cpu_to_be32(addr_high);
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addr[1] = cpu_to_be32(addr_low);
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if (!efw->resp_addr_changable)
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return -ENOSYS;
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return efw_transaction(efw, EFC_CAT_HWCTL,
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EFC_CMD_HWINFO_SET_RESP_ADDR,
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addr, sizeof(addr), NULL, 0);
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}
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/*
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* This is for timestamp processing. In Windows mode, all 32bit fields of second
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* CIP header in AMDTP transmit packet is used for 'presentation timestamp'. In
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* 'no data' packet the value of this field is 0x90ffffff.
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*/
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int snd_efw_command_set_tx_mode(struct snd_efw *efw,
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enum snd_efw_transport_mode mode)
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{
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__be32 param = cpu_to_be32(mode);
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return efw_transaction(efw, EFC_CAT_TRANSPORT,
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EFC_CMD_TRANSPORT_SET_TX_MODE,
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¶m, sizeof(param), NULL, 0);
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}
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int snd_efw_command_get_hwinfo(struct snd_efw *efw,
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struct snd_efw_hwinfo *hwinfo)
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{
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int err;
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err = efw_transaction(efw, EFC_CAT_HWINFO,
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EFC_CMD_HWINFO_GET_CAPS,
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NULL, 0, (__be32 *)hwinfo, sizeof(*hwinfo));
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if (err < 0)
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goto end;
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be32_to_cpus(&hwinfo->flags);
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be32_to_cpus(&hwinfo->guid_hi);
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be32_to_cpus(&hwinfo->guid_lo);
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be32_to_cpus(&hwinfo->type);
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be32_to_cpus(&hwinfo->version);
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be32_to_cpus(&hwinfo->supported_clocks);
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be32_to_cpus(&hwinfo->amdtp_rx_pcm_channels);
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be32_to_cpus(&hwinfo->amdtp_tx_pcm_channels);
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be32_to_cpus(&hwinfo->phys_out);
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be32_to_cpus(&hwinfo->phys_in);
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be32_to_cpus(&hwinfo->phys_out_grp_count);
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be32_to_cpus(&hwinfo->phys_in_grp_count);
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be32_to_cpus(&hwinfo->midi_out_ports);
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be32_to_cpus(&hwinfo->midi_in_ports);
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be32_to_cpus(&hwinfo->max_sample_rate);
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be32_to_cpus(&hwinfo->min_sample_rate);
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be32_to_cpus(&hwinfo->dsp_version);
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be32_to_cpus(&hwinfo->arm_version);
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be32_to_cpus(&hwinfo->mixer_playback_channels);
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be32_to_cpus(&hwinfo->mixer_capture_channels);
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be32_to_cpus(&hwinfo->fpga_version);
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be32_to_cpus(&hwinfo->amdtp_rx_pcm_channels_2x);
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be32_to_cpus(&hwinfo->amdtp_tx_pcm_channels_2x);
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be32_to_cpus(&hwinfo->amdtp_rx_pcm_channels_4x);
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be32_to_cpus(&hwinfo->amdtp_tx_pcm_channels_4x);
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/* ensure terminated */
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hwinfo->vendor_name[HWINFO_NAME_SIZE_BYTES - 1] = '\0';
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hwinfo->model_name[HWINFO_NAME_SIZE_BYTES - 1] = '\0';
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end:
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return err;
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}
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int snd_efw_command_get_phys_meters(struct snd_efw *efw,
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struct snd_efw_phys_meters *meters,
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unsigned int len)
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{
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u32 *buf = (u32 *)meters;
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unsigned int i;
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int err;
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err = efw_transaction(efw, EFC_CAT_HWINFO,
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EFC_CMD_HWINFO_GET_POLLED,
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NULL, 0, (__be32 *)meters, len);
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if (err >= 0)
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for (i = 0; i < len / sizeof(u32); i++)
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be32_to_cpus(&buf[i]);
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return err;
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}
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static int
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command_get_clock(struct snd_efw *efw, struct efc_clock *clock)
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{
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int err;
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err = efw_transaction(efw, EFC_CAT_HWCTL,
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EFC_CMD_HWCTL_GET_CLOCK,
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NULL, 0,
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(__be32 *)clock, sizeof(struct efc_clock));
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if (err >= 0) {
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be32_to_cpus(&clock->source);
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be32_to_cpus(&clock->sampling_rate);
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be32_to_cpus(&clock->index);
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}
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return err;
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}
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/* give UINT_MAX if set nothing */
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static int
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command_set_clock(struct snd_efw *efw,
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unsigned int source, unsigned int rate)
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{
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struct efc_clock clock = {0};
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int err;
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/* check arguments */
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if ((source == UINT_MAX) && (rate == UINT_MAX)) {
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err = -EINVAL;
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goto end;
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}
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/* get current status */
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err = command_get_clock(efw, &clock);
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if (err < 0)
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goto end;
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/* no need */
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if ((clock.source == source) && (clock.sampling_rate == rate))
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goto end;
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/* set params */
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if ((source != UINT_MAX) && (clock.source != source))
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clock.source = source;
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if ((rate != UINT_MAX) && (clock.sampling_rate != rate))
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clock.sampling_rate = rate;
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clock.index = 0;
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cpu_to_be32s(&clock.source);
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cpu_to_be32s(&clock.sampling_rate);
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cpu_to_be32s(&clock.index);
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err = efw_transaction(efw, EFC_CAT_HWCTL,
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EFC_CMD_HWCTL_SET_CLOCK,
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(__be32 *)&clock, sizeof(struct efc_clock),
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NULL, 0);
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if (err < 0)
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goto end;
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/*
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* With firmware version 5.8, just after changing clock state, these
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* parameters are not immediately retrieved by get command. In my
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* trial, there needs to be 100msec to get changed parameters.
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*/
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msleep(150);
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end:
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return err;
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}
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int snd_efw_command_get_clock_source(struct snd_efw *efw,
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enum snd_efw_clock_source *source)
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{
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int err;
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struct efc_clock clock = {0};
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err = command_get_clock(efw, &clock);
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if (err >= 0)
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*source = clock.source;
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return err;
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}
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int snd_efw_command_get_sampling_rate(struct snd_efw *efw, unsigned int *rate)
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{
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int err;
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struct efc_clock clock = {0};
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err = command_get_clock(efw, &clock);
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if (err >= 0)
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*rate = clock.sampling_rate;
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return err;
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}
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int snd_efw_command_set_sampling_rate(struct snd_efw *efw, unsigned int rate)
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{
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return command_set_clock(efw, UINT_MAX, rate);
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}
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