Matt Redfearn 5c33f8b2e5 MIPS: Add definitions of SegCtl registers and use them ... The SegCtl registers are standard for MIPSr3..MIPSr5. Add definitions of these registers and use them rather than constants Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: Chris Packham <judge.packham@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13290/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2016-05-28 12:35:04 +02:00
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cpu-feature-overrides.h	MIPS: Whitespace cleanup.	2013-02-01 10:00:22 +01:00
irq.h	irqchip: mips-gic: Probe for number of external interrupts	2014-11-24 07:44:56 +01:00
kernel-entry-init.h	MIPS: Add definitions of SegCtl registers and use them	2016-05-28 12:35:04 +02:00
mach-gt64120.h	MIPS: Whitespace cleanup.	2013-02-01 10:00:22 +01:00
malta-dtshim.h	MIPS: Malta: Setup RAM regions via DT	2015-11-11 08:35:47 +01:00
malta-pm.h	MIPS: Malta: add suspend state entry code	2014-05-30 21:01:09 +02:00
mc146818rtc.h	MIPS: Move headfiles to new location below arch/mips/include	2008-10-11 16:18:52 +01:00
spaces.h	MIPS: malta: spaces.h: Add spaces.h file for Malta (EVA)	2014-03-26 23:09:19 +01:00
war.h	MIPS: PMC-Sierra Yosemite: Remove support.	2012-12-13 18:15:30 +01:00