476 строки
14 KiB
C
476 строки
14 KiB
C
#ifndef __marb_defs_h
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#define __marb_defs_h
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/*
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* This file is autogenerated from
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* file: ../../inst/memarb/rtl/guinness/marb_top.r
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* id: <not found>
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* last modfied: Mon Apr 11 16:12:16 2005
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
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* id: $Id: marb_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope marb */
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#define STRIDE_marb_rw_int_slots 4
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/* Register rw_int_slots, scope marb, type rw */
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typedef struct {
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unsigned int owner : 4;
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unsigned int dummy1 : 28;
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} reg_marb_rw_int_slots;
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#define REG_RD_ADDR_marb_rw_int_slots 0
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#define REG_WR_ADDR_marb_rw_int_slots 0
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#define STRIDE_marb_rw_ext_slots 4
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/* Register rw_ext_slots, scope marb, type rw */
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typedef struct {
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unsigned int owner : 4;
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unsigned int dummy1 : 28;
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} reg_marb_rw_ext_slots;
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#define REG_RD_ADDR_marb_rw_ext_slots 256
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#define REG_WR_ADDR_marb_rw_ext_slots 256
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#define STRIDE_marb_rw_regs_slots 4
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/* Register rw_regs_slots, scope marb, type rw */
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typedef struct {
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unsigned int owner : 4;
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unsigned int dummy1 : 28;
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} reg_marb_rw_regs_slots;
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#define REG_RD_ADDR_marb_rw_regs_slots 512
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#define REG_WR_ADDR_marb_rw_regs_slots 512
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/* Register rw_intr_mask, scope marb, type rw */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_rw_intr_mask;
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#define REG_RD_ADDR_marb_rw_intr_mask 528
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#define REG_WR_ADDR_marb_rw_intr_mask 528
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/* Register rw_ack_intr, scope marb, type rw */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_rw_ack_intr;
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#define REG_RD_ADDR_marb_rw_ack_intr 532
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#define REG_WR_ADDR_marb_rw_ack_intr 532
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/* Register r_intr, scope marb, type r */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_r_intr;
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#define REG_RD_ADDR_marb_r_intr 536
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/* Register r_masked_intr, scope marb, type r */
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typedef struct {
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unsigned int bp0 : 1;
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unsigned int bp1 : 1;
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unsigned int bp2 : 1;
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unsigned int bp3 : 1;
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unsigned int dummy1 : 28;
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} reg_marb_r_masked_intr;
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#define REG_RD_ADDR_marb_r_masked_intr 540
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/* Register rw_stop_mask, scope marb, type rw */
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typedef struct {
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma8 : 1;
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unsigned int dma9 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int slave : 1;
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unsigned int dummy1 : 18;
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} reg_marb_rw_stop_mask;
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#define REG_RD_ADDR_marb_rw_stop_mask 544
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#define REG_WR_ADDR_marb_rw_stop_mask 544
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/* Register r_stopped, scope marb, type r */
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typedef struct {
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma8 : 1;
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unsigned int dma9 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int slave : 1;
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unsigned int dummy1 : 18;
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} reg_marb_r_stopped;
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#define REG_RD_ADDR_marb_r_stopped 548
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/* Register rw_no_snoop, scope marb, type rw */
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typedef struct {
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma8 : 1;
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unsigned int dma9 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int slave : 1;
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unsigned int dummy1 : 18;
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} reg_marb_rw_no_snoop;
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#define REG_RD_ADDR_marb_rw_no_snoop 832
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#define REG_WR_ADDR_marb_rw_no_snoop 832
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/* Register rw_no_snoop_rq, scope marb, type rw */
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typedef struct {
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unsigned int dummy1 : 10;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int dummy2 : 20;
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} reg_marb_rw_no_snoop_rq;
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#define REG_RD_ADDR_marb_rw_no_snoop_rq 836
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#define REG_WR_ADDR_marb_rw_no_snoop_rq 836
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/* Constants */
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enum {
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regk_marb_cpud = 0x0000000b,
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regk_marb_cpui = 0x0000000a,
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regk_marb_dma0 = 0x00000000,
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regk_marb_dma1 = 0x00000001,
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regk_marb_dma2 = 0x00000002,
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regk_marb_dma3 = 0x00000003,
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regk_marb_dma4 = 0x00000004,
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regk_marb_dma5 = 0x00000005,
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regk_marb_dma6 = 0x00000006,
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regk_marb_dma7 = 0x00000007,
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regk_marb_dma8 = 0x00000008,
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regk_marb_dma9 = 0x00000009,
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regk_marb_iop = 0x0000000c,
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regk_marb_no = 0x00000000,
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regk_marb_r_stopped_default = 0x00000000,
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regk_marb_rw_ext_slots_default = 0x00000000,
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regk_marb_rw_ext_slots_size = 0x00000040,
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regk_marb_rw_int_slots_default = 0x00000000,
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regk_marb_rw_int_slots_size = 0x00000040,
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regk_marb_rw_intr_mask_default = 0x00000000,
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regk_marb_rw_no_snoop_default = 0x00000000,
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regk_marb_rw_no_snoop_rq_default = 0x00000000,
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regk_marb_rw_regs_slots_default = 0x00000000,
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regk_marb_rw_regs_slots_size = 0x00000004,
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regk_marb_rw_stop_mask_default = 0x00000000,
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regk_marb_slave = 0x0000000d,
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regk_marb_yes = 0x00000001
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};
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#endif /* __marb_defs_h */
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#ifndef __marb_bp_defs_h
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#define __marb_bp_defs_h
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/*
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* This file is autogenerated from
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* file: ../../inst/memarb/rtl/guinness/marb_top.r
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* id: <not found>
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* last modfied: Mon Apr 11 16:12:16 2005
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*
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* by /n/asic/design/tools/rdesc/src/rdes2c --outfile marb_defs.h ../../inst/memarb/rtl/guinness/marb_top.r
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* id: $Id: marb_defs.h,v 1.3 2005/04/24 18:30:58 starvik Exp $
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* Any changes here will be lost.
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*
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* -*- buffer-read-only: t -*-
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*/
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/* Main access macros */
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#ifndef REG_RD
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#define REG_RD( scope, inst, reg ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR
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#define REG_WR( scope, inst, reg, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_VECT
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#define REG_RD_VECT( scope, inst, reg, index ) \
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REG_READ( reg_##scope##_##reg, \
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(inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_VECT
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#define REG_WR_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( reg_##scope##_##reg, \
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(inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT
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#define REG_RD_INT( scope, inst, reg ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT
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#define REG_WR_INT( scope, inst, reg, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
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#endif
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#ifndef REG_RD_INT_VECT
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#define REG_RD_INT_VECT( scope, inst, reg, index ) \
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REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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#ifndef REG_WR_INT_VECT
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#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
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REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg, (val) )
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#endif
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#ifndef REG_TYPE_CONV
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#define REG_TYPE_CONV( type, orgtype, val ) \
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( { union { orgtype o; type n; } r; r.o = val; r.n; } )
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#endif
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#ifndef reg_page_size
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#define reg_page_size 8192
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#endif
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#ifndef REG_ADDR
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#define REG_ADDR( scope, inst, reg ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg )
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#endif
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#ifndef REG_ADDR_VECT
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#define REG_ADDR_VECT( scope, inst, reg, index ) \
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( (inst) + REG_RD_ADDR_##scope##_##reg + \
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(index) * STRIDE_##scope##_##reg )
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#endif
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/* C-code for register scope marb_bp */
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/* Register rw_first_addr, scope marb_bp, type rw */
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typedef unsigned int reg_marb_bp_rw_first_addr;
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#define REG_RD_ADDR_marb_bp_rw_first_addr 0
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#define REG_WR_ADDR_marb_bp_rw_first_addr 0
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/* Register rw_last_addr, scope marb_bp, type rw */
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typedef unsigned int reg_marb_bp_rw_last_addr;
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#define REG_RD_ADDR_marb_bp_rw_last_addr 4
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#define REG_WR_ADDR_marb_bp_rw_last_addr 4
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/* Register rw_op, scope marb_bp, type rw */
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typedef struct {
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unsigned int rd : 1;
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unsigned int wr : 1;
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unsigned int rd_excl : 1;
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unsigned int pri_wr : 1;
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unsigned int us_rd : 1;
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unsigned int us_wr : 1;
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unsigned int us_rd_excl : 1;
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unsigned int us_pri_wr : 1;
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unsigned int dummy1 : 24;
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} reg_marb_bp_rw_op;
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#define REG_RD_ADDR_marb_bp_rw_op 8
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#define REG_WR_ADDR_marb_bp_rw_op 8
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/* Register rw_clients, scope marb_bp, type rw */
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typedef struct {
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma8 : 1;
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unsigned int dma9 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int slave : 1;
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unsigned int dummy1 : 18;
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} reg_marb_bp_rw_clients;
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#define REG_RD_ADDR_marb_bp_rw_clients 12
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#define REG_WR_ADDR_marb_bp_rw_clients 12
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/* Register rw_options, scope marb_bp, type rw */
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typedef struct {
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unsigned int wrap : 1;
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unsigned int dummy1 : 31;
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} reg_marb_bp_rw_options;
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#define REG_RD_ADDR_marb_bp_rw_options 16
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#define REG_WR_ADDR_marb_bp_rw_options 16
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/* Register r_brk_addr, scope marb_bp, type r */
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typedef unsigned int reg_marb_bp_r_brk_addr;
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#define REG_RD_ADDR_marb_bp_r_brk_addr 20
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/* Register r_brk_op, scope marb_bp, type r */
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typedef struct {
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unsigned int rd : 1;
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unsigned int wr : 1;
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unsigned int rd_excl : 1;
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unsigned int pri_wr : 1;
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unsigned int us_rd : 1;
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unsigned int us_wr : 1;
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unsigned int us_rd_excl : 1;
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unsigned int us_pri_wr : 1;
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unsigned int dummy1 : 24;
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} reg_marb_bp_r_brk_op;
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#define REG_RD_ADDR_marb_bp_r_brk_op 24
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/* Register r_brk_clients, scope marb_bp, type r */
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typedef struct {
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma8 : 1;
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unsigned int dma9 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int slave : 1;
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unsigned int dummy1 : 18;
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} reg_marb_bp_r_brk_clients;
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#define REG_RD_ADDR_marb_bp_r_brk_clients 28
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/* Register r_brk_first_client, scope marb_bp, type r */
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typedef struct {
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unsigned int dma0 : 1;
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unsigned int dma1 : 1;
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unsigned int dma2 : 1;
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unsigned int dma3 : 1;
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unsigned int dma4 : 1;
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unsigned int dma5 : 1;
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unsigned int dma6 : 1;
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unsigned int dma7 : 1;
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unsigned int dma8 : 1;
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unsigned int dma9 : 1;
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unsigned int cpui : 1;
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unsigned int cpud : 1;
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unsigned int iop : 1;
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unsigned int slave : 1;
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unsigned int dummy1 : 18;
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} reg_marb_bp_r_brk_first_client;
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#define REG_RD_ADDR_marb_bp_r_brk_first_client 32
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/* Register r_brk_size, scope marb_bp, type r */
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typedef unsigned int reg_marb_bp_r_brk_size;
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#define REG_RD_ADDR_marb_bp_r_brk_size 36
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/* Register rw_ack, scope marb_bp, type rw */
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typedef unsigned int reg_marb_bp_rw_ack;
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#define REG_RD_ADDR_marb_bp_rw_ack 40
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#define REG_WR_ADDR_marb_bp_rw_ack 40
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/* Constants */
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enum {
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regk_marb_bp_no = 0x00000000,
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regk_marb_bp_rw_op_default = 0x00000000,
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regk_marb_bp_rw_options_default = 0x00000000,
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regk_marb_bp_yes = 0x00000001
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};
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#endif /* __marb_bp_defs_h */
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