624 строки
18 KiB
C
624 строки
18 KiB
C
/*
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* Routines for control of the CS8427 via i2c bus
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* IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
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* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/bitrev.h>
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#include <linux/module.h>
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#include <asm/unaligned.h>
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#include <sound/core.h>
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#include <sound/control.h>
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#include <sound/pcm.h>
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#include <sound/cs8427.h>
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#include <sound/asoundef.h>
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static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
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MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
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MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
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MODULE_LICENSE("GPL");
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#define CS8427_ADDR (0x20>>1) /* fixed address */
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struct cs8427_stream {
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struct snd_pcm_substream *substream;
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char hw_status[24]; /* hardware status */
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char def_status[24]; /* default status */
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char pcm_status[24]; /* PCM private status */
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char hw_udata[32];
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struct snd_kcontrol *pcm_ctl;
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};
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struct cs8427 {
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unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
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unsigned int rate;
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unsigned int reset_timeout;
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struct cs8427_stream playback;
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struct cs8427_stream capture;
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};
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int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
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unsigned char val)
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{
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int err;
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unsigned char buf[2];
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buf[0] = reg & 0x7f;
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buf[1] = val;
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if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
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snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
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"to CS8427 (%i)\n", buf[0], buf[1], err);
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return err < 0 ? err : -EIO;
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}
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return 0;
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}
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EXPORT_SYMBOL(snd_cs8427_reg_write);
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static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
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{
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int err;
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unsigned char buf;
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if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
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snd_printk(KERN_ERR "unable to send register 0x%x byte "
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"to CS8427\n", reg);
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return err < 0 ? err : -EIO;
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}
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if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
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snd_printk(KERN_ERR "unable to read register 0x%x byte "
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"from CS8427\n", reg);
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return err < 0 ? err : -EIO;
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}
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return buf;
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}
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static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
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{
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struct cs8427 *chip = device->private_data;
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int err;
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udata = udata ? CS8427_BSEL : 0;
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if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
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chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
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chip->regmap[CS8427_REG_CSDATABUF] |= udata;
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err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
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chip->regmap[CS8427_REG_CSDATABUF]);
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if (err < 0)
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return err;
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}
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return 0;
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}
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static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
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int udata,
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unsigned char *ndata,
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int count)
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{
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struct cs8427 *chip = device->private_data;
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char *hw_data = udata ?
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chip->playback.hw_udata : chip->playback.hw_status;
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char data[32];
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int err, idx;
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if (!memcmp(hw_data, ndata, count))
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return 0;
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if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
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return err;
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memcpy(hw_data, ndata, count);
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if (udata) {
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memset(data, 0, sizeof(data));
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if (memcmp(hw_data, data, count) == 0) {
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chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
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chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
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CS8427_EFTUI;
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err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
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chip->regmap[CS8427_REG_UDATABUF]);
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return err < 0 ? err : 0;
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}
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}
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data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
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for (idx = 0; idx < count; idx++)
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data[idx + 1] = bitrev8(ndata[idx]);
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if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
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return -EIO;
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return 1;
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}
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static void snd_cs8427_free(struct snd_i2c_device *device)
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{
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kfree(device->private_data);
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}
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int snd_cs8427_init(struct snd_i2c_bus *bus,
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struct snd_i2c_device *device)
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{
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static unsigned char initvals1[] = {
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CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
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/* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
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TCBL=output */
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CS8427_SWCLK | CS8427_TCBLDIR,
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/* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
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normal stereo operation */
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0x00,
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/* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
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Rx=>serial */
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CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
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/* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
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output time base = OMCK, input time base = recovered input clock,
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recovered input clock source is ILRCK changed to AES3INPUT
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(workaround, see snd_cs8427_reset) */
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CS8427_RXDILRCK,
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/* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
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24-bit, 64*Fsi */
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CS8427_SIDEL | CS8427_SILRPOL,
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/* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
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= I2S, 24-bit, 64*Fsi */
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CS8427_SODEL | CS8427_SOLRPOL,
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};
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static unsigned char initvals2[] = {
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CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
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/* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
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biphase, parity status bits */
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/* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
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0xff, /* set everything */
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/* CS8427_REG_CSDATABUF:
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Registers 32-55 window to CS buffer
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Inhibit D->E transfers from overwriting first 5 bytes of CS data.
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Inhibit D->E transfers (all) of CS data.
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Allow E->F transfer of CS data.
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One byte mode; both A/B channels get same written CB data.
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A channel info is output to chip's EMPH* pin. */
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CS8427_CBMR | CS8427_DETCI,
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/* CS8427_REG_UDATABUF:
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Use internal buffer to transmit User (U) data.
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Chip's U pin is an output.
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Transmit all O's for user data.
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Inhibit D->E transfers.
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Inhibit E->F transfers. */
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CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
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};
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struct cs8427 *chip = device->private_data;
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int err;
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unsigned char buf[24];
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snd_i2c_lock(bus);
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err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
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if (err != CS8427_VER8427A) {
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/* give second chance */
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snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
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"let me try again...\n", err);
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err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
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}
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if (err != CS8427_VER8427A) {
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snd_i2c_unlock(bus);
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snd_printk(KERN_ERR "unable to find CS8427 signature "
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"(expected 0x%x, read 0x%x),\n",
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CS8427_VER8427A, err);
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snd_printk(KERN_ERR " initialization is not completed\n");
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return -EFAULT;
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}
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/* turn off run bit while making changes to configuration */
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err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
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if (err < 0)
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goto __fail;
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/* send initial values */
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memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
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if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
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err = err < 0 ? err : -EIO;
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goto __fail;
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}
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/* Turn off CS8427 interrupt stuff that is not used in hardware */
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memset(buf, 0, 7);
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/* from address 9 to 15 */
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buf[0] = 9; /* register */
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if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
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goto __fail;
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/* send transfer initialization sequence */
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memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
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if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
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err = err < 0 ? err : -EIO;
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goto __fail;
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}
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/* write default channel status bytes */
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put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
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memset(buf + 4, 0, 24 - 4);
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if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
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goto __fail;
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memcpy(chip->playback.def_status, buf, 24);
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memcpy(chip->playback.pcm_status, buf, 24);
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snd_i2c_unlock(bus);
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/* turn on run bit and rock'n'roll */
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snd_cs8427_reset(device);
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return 0;
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__fail:
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snd_i2c_unlock(bus);
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return err;
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}
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EXPORT_SYMBOL(snd_cs8427_init);
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int snd_cs8427_create(struct snd_i2c_bus *bus,
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unsigned char addr,
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unsigned int reset_timeout,
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struct snd_i2c_device **r_cs8427)
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{
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int err;
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struct cs8427 *chip;
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struct snd_i2c_device *device;
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err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
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&device);
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if (err < 0)
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return err;
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chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
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if (chip == NULL) {
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snd_i2c_device_free(device);
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return -ENOMEM;
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}
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device->private_free = snd_cs8427_free;
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if (reset_timeout < 1)
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reset_timeout = 1;
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chip->reset_timeout = reset_timeout;
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err = snd_cs8427_init(bus, device);
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if (err)
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goto __fail;
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#if 0 // it's nice for read tests
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{
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char buf[128];
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int xx;
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buf[0] = 0x81;
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snd_i2c_sendbytes(device, buf, 1);
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snd_i2c_readbytes(device, buf, 127);
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for (xx = 0; xx < 127; xx++)
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printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
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}
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#endif
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if (r_cs8427)
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*r_cs8427 = device;
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return 0;
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__fail:
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snd_i2c_device_free(device);
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return err < 0 ? err : -EIO;
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}
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EXPORT_SYMBOL(snd_cs8427_create);
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/*
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* Reset the chip using run bit, also lock PLL using ILRCK and
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* put back AES3INPUT. This workaround is described in latest
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* CS8427 datasheet, otherwise TXDSERIAL will not work.
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*/
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static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
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{
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struct cs8427 *chip;
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unsigned long end_time;
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int data, aes3input = 0;
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if (snd_BUG_ON(!cs8427))
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return;
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chip = cs8427->private_data;
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snd_i2c_lock(cs8427->bus);
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if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
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CS8427_RXDAES3INPUT) /* AES3 bit is set */
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aes3input = 1;
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chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
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snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
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chip->regmap[CS8427_REG_CLOCKSOURCE]);
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udelay(200);
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chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
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snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
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chip->regmap[CS8427_REG_CLOCKSOURCE]);
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udelay(200);
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snd_i2c_unlock(cs8427->bus);
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end_time = jiffies + chip->reset_timeout;
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while (time_after_eq(end_time, jiffies)) {
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snd_i2c_lock(cs8427->bus);
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data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
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snd_i2c_unlock(cs8427->bus);
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if (!(data & CS8427_UNLOCK))
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break;
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schedule_timeout_uninterruptible(1);
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}
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snd_i2c_lock(cs8427->bus);
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chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
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if (aes3input)
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chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
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snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
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chip->regmap[CS8427_REG_CLOCKSOURCE]);
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snd_i2c_unlock(cs8427->bus);
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}
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static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = 255;
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return 0;
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}
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static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
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int data;
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snd_i2c_lock(device->bus);
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data = snd_cs8427_reg_read(device, kcontrol->private_value);
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snd_i2c_unlock(device->bus);
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if (data < 0)
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return data;
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ucontrol->value.integer.value[0] = data;
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return 0;
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}
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static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
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uinfo->count = 10;
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return 0;
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}
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static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
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unsigned char reg = CS8427_REG_QSUBCODE;
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int err;
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snd_i2c_lock(device->bus);
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if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
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snd_printk(KERN_ERR "unable to send register 0x%x byte "
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"to CS8427\n", reg);
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snd_i2c_unlock(device->bus);
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return err < 0 ? err : -EIO;
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}
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err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
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if (err != 10) {
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snd_printk(KERN_ERR "unable to read Q-subcode bytes "
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"from CS8427\n");
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snd_i2c_unlock(device->bus);
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return err < 0 ? err : -EIO;
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}
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snd_i2c_unlock(device->bus);
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return 0;
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}
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static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
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uinfo->count = 1;
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return 0;
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}
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static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
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struct cs8427 *chip = device->private_data;
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snd_i2c_lock(device->bus);
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memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
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snd_i2c_unlock(device->bus);
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return 0;
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}
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static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
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struct cs8427 *chip = device->private_data;
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unsigned char *status = kcontrol->private_value ?
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chip->playback.pcm_status : chip->playback.def_status;
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struct snd_pcm_runtime *runtime = chip->playback.substream ?
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chip->playback.substream->runtime : NULL;
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int err, change;
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snd_i2c_lock(device->bus);
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change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
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memcpy(status, ucontrol->value.iec958.status, 24);
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|
if (change && (kcontrol->private_value ?
|
|
runtime != NULL : runtime == NULL)) {
|
|
err = snd_cs8427_send_corudata(device, 0, status, 24);
|
|
if (err < 0)
|
|
change = err;
|
|
}
|
|
snd_i2c_unlock(device->bus);
|
|
return change;
|
|
}
|
|
|
|
static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
|
|
struct snd_ctl_elem_info *uinfo)
|
|
{
|
|
uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
|
|
uinfo->count = 1;
|
|
return 0;
|
|
}
|
|
|
|
static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
memset(ucontrol->value.iec958.status, 0xff, 24);
|
|
return 0;
|
|
}
|
|
|
|
static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
.info = snd_cs8427_in_status_info,
|
|
.name = "IEC958 CS8427 Input Status",
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READ |
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE),
|
|
.get = snd_cs8427_in_status_get,
|
|
.private_value = 15,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
.info = snd_cs8427_in_status_info,
|
|
.name = "IEC958 CS8427 Error Status",
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READ |
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE),
|
|
.get = snd_cs8427_in_status_get,
|
|
.private_value = 16,
|
|
},
|
|
{
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READ,
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
|
|
.info = snd_cs8427_spdif_mask_info,
|
|
.get = snd_cs8427_spdif_mask_get,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
|
|
.info = snd_cs8427_spdif_info,
|
|
.get = snd_cs8427_spdif_get,
|
|
.put = snd_cs8427_spdif_put,
|
|
.private_value = 0
|
|
},
|
|
{
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
|
|
SNDRV_CTL_ELEM_ACCESS_INACTIVE),
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
.name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
|
|
.info = snd_cs8427_spdif_info,
|
|
.get = snd_cs8427_spdif_get,
|
|
.put = snd_cs8427_spdif_put,
|
|
.private_value = 1
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_PCM,
|
|
.info = snd_cs8427_qsubcode_info,
|
|
.name = "IEC958 Q-subcode Capture Default",
|
|
.access = (SNDRV_CTL_ELEM_ACCESS_READ |
|
|
SNDRV_CTL_ELEM_ACCESS_VOLATILE),
|
|
.get = snd_cs8427_qsubcode_get
|
|
}};
|
|
|
|
int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
|
|
struct snd_pcm_substream *play_substream,
|
|
struct snd_pcm_substream *cap_substream)
|
|
{
|
|
struct cs8427 *chip = cs8427->private_data;
|
|
struct snd_kcontrol *kctl;
|
|
unsigned int idx;
|
|
int err;
|
|
|
|
if (snd_BUG_ON(!play_substream || !cap_substream))
|
|
return -EINVAL;
|
|
for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
|
|
kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
|
|
if (kctl == NULL)
|
|
return -ENOMEM;
|
|
kctl->id.device = play_substream->pcm->device;
|
|
kctl->id.subdevice = play_substream->number;
|
|
err = snd_ctl_add(cs8427->bus->card, kctl);
|
|
if (err < 0)
|
|
return err;
|
|
if (! strcmp(kctl->id.name,
|
|
SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
|
|
chip->playback.pcm_ctl = kctl;
|
|
}
|
|
|
|
chip->playback.substream = play_substream;
|
|
chip->capture.substream = cap_substream;
|
|
if (snd_BUG_ON(!chip->playback.pcm_ctl))
|
|
return -EIO;
|
|
return 0;
|
|
}
|
|
|
|
EXPORT_SYMBOL(snd_cs8427_iec958_build);
|
|
|
|
int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
|
|
{
|
|
struct cs8427 *chip;
|
|
|
|
if (snd_BUG_ON(!cs8427))
|
|
return -ENXIO;
|
|
chip = cs8427->private_data;
|
|
if (active)
|
|
memcpy(chip->playback.pcm_status,
|
|
chip->playback.def_status, 24);
|
|
chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
|
|
snd_ctl_notify(cs8427->bus->card,
|
|
SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
|
|
&chip->playback.pcm_ctl->id);
|
|
return 0;
|
|
}
|
|
|
|
EXPORT_SYMBOL(snd_cs8427_iec958_active);
|
|
|
|
int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
|
|
{
|
|
struct cs8427 *chip;
|
|
char *status;
|
|
int err, reset;
|
|
|
|
if (snd_BUG_ON(!cs8427))
|
|
return -ENXIO;
|
|
chip = cs8427->private_data;
|
|
status = chip->playback.pcm_status;
|
|
snd_i2c_lock(cs8427->bus);
|
|
if (status[0] & IEC958_AES0_PROFESSIONAL) {
|
|
status[0] &= ~IEC958_AES0_PRO_FS;
|
|
switch (rate) {
|
|
case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
|
|
case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
|
|
case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
|
|
default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
|
|
}
|
|
} else {
|
|
status[3] &= ~IEC958_AES3_CON_FS;
|
|
switch (rate) {
|
|
case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
|
|
case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
|
|
case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
|
|
}
|
|
}
|
|
err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
|
|
if (err > 0)
|
|
snd_ctl_notify(cs8427->bus->card,
|
|
SNDRV_CTL_EVENT_MASK_VALUE,
|
|
&chip->playback.pcm_ctl->id);
|
|
reset = chip->rate != rate;
|
|
chip->rate = rate;
|
|
snd_i2c_unlock(cs8427->bus);
|
|
if (reset)
|
|
snd_cs8427_reset(cs8427);
|
|
return err < 0 ? err : 0;
|
|
}
|
|
|
|
EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
|