1021 строка
25 KiB
C
1021 строка
25 KiB
C
/*
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* Copyright (C) 1991, 1992 Linus Torvalds
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* Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
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*
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* Pentium III FXSR, SSE support
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*/
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/*
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* Handle hardware traps and faults.
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*/
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#include <linux/interrupt.h>
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#include <linux/kallsyms.h>
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#include <linux/spinlock.h>
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#include <linux/kprobes.h>
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#include <linux/uaccess.h>
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#include <linux/utsname.h>
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#include <linux/kdebug.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/ptrace.h>
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#include <linux/string.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/kexec.h>
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#include <linux/sched.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/bug.h>
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#include <linux/nmi.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#ifdef CONFIG_EISA
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#include <linux/ioport.h>
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#include <linux/eisa.h>
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#endif
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#ifdef CONFIG_MCA
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#include <linux/mca.h>
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#endif
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#if defined(CONFIG_EDAC)
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#include <linux/edac.h>
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#endif
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#include <asm/stacktrace.h>
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#include <asm/processor.h>
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#include <asm/debugreg.h>
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#include <asm/atomic.h>
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#include <asm/system.h>
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#include <asm/traps.h>
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#include <asm/desc.h>
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#include <asm/i387.h>
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#include <mach_traps.h>
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#ifdef CONFIG_X86_64
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#include <asm/pgalloc.h>
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#include <asm/proto.h>
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#include <asm/pda.h>
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#else
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#include <asm/processor-flags.h>
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#include <asm/arch_hooks.h>
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#include <asm/traps.h>
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#include "cpu/mcheck/mce.h"
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asmlinkage int system_call(void);
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/* Do we ignore FPU interrupts ? */
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char ignore_fpu_irq;
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/*
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* The IDT has to be page-aligned to simplify the Pentium
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* F0 0F bug workaround.. We have a special link segment
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* for this.
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*/
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gate_desc idt_table[256]
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__attribute__((__section__(".data.idt"))) = { { { { 0, 0 } } }, };
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#endif
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DECLARE_BITMAP(used_vectors, NR_VECTORS);
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EXPORT_SYMBOL_GPL(used_vectors);
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static int ignore_nmis;
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static inline void conditional_sti(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_enable();
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}
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static inline void preempt_conditional_sti(struct pt_regs *regs)
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{
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inc_preempt_count();
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_enable();
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}
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static inline void preempt_conditional_cli(struct pt_regs *regs)
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{
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if (regs->flags & X86_EFLAGS_IF)
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local_irq_disable();
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dec_preempt_count();
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}
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#ifdef CONFIG_X86_32
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static inline void
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die_if_kernel(const char *str, struct pt_regs *regs, long err)
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{
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if (!user_mode_vm(regs))
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die(str, regs, err);
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}
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/*
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* Perform the lazy TSS's I/O bitmap copy. If the TSS has an
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* invalid offset set (the LAZY one) and the faulting thread has
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* a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS,
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* we set the offset field correctly and return 1.
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*/
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static int lazy_iobitmap_copy(void)
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{
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struct thread_struct *thread;
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struct tss_struct *tss;
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int cpu;
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cpu = get_cpu();
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tss = &per_cpu(init_tss, cpu);
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thread = ¤t->thread;
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if (tss->x86_tss.io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
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thread->io_bitmap_ptr) {
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memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
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thread->io_bitmap_max);
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/*
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* If the previously set map was extending to higher ports
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* than the current one, pad extra space with 0xff (no access).
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*/
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if (thread->io_bitmap_max < tss->io_bitmap_max) {
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memset((char *) tss->io_bitmap +
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thread->io_bitmap_max, 0xff,
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tss->io_bitmap_max - thread->io_bitmap_max);
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}
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tss->io_bitmap_max = thread->io_bitmap_max;
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tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET;
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tss->io_bitmap_owner = thread;
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put_cpu();
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return 1;
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}
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put_cpu();
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return 0;
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}
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#endif
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static void __kprobes
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do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
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long error_code, siginfo_t *info)
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{
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struct task_struct *tsk = current;
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#ifdef CONFIG_X86_32
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if (regs->flags & X86_VM_MASK) {
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/*
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* traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
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* On nmi (interrupt 2), do_trap should not be called.
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*/
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if (trapnr < 6)
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goto vm86_trap;
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goto trap_signal;
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}
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#endif
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if (!user_mode(regs))
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goto kernel_trap;
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#ifdef CONFIG_X86_32
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trap_signal:
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#endif
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/*
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* We want error_code and trap_no set for userspace faults and
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* kernelspace faults which result in die(), but not
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* kernelspace faults which are fixed up. die() gives the
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* process no chance to handle the signal and notice the
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* kernel fault information, so that won't result in polluting
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* the information about previously queued, but not yet
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* delivered, faults. See also do_general_protection below.
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*/
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = trapnr;
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#ifdef CONFIG_X86_64
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if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
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printk_ratelimit()) {
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printk(KERN_INFO
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"%s[%d] trap %s ip:%lx sp:%lx error:%lx",
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tsk->comm, tsk->pid, str,
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regs->ip, regs->sp, error_code);
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print_vma_addr(" in ", regs->ip);
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printk("\n");
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}
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#endif
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if (info)
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force_sig_info(signr, info, tsk);
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else
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force_sig(signr, tsk);
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return;
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kernel_trap:
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if (!fixup_exception(regs)) {
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = trapnr;
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die(str, regs, error_code);
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}
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return;
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#ifdef CONFIG_X86_32
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vm86_trap:
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if (handle_vm86_trap((struct kernel_vm86_regs *) regs,
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error_code, trapnr))
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goto trap_signal;
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return;
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#endif
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}
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#define DO_ERROR(trapnr, signr, str, name) \
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dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
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{ \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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conditional_sti(regs); \
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do_trap(trapnr, signr, str, regs, error_code, NULL); \
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}
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#define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
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dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
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{ \
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siginfo_t info; \
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info.si_signo = signr; \
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info.si_errno = 0; \
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info.si_code = sicode; \
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info.si_addr = (void __user *)siaddr; \
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if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
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== NOTIFY_STOP) \
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return; \
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conditional_sti(regs); \
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do_trap(trapnr, signr, str, regs, error_code, &info); \
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}
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DO_ERROR_INFO(0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->ip)
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DO_ERROR(4, SIGSEGV, "overflow", overflow)
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DO_ERROR(5, SIGSEGV, "bounds", bounds)
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DO_ERROR_INFO(6, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, regs->ip)
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DO_ERROR(9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
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DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
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DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
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#ifdef CONFIG_X86_32
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DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
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#endif
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DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
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#ifdef CONFIG_X86_64
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/* Runs on IST stack */
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dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code)
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{
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if (notify_die(DIE_TRAP, "stack segment", regs, error_code,
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12, SIGBUS) == NOTIFY_STOP)
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return;
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preempt_conditional_sti(regs);
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do_trap(12, SIGBUS, "stack segment", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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}
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dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
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{
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static const char str[] = "double fault";
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struct task_struct *tsk = current;
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/* Return not checked because double check cannot be ignored */
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notify_die(DIE_TRAP, str, regs, error_code, 8, SIGSEGV);
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 8;
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/*
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* This is always a kernel trap and never fixable (and thus must
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* never return).
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*/
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for (;;)
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die(str, regs, error_code);
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}
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#endif
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dotraplinkage void __kprobes
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do_general_protection(struct pt_regs *regs, long error_code)
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{
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struct task_struct *tsk;
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conditional_sti(regs);
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#ifdef CONFIG_X86_32
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if (lazy_iobitmap_copy()) {
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/* restart the faulting instruction */
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return;
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}
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if (regs->flags & X86_VM_MASK)
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goto gp_in_vm86;
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#endif
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tsk = current;
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if (!user_mode(regs))
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goto gp_in_kernel;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 13;
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if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
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printk_ratelimit()) {
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printk(KERN_INFO
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"%s[%d] general protection ip:%lx sp:%lx error:%lx",
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tsk->comm, task_pid_nr(tsk),
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regs->ip, regs->sp, error_code);
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print_vma_addr(" in ", regs->ip);
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printk("\n");
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}
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force_sig(SIGSEGV, tsk);
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return;
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#ifdef CONFIG_X86_32
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gp_in_vm86:
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local_irq_enable();
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handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
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return;
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#endif
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gp_in_kernel:
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if (fixup_exception(regs))
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return;
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tsk->thread.error_code = error_code;
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tsk->thread.trap_no = 13;
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if (notify_die(DIE_GPF, "general protection fault", regs,
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error_code, 13, SIGSEGV) == NOTIFY_STOP)
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return;
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die("general protection fault", regs, error_code);
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}
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static notrace __kprobes void
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mem_parity_error(unsigned char reason, struct pt_regs *regs)
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{
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printk(KERN_EMERG
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"Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
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reason, smp_processor_id());
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printk(KERN_EMERG
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"You have some hardware problem, likely on the PCI bus.\n");
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#if defined(CONFIG_EDAC)
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if (edac_handler_set()) {
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edac_atomic_assert_error();
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return;
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}
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#endif
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if (panic_on_unrecovered_nmi)
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panic("NMI: Not continuing");
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printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
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/* Clear and disable the memory parity error line. */
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reason = (reason & 0xf) | 4;
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outb(reason, 0x61);
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}
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static notrace __kprobes void
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io_check_error(unsigned char reason, struct pt_regs *regs)
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{
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unsigned long i;
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printk(KERN_EMERG "NMI: IOCK error (debug interrupt?)\n");
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show_registers(regs);
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/* Re-enable the IOCK line, wait for a few seconds */
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reason = (reason & 0xf) | 8;
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outb(reason, 0x61);
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i = 2000;
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while (--i)
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udelay(1000);
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reason &= ~8;
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outb(reason, 0x61);
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}
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static notrace __kprobes void
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unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
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{
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if (notify_die(DIE_NMIUNKNOWN, "nmi", regs, reason, 2, SIGINT) ==
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NOTIFY_STOP)
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return;
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#ifdef CONFIG_MCA
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/*
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* Might actually be able to figure out what the guilty party
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* is:
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*/
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if (MCA_bus) {
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mca_handle_nmi();
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return;
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}
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#endif
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printk(KERN_EMERG
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"Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
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reason, smp_processor_id());
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printk(KERN_EMERG "Do you have a strange power saving mode enabled?\n");
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if (panic_on_unrecovered_nmi)
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panic("NMI: Not continuing");
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printk(KERN_EMERG "Dazed and confused, but trying to continue\n");
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}
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static notrace __kprobes void default_do_nmi(struct pt_regs *regs)
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{
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unsigned char reason = 0;
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int cpu;
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cpu = smp_processor_id();
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/* Only the BSP gets external NMIs from the system. */
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if (!cpu)
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reason = get_nmi_reason();
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if (!(reason & 0xc0)) {
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if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 2, SIGINT)
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== NOTIFY_STOP)
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return;
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#ifdef CONFIG_X86_LOCAL_APIC
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/*
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* Ok, so this is none of the documented NMI sources,
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* so it must be the NMI watchdog.
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*/
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if (nmi_watchdog_tick(regs, reason))
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return;
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if (!do_nmi_callback(regs, cpu))
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unknown_nmi_error(reason, regs);
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#else
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unknown_nmi_error(reason, regs);
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#endif
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return;
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}
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if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT) == NOTIFY_STOP)
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return;
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/* AK: following checks seem to be broken on modern chipsets. FIXME */
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if (reason & 0x80)
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mem_parity_error(reason, regs);
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if (reason & 0x40)
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io_check_error(reason, regs);
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#ifdef CONFIG_X86_32
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/*
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* Reassert NMI in case it became active meanwhile
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* as it's edge-triggered:
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*/
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reassert_nmi();
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#endif
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}
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dotraplinkage notrace __kprobes void
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do_nmi(struct pt_regs *regs, long error_code)
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{
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nmi_enter();
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inc_irq_stat(__nmi_count);
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if (!ignore_nmis)
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default_do_nmi(regs);
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nmi_exit();
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}
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void stop_nmi(void)
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{
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acpi_nmi_disable();
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ignore_nmis++;
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}
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void restart_nmi(void)
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{
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ignore_nmis--;
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acpi_nmi_enable();
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}
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/* May run on IST stack. */
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dotraplinkage void __kprobes do_int3(struct pt_regs *regs, long error_code)
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{
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#ifdef CONFIG_KPROBES
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if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
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== NOTIFY_STOP)
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return;
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#else
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if (notify_die(DIE_TRAP, "int3", regs, error_code, 3, SIGTRAP)
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== NOTIFY_STOP)
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return;
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#endif
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preempt_conditional_sti(regs);
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do_trap(3, SIGTRAP, "int3", regs, error_code, NULL);
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preempt_conditional_cli(regs);
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}
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#ifdef CONFIG_X86_64
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/*
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* Help handler running on IST stack to switch back to user stack
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* for scheduling or signal handling. The actual stack switch is done in
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* entry.S
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*/
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asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs)
|
|
{
|
|
struct pt_regs *regs = eregs;
|
|
/* Did already sync */
|
|
if (eregs == (struct pt_regs *)eregs->sp)
|
|
;
|
|
/* Exception from user space */
|
|
else if (user_mode(eregs))
|
|
regs = task_pt_regs(current);
|
|
/*
|
|
* Exception from kernel and interrupts are enabled. Move to
|
|
* kernel process stack.
|
|
*/
|
|
else if (eregs->flags & X86_EFLAGS_IF)
|
|
regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs));
|
|
if (eregs != regs)
|
|
*regs = *eregs;
|
|
return regs;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Our handling of the processor debug registers is non-trivial.
|
|
* We do not clear them on entry and exit from the kernel. Therefore
|
|
* it is possible to get a watchpoint trap here from inside the kernel.
|
|
* However, the code in ./ptrace.c has ensured that the user can
|
|
* only set watchpoints on userspace addresses. Therefore the in-kernel
|
|
* watchpoint trap can only occur in code which is reading/writing
|
|
* from user space. Such code must not hold kernel locks (since it
|
|
* can equally take a page fault), therefore it is safe to call
|
|
* force_sig_info even though that claims and releases locks.
|
|
*
|
|
* Code in ./signal.c ensures that the debug control register
|
|
* is restored before we deliver any signal, and therefore that
|
|
* user code runs with the correct debug control register even though
|
|
* we clear it here.
|
|
*
|
|
* Being careful here means that we don't have to be as careful in a
|
|
* lot of more complicated places (task switching can be a bit lazy
|
|
* about restoring all the debug state, and ptrace doesn't have to
|
|
* find every occurrence of the TF bit that could be saved away even
|
|
* by user code)
|
|
*
|
|
* May run on IST stack.
|
|
*/
|
|
dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code)
|
|
{
|
|
struct task_struct *tsk = current;
|
|
unsigned long condition;
|
|
int si_code;
|
|
|
|
get_debugreg(condition, 6);
|
|
|
|
/*
|
|
* The processor cleared BTF, so don't mark that we need it set.
|
|
*/
|
|
clear_tsk_thread_flag(tsk, TIF_DEBUGCTLMSR);
|
|
tsk->thread.debugctlmsr = 0;
|
|
|
|
if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
|
|
SIGTRAP) == NOTIFY_STOP)
|
|
return;
|
|
|
|
/* It's safe to allow irq's after DR6 has been saved */
|
|
preempt_conditional_sti(regs);
|
|
|
|
/* Mask out spurious debug traps due to lazy DR7 setting */
|
|
if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
|
|
if (!tsk->thread.debugreg7)
|
|
goto clear_dr7;
|
|
}
|
|
|
|
#ifdef CONFIG_X86_32
|
|
if (regs->flags & X86_VM_MASK)
|
|
goto debug_vm86;
|
|
#endif
|
|
|
|
/* Save debug status register where ptrace can see it */
|
|
tsk->thread.debugreg6 = condition;
|
|
|
|
/*
|
|
* Single-stepping through TF: make sure we ignore any events in
|
|
* kernel space (but re-enable TF when returning to user mode).
|
|
*/
|
|
if (condition & DR_STEP) {
|
|
if (!user_mode(regs))
|
|
goto clear_TF_reenable;
|
|
}
|
|
|
|
si_code = get_si_code(condition);
|
|
/* Ok, finally something we can handle */
|
|
send_sigtrap(tsk, regs, error_code, si_code);
|
|
|
|
/*
|
|
* Disable additional traps. They'll be re-enabled when
|
|
* the signal is delivered.
|
|
*/
|
|
clear_dr7:
|
|
set_debugreg(0, 7);
|
|
preempt_conditional_cli(regs);
|
|
return;
|
|
|
|
#ifdef CONFIG_X86_32
|
|
debug_vm86:
|
|
handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
|
|
preempt_conditional_cli(regs);
|
|
return;
|
|
#endif
|
|
|
|
clear_TF_reenable:
|
|
set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
|
|
regs->flags &= ~X86_EFLAGS_TF;
|
|
preempt_conditional_cli(regs);
|
|
return;
|
|
}
|
|
|
|
#ifdef CONFIG_X86_64
|
|
static int kernel_math_error(struct pt_regs *regs, const char *str, int trapnr)
|
|
{
|
|
if (fixup_exception(regs))
|
|
return 1;
|
|
|
|
notify_die(DIE_GPF, str, regs, 0, trapnr, SIGFPE);
|
|
/* Illegal floating point operation in the kernel */
|
|
current->thread.trap_no = trapnr;
|
|
die(str, regs, 0);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Note that we play around with the 'TS' bit in an attempt to get
|
|
* the correct behaviour even in the presence of the asynchronous
|
|
* IRQ13 behaviour
|
|
*/
|
|
void math_error(void __user *ip)
|
|
{
|
|
struct task_struct *task;
|
|
siginfo_t info;
|
|
unsigned short cwd, swd, err;
|
|
|
|
/*
|
|
* Save the info for the exception handler and clear the error.
|
|
*/
|
|
task = current;
|
|
save_init_fpu(task);
|
|
task->thread.trap_no = 16;
|
|
task->thread.error_code = 0;
|
|
info.si_signo = SIGFPE;
|
|
info.si_errno = 0;
|
|
info.si_addr = ip;
|
|
/*
|
|
* (~cwd & swd) will mask out exceptions that are not set to unmasked
|
|
* status. 0x3f is the exception bits in these regs, 0x200 is the
|
|
* C1 reg you need in case of a stack fault, 0x040 is the stack
|
|
* fault bit. We should only be taking one exception at a time,
|
|
* so if this combination doesn't produce any single exception,
|
|
* then we have a bad program that isn't synchronizing its FPU usage
|
|
* and it will suffer the consequences since we won't be able to
|
|
* fully reproduce the context of the exception
|
|
*/
|
|
cwd = get_fpu_cwd(task);
|
|
swd = get_fpu_swd(task);
|
|
|
|
err = swd & ~cwd;
|
|
|
|
if (err & 0x001) { /* Invalid op */
|
|
/*
|
|
* swd & 0x240 == 0x040: Stack Underflow
|
|
* swd & 0x240 == 0x240: Stack Overflow
|
|
* User must clear the SF bit (0x40) if set
|
|
*/
|
|
info.si_code = FPE_FLTINV;
|
|
} else if (err & 0x004) { /* Divide by Zero */
|
|
info.si_code = FPE_FLTDIV;
|
|
} else if (err & 0x008) { /* Overflow */
|
|
info.si_code = FPE_FLTOVF;
|
|
} else if (err & 0x012) { /* Denormal, Underflow */
|
|
info.si_code = FPE_FLTUND;
|
|
} else if (err & 0x020) { /* Precision */
|
|
info.si_code = FPE_FLTRES;
|
|
} else {
|
|
/*
|
|
* If we're using IRQ 13, or supposedly even some trap 16
|
|
* implementations, it's possible we get a spurious trap...
|
|
*/
|
|
return; /* Spurious trap, no error */
|
|
}
|
|
force_sig_info(SIGFPE, &info, task);
|
|
}
|
|
|
|
dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
conditional_sti(regs);
|
|
|
|
#ifdef CONFIG_X86_32
|
|
ignore_fpu_irq = 1;
|
|
#else
|
|
if (!user_mode(regs) &&
|
|
kernel_math_error(regs, "kernel x87 math error", 16))
|
|
return;
|
|
#endif
|
|
|
|
math_error((void __user *)regs->ip);
|
|
}
|
|
|
|
static void simd_math_error(void __user *ip)
|
|
{
|
|
struct task_struct *task;
|
|
siginfo_t info;
|
|
unsigned short mxcsr;
|
|
|
|
/*
|
|
* Save the info for the exception handler and clear the error.
|
|
*/
|
|
task = current;
|
|
save_init_fpu(task);
|
|
task->thread.trap_no = 19;
|
|
task->thread.error_code = 0;
|
|
info.si_signo = SIGFPE;
|
|
info.si_errno = 0;
|
|
info.si_code = __SI_FAULT;
|
|
info.si_addr = ip;
|
|
/*
|
|
* The SIMD FPU exceptions are handled a little differently, as there
|
|
* is only a single status/control register. Thus, to determine which
|
|
* unmasked exception was caught we must mask the exception mask bits
|
|
* at 0x1f80, and then use these to mask the exception bits at 0x3f.
|
|
*/
|
|
mxcsr = get_fpu_mxcsr(task);
|
|
switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
|
|
case 0x000:
|
|
default:
|
|
break;
|
|
case 0x001: /* Invalid Op */
|
|
info.si_code = FPE_FLTINV;
|
|
break;
|
|
case 0x002: /* Denormalize */
|
|
case 0x010: /* Underflow */
|
|
info.si_code = FPE_FLTUND;
|
|
break;
|
|
case 0x004: /* Zero Divide */
|
|
info.si_code = FPE_FLTDIV;
|
|
break;
|
|
case 0x008: /* Overflow */
|
|
info.si_code = FPE_FLTOVF;
|
|
break;
|
|
case 0x020: /* Precision */
|
|
info.si_code = FPE_FLTRES;
|
|
break;
|
|
}
|
|
force_sig_info(SIGFPE, &info, task);
|
|
}
|
|
|
|
dotraplinkage void
|
|
do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
conditional_sti(regs);
|
|
|
|
#ifdef CONFIG_X86_32
|
|
if (cpu_has_xmm) {
|
|
/* Handle SIMD FPU exceptions on PIII+ processors. */
|
|
ignore_fpu_irq = 1;
|
|
simd_math_error((void __user *)regs->ip);
|
|
return;
|
|
}
|
|
/*
|
|
* Handle strange cache flush from user space exception
|
|
* in all other cases. This is undocumented behaviour.
|
|
*/
|
|
if (regs->flags & X86_VM_MASK) {
|
|
handle_vm86_fault((struct kernel_vm86_regs *)regs, error_code);
|
|
return;
|
|
}
|
|
current->thread.trap_no = 19;
|
|
current->thread.error_code = error_code;
|
|
die_if_kernel("cache flush denied", regs, error_code);
|
|
force_sig(SIGSEGV, current);
|
|
#else
|
|
if (!user_mode(regs) &&
|
|
kernel_math_error(regs, "kernel simd math error", 19))
|
|
return;
|
|
simd_math_error((void __user *)regs->ip);
|
|
#endif
|
|
}
|
|
|
|
dotraplinkage void
|
|
do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
|
|
{
|
|
conditional_sti(regs);
|
|
#if 0
|
|
/* No need to warn about this any longer. */
|
|
printk(KERN_INFO "Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
|
|
#endif
|
|
}
|
|
|
|
#ifdef CONFIG_X86_32
|
|
unsigned long patch_espfix_desc(unsigned long uesp, unsigned long kesp)
|
|
{
|
|
struct desc_struct *gdt = get_cpu_gdt_table(smp_processor_id());
|
|
unsigned long base = (kesp - uesp) & -THREAD_SIZE;
|
|
unsigned long new_kesp = kesp - base;
|
|
unsigned long lim_pages = (new_kesp | (THREAD_SIZE - 1)) >> PAGE_SHIFT;
|
|
__u64 desc = *(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS];
|
|
|
|
/* Set up base for espfix segment */
|
|
desc &= 0x00f0ff0000000000ULL;
|
|
desc |= ((((__u64)base) << 16) & 0x000000ffffff0000ULL) |
|
|
((((__u64)base) << 32) & 0xff00000000000000ULL) |
|
|
((((__u64)lim_pages) << 32) & 0x000f000000000000ULL) |
|
|
(lim_pages & 0xffff);
|
|
*(__u64 *)&gdt[GDT_ENTRY_ESPFIX_SS] = desc;
|
|
|
|
return new_kesp;
|
|
}
|
|
#else
|
|
asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void)
|
|
{
|
|
}
|
|
|
|
asmlinkage void __attribute__((weak)) mce_threshold_interrupt(void)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* 'math_state_restore()' saves the current math information in the
|
|
* old math state array, and gets the new ones from the current task
|
|
*
|
|
* Careful.. There are problems with IBM-designed IRQ13 behaviour.
|
|
* Don't touch unless you *really* know how it works.
|
|
*
|
|
* Must be called with kernel preemption disabled (in this case,
|
|
* local interrupts are disabled at the call-site in entry.S).
|
|
*/
|
|
asmlinkage void math_state_restore(void)
|
|
{
|
|
struct thread_info *thread = current_thread_info();
|
|
struct task_struct *tsk = thread->task;
|
|
|
|
if (!tsk_used_math(tsk)) {
|
|
local_irq_enable();
|
|
/*
|
|
* does a slab alloc which can sleep
|
|
*/
|
|
if (init_fpu(tsk)) {
|
|
/*
|
|
* ran out of memory!
|
|
*/
|
|
do_group_exit(SIGKILL);
|
|
return;
|
|
}
|
|
local_irq_disable();
|
|
}
|
|
|
|
clts(); /* Allow maths ops (or we recurse) */
|
|
#ifdef CONFIG_X86_32
|
|
restore_fpu(tsk);
|
|
#else
|
|
/*
|
|
* Paranoid restore. send a SIGSEGV if we fail to restore the state.
|
|
*/
|
|
if (unlikely(restore_fpu_checking(tsk))) {
|
|
stts();
|
|
force_sig(SIGSEGV, tsk);
|
|
return;
|
|
}
|
|
#endif
|
|
thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
|
|
tsk->fpu_counter++;
|
|
}
|
|
EXPORT_SYMBOL_GPL(math_state_restore);
|
|
|
|
#ifndef CONFIG_MATH_EMULATION
|
|
asmlinkage void math_emulate(long arg)
|
|
{
|
|
printk(KERN_EMERG
|
|
"math-emulation not enabled and no coprocessor found.\n");
|
|
printk(KERN_EMERG "killing %s.\n", current->comm);
|
|
force_sig(SIGFPE, current);
|
|
schedule();
|
|
}
|
|
#endif /* CONFIG_MATH_EMULATION */
|
|
|
|
dotraplinkage void __kprobes
|
|
do_device_not_available(struct pt_regs *regs, long error)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
if (read_cr0() & X86_CR0_EM) {
|
|
conditional_sti(regs);
|
|
math_emulate(0);
|
|
} else {
|
|
math_state_restore(); /* interrupts still off */
|
|
conditional_sti(regs);
|
|
}
|
|
#else
|
|
math_state_restore();
|
|
#endif
|
|
}
|
|
|
|
#ifdef CONFIG_X86_32
|
|
dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
|
|
{
|
|
siginfo_t info;
|
|
local_irq_enable();
|
|
|
|
info.si_signo = SIGILL;
|
|
info.si_errno = 0;
|
|
info.si_code = ILL_BADSTK;
|
|
info.si_addr = 0;
|
|
if (notify_die(DIE_TRAP, "iret exception",
|
|
regs, error_code, 32, SIGILL) == NOTIFY_STOP)
|
|
return;
|
|
do_trap(32, SIGILL, "iret exception", regs, error_code, &info);
|
|
}
|
|
#endif
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
int i;
|
|
|
|
#ifdef CONFIG_EISA
|
|
void __iomem *p = early_ioremap(0x0FFFD9, 4);
|
|
|
|
if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
|
|
EISA_bus = 1;
|
|
early_iounmap(p, 4);
|
|
#endif
|
|
|
|
set_intr_gate(0, ÷_error);
|
|
set_intr_gate_ist(1, &debug, DEBUG_STACK);
|
|
set_intr_gate_ist(2, &nmi, NMI_STACK);
|
|
/* int3 can be called from all */
|
|
set_system_intr_gate_ist(3, &int3, DEBUG_STACK);
|
|
/* int4 can be called from all */
|
|
set_system_intr_gate(4, &overflow);
|
|
set_intr_gate(5, &bounds);
|
|
set_intr_gate(6, &invalid_op);
|
|
set_intr_gate(7, &device_not_available);
|
|
#ifdef CONFIG_X86_32
|
|
set_task_gate(8, GDT_ENTRY_DOUBLEFAULT_TSS);
|
|
#else
|
|
set_intr_gate_ist(8, &double_fault, DOUBLEFAULT_STACK);
|
|
#endif
|
|
set_intr_gate(9, &coprocessor_segment_overrun);
|
|
set_intr_gate(10, &invalid_TSS);
|
|
set_intr_gate(11, &segment_not_present);
|
|
set_intr_gate_ist(12, &stack_segment, STACKFAULT_STACK);
|
|
set_intr_gate(13, &general_protection);
|
|
set_intr_gate(14, &page_fault);
|
|
set_intr_gate(15, &spurious_interrupt_bug);
|
|
set_intr_gate(16, &coprocessor_error);
|
|
set_intr_gate(17, &alignment_check);
|
|
#ifdef CONFIG_X86_MCE
|
|
set_intr_gate_ist(18, &machine_check, MCE_STACK);
|
|
#endif
|
|
set_intr_gate(19, &simd_coprocessor_error);
|
|
|
|
#ifdef CONFIG_IA32_EMULATION
|
|
set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
|
|
#endif
|
|
|
|
#ifdef CONFIG_X86_32
|
|
if (cpu_has_fxsr) {
|
|
printk(KERN_INFO "Enabling fast FPU save and restore... ");
|
|
set_in_cr4(X86_CR4_OSFXSR);
|
|
printk("done.\n");
|
|
}
|
|
if (cpu_has_xmm) {
|
|
printk(KERN_INFO
|
|
"Enabling unmasked SIMD FPU exception support... ");
|
|
set_in_cr4(X86_CR4_OSXMMEXCPT);
|
|
printk("done.\n");
|
|
}
|
|
|
|
set_system_trap_gate(SYSCALL_VECTOR, &system_call);
|
|
#endif
|
|
|
|
/* Reserve all the builtin and the syscall vector: */
|
|
for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
|
|
set_bit(i, used_vectors);
|
|
|
|
#ifdef CONFIG_X86_64
|
|
set_bit(IA32_SYSCALL_VECTOR, used_vectors);
|
|
#else
|
|
set_bit(SYSCALL_VECTOR, used_vectors);
|
|
#endif
|
|
/*
|
|
* Should be a barrier for any external CPU state:
|
|
*/
|
|
cpu_init();
|
|
|
|
#ifdef CONFIG_X86_32
|
|
trap_init_hook();
|
|
#endif
|
|
}
|