410 строки
12 KiB
C
410 строки
12 KiB
C
/*
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* Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com) Gaisler Research
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* Copyright (C) 2004 Stefan Holst (mail@s-holst.de) Uni-Stuttgart
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* Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
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* Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
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*/
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#ifndef LEON_H_INCLUDE
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#define LEON_H_INCLUDE
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#ifdef CONFIG_SPARC_LEON
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#define ASI_LEON_NOCACHE 0x01
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#define ASI_LEON_DCACHE_MISS 0x1
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#define ASI_LEON_CACHEREGS 0x02
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#define ASI_LEON_IFLUSH 0x10
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#define ASI_LEON_DFLUSH 0x11
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#define ASI_LEON_MMUFLUSH 0x18
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#define ASI_LEON_MMUREGS 0x19
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#define ASI_LEON_BYPASS 0x1c
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#define ASI_LEON_FLUSH_PAGE 0x10
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/* mmu register access, ASI_LEON_MMUREGS */
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#define LEON_CNR_CTRL 0x000
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#define LEON_CNR_CTXP 0x100
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#define LEON_CNR_CTX 0x200
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#define LEON_CNR_F 0x300
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#define LEON_CNR_FADDR 0x400
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#define LEON_CNR_CTX_NCTX 256 /*number of MMU ctx */
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#define LEON_CNR_CTRL_TLBDIS 0x80000000
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#define LEON_MMUTLB_ENT_MAX 64
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/*
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* diagnostic access from mmutlb.vhd:
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* 0: pte address
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* 4: pte
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* 8: additional flags
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*/
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#define LEON_DIAGF_LVL 0x3
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#define LEON_DIAGF_WR 0x8
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#define LEON_DIAGF_WR_SHIFT 3
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#define LEON_DIAGF_HIT 0x10
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#define LEON_DIAGF_HIT_SHIFT 4
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#define LEON_DIAGF_CTX 0x1fe0
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#define LEON_DIAGF_CTX_SHIFT 5
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#define LEON_DIAGF_VALID 0x2000
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#define LEON_DIAGF_VALID_SHIFT 13
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/*
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* Interrupt Sources
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*
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* The interrupt source numbers directly map to the trap type and to
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* the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
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* and the Interrupt Pending Registers.
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*/
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#define LEON_INTERRUPT_CORRECTABLE_MEMORY_ERROR 1
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#define LEON_INTERRUPT_UART_1_RX_TX 2
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#define LEON_INTERRUPT_UART_0_RX_TX 3
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#define LEON_INTERRUPT_EXTERNAL_0 4
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#define LEON_INTERRUPT_EXTERNAL_1 5
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#define LEON_INTERRUPT_EXTERNAL_2 6
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#define LEON_INTERRUPT_EXTERNAL_3 7
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#define LEON_INTERRUPT_TIMER1 8
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#define LEON_INTERRUPT_TIMER2 9
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#define LEON_INTERRUPT_EMPTY1 10
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#define LEON_INTERRUPT_EMPTY2 11
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#define LEON_INTERRUPT_OPEN_ETH 12
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#define LEON_INTERRUPT_EMPTY4 13
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#define LEON_INTERRUPT_EMPTY5 14
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#define LEON_INTERRUPT_EMPTY6 15
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/* irq masks */
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#define LEON_HARD_INT(x) (1 << (x)) /* irq 0-15 */
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#define LEON_IRQMASK_R 0x0000fffe /* bit 15- 1 of lregs.irqmask */
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#define LEON_IRQPRIO_R 0xfffe0000 /* bit 31-17 of lregs.irqmask */
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/* leon uart register definitions */
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#define LEON_OFF_UDATA 0x0
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#define LEON_OFF_USTAT 0x4
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#define LEON_OFF_UCTRL 0x8
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#define LEON_OFF_USCAL 0xc
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#define LEON_UCTRL_RE 0x01
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#define LEON_UCTRL_TE 0x02
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#define LEON_UCTRL_RI 0x04
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#define LEON_UCTRL_TI 0x08
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#define LEON_UCTRL_PS 0x10
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#define LEON_UCTRL_PE 0x20
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#define LEON_UCTRL_FL 0x40
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#define LEON_UCTRL_LB 0x80
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#define LEON_USTAT_DR 0x01
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#define LEON_USTAT_TS 0x02
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#define LEON_USTAT_TH 0x04
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#define LEON_USTAT_BR 0x08
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#define LEON_USTAT_OV 0x10
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#define LEON_USTAT_PE 0x20
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#define LEON_USTAT_FE 0x40
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#define LEON_MCFG2_SRAMDIS 0x00002000
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#define LEON_MCFG2_SDRAMEN 0x00004000
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#define LEON_MCFG2_SRAMBANKSZ 0x00001e00 /* [12-9] */
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#define LEON_MCFG2_SRAMBANKSZ_SHIFT 9
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#define LEON_MCFG2_SDRAMBANKSZ 0x03800000 /* [25-23] */
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#define LEON_MCFG2_SDRAMBANKSZ_SHIFT 23
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#define LEON_TCNT0_MASK 0x7fffff
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#define LEON_USTAT_ERROR (LEON_USTAT_OV | LEON_USTAT_PE | LEON_USTAT_FE)
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/* no break yet */
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#define ASI_LEON3_SYSCTRL 0x02
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#define ASI_LEON3_SYSCTRL_ICFG 0x08
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#define ASI_LEON3_SYSCTRL_DCFG 0x0c
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#define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1 << 27)
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#define ASI_LEON3_SYSCTRL_CFG_SSIZE(c) (1 << ((c >> 20) & 0xf))
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#ifndef __ASSEMBLY__
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/* do a virtual address read without cache */
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static inline unsigned long leon_readnobuffer_reg(unsigned long paddr)
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{
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unsigned long retval;
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__asm__ __volatile__("lda [%1] %2, %0\n\t" :
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"=r"(retval) : "r"(paddr), "i"(ASI_LEON_NOCACHE));
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return retval;
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}
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/* do a physical address bypass write, i.e. for 0x80000000 */
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static inline void leon_store_reg(unsigned long paddr, unsigned long value)
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{
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__asm__ __volatile__("sta %0, [%1] %2\n\t" : : "r"(value), "r"(paddr),
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"i"(ASI_LEON_BYPASS) : "memory");
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}
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/* do a physical address bypass load, i.e. for 0x80000000 */
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static inline unsigned long leon_load_reg(unsigned long paddr)
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{
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unsigned long retval;
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__asm__ __volatile__("lda [%1] %2, %0\n\t" :
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"=r"(retval) : "r"(paddr), "i"(ASI_LEON_BYPASS));
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return retval;
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}
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static inline void leon_srmmu_disabletlb(void)
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{
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unsigned int retval;
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__asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),
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"i"(ASI_LEON_MMUREGS));
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retval |= LEON_CNR_CTRL_TLBDIS;
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__asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),
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"i"(ASI_LEON_MMUREGS) : "memory");
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}
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static inline void leon_srmmu_enabletlb(void)
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{
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unsigned int retval;
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__asm__ __volatile__("lda [%%g0] %2, %0\n\t" : "=r"(retval) : "r"(0),
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"i"(ASI_LEON_MMUREGS));
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retval = retval & ~LEON_CNR_CTRL_TLBDIS;
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__asm__ __volatile__("sta %0, [%%g0] %2\n\t" : : "r"(retval), "r"(0),
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"i"(ASI_LEON_MMUREGS) : "memory");
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}
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/* macro access for leon_load_reg() and leon_store_reg() */
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#define LEON3_BYPASS_LOAD_PA(x) (leon_load_reg((unsigned long)(x)))
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#define LEON3_BYPASS_STORE_PA(x, v) (leon_store_reg((unsigned long)(x), (unsigned long)(v)))
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#define LEON3_BYPASS_ANDIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) & v)
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#define LEON3_BYPASS_ORIN_PA(x, v) LEON3_BYPASS_STORE_PA(x, LEON3_BYPASS_LOAD_PA(x) | v)
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#define LEON_BYPASS_LOAD_PA(x) leon_load_reg((unsigned long)(x))
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#define LEON_BYPASS_STORE_PA(x, v) leon_store_reg((unsigned long)(x), (unsigned long)(v))
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#define LEON_REGLOAD_PA(x) leon_load_reg((unsigned long)(x)+LEON_PREGS)
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#define LEON_REGSTORE_PA(x, v) leon_store_reg((unsigned long)(x)+LEON_PREGS, (unsigned long)(v))
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#define LEON_REGSTORE_OR_PA(x, v) LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) | (unsigned long)(v))
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#define LEON_REGSTORE_AND_PA(x, v) LEON_REGSTORE_PA(x, LEON_REGLOAD_PA(x) & (unsigned long)(v))
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/* macro access for leon_readnobuffer_reg() */
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#define LEON_BYPASSCACHE_LOAD_VA(x) leon_readnobuffer_reg((unsigned long)(x))
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extern void sparc_leon_eirq_register(int eirq);
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extern void leon_init(void);
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extern void leon_switch_mm(void);
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extern void leon_init_IRQ(void);
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extern unsigned long last_valid_pfn;
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static inline unsigned long sparc_leon3_get_dcachecfg(void)
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{
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unsigned int retval;
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__asm__ __volatile__("lda [%1] %2, %0\n\t" :
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"=r"(retval) :
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"r"(ASI_LEON3_SYSCTRL_DCFG),
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"i"(ASI_LEON3_SYSCTRL));
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return retval;
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}
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/* enable snooping */
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static inline void sparc_leon3_enable_snooping(void)
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{
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__asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
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"set 0x800000, %%l2\n\t"
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"or %%l2, %%l1, %%l2\n\t"
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"sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
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};
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static inline int sparc_leon3_snooping_enabled(void)
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{
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u32 cctrl;
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__asm__ __volatile__("lda [%%g0] 2, %0\n\t" : "=r"(cctrl));
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return (cctrl >> 23) & 1;
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};
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static inline void sparc_leon3_disable_cache(void)
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{
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__asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t"
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"set 0x00000f, %%l2\n\t"
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"andn %%l2, %%l1, %%l2\n\t"
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"sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2");
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};
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static inline unsigned long sparc_leon3_asr17(void)
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{
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u32 asr17;
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__asm__ __volatile__ ("rd %%asr17, %0\n\t" : "=r"(asr17));
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return asr17;
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};
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static inline int sparc_leon3_cpuid(void)
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{
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return sparc_leon3_asr17() >> 28;
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}
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#endif /*!__ASSEMBLY__*/
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#ifdef CONFIG_SMP
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# define LEON3_IRQ_RESCHEDULE 13
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# define LEON3_IRQ_TICKER (leon_percpu_timer_dev[0].irq)
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# define LEON3_IRQ_CROSS_CALL 15
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#endif
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#if defined(PAGE_SIZE_LEON_8K)
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#define LEON_PAGE_SIZE_LEON 1
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#elif defined(PAGE_SIZE_LEON_16K)
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#define LEON_PAGE_SIZE_LEON 2)
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#else
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#define LEON_PAGE_SIZE_LEON 0
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#endif
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#if LEON_PAGE_SIZE_LEON == 0
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/* [ 8, 6, 6 ] + 12 */
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#define LEON_PGD_SH 24
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#define LEON_PGD_M 0xff
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#define LEON_PMD_SH 18
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#define LEON_PMD_SH_V (LEON_PGD_SH-2)
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#define LEON_PMD_M 0x3f
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#define LEON_PTE_SH 12
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#define LEON_PTE_M 0x3f
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#elif LEON_PAGE_SIZE_LEON == 1
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/* [ 7, 6, 6 ] + 13 */
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#define LEON_PGD_SH 25
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#define LEON_PGD_M 0x7f
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#define LEON_PMD_SH 19
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#define LEON_PMD_SH_V (LEON_PGD_SH-1)
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#define LEON_PMD_M 0x3f
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#define LEON_PTE_SH 13
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#define LEON_PTE_M 0x3f
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#elif LEON_PAGE_SIZE_LEON == 2
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/* [ 6, 6, 6 ] + 14 */
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#define LEON_PGD_SH 26
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#define LEON_PGD_M 0x3f
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#define LEON_PMD_SH 20
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#define LEON_PMD_SH_V (LEON_PGD_SH-0)
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#define LEON_PMD_M 0x3f
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#define LEON_PTE_SH 14
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#define LEON_PTE_M 0x3f
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#elif LEON_PAGE_SIZE_LEON == 3
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/* [ 4, 7, 6 ] + 15 */
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#define LEON_PGD_SH 28
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#define LEON_PGD_M 0x0f
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#define LEON_PMD_SH 21
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#define LEON_PMD_SH_V (LEON_PGD_SH-0)
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#define LEON_PMD_M 0x7f
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#define LEON_PTE_SH 15
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#define LEON_PTE_M 0x3f
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#else
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#error cannot determine LEON_PAGE_SIZE_LEON
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#endif
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#define PAGE_MIN_SHIFT (12)
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#define PAGE_MIN_SIZE (1UL << PAGE_MIN_SHIFT)
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#define LEON3_XCCR_SETS_MASK 0x07000000UL
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#define LEON3_XCCR_SSIZE_MASK 0x00f00000UL
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#define LEON2_CCR_DSETS_MASK 0x03000000UL
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#define LEON2_CFG_SSIZE_MASK 0x00007000UL
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#ifndef __ASSEMBLY__
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extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);
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extern void leon_flush_icache_all(void);
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extern void leon_flush_dcache_all(void);
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extern void leon_flush_cache_all(void);
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extern void leon_flush_tlb_all(void);
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extern int leon_flush_during_switch;
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extern int leon_flush_needed(void);
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struct vm_area_struct;
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extern void leon_flush_icache_all(void);
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extern void leon_flush_dcache_all(void);
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extern void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
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extern void leon_flush_cache_all(void);
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extern void leon_flush_tlb_all(void);
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extern int leon_flush_during_switch;
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extern int leon_flush_needed(void);
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extern void leon_flush_pcache_all(struct vm_area_struct *vma, unsigned long page);
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/* struct that hold LEON3 cache configuration registers */
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struct leon3_cacheregs {
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unsigned long ccr; /* 0x00 - Cache Control Register */
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unsigned long iccr; /* 0x08 - Instruction Cache Configuration Register */
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unsigned long dccr; /* 0x0c - Data Cache Configuration Register */
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};
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/* struct that hold LEON2 cache configuration register
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* & configuration register
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*/
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struct leon2_cacheregs {
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unsigned long ccr, cfg;
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};
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#ifdef __KERNEL__
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#include <linux/interrupt.h>
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struct device_node;
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extern int sparc_leon_eirq_get(int eirq, int cpu);
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extern irqreturn_t sparc_leon_eirq_isr(int dummy, void *dev_id);
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extern void sparc_leon_eirq_register(int eirq);
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extern void leon_clear_clock_irq(void);
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extern void leon_load_profile_irq(int cpu, unsigned int limit);
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extern void leon_init_timers(irq_handler_t counter_fn);
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extern void leon_clear_clock_irq(void);
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extern void leon_load_profile_irq(int cpu, unsigned int limit);
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extern void leon_trans_init(struct device_node *dp);
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extern void leon_node_init(struct device_node *dp, struct device_node ***nextp);
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extern void leon_init_IRQ(void);
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extern void leon_init(void);
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extern unsigned long srmmu_swprobe(unsigned long vaddr, unsigned long *paddr);
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extern void init_leon(void);
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extern void poke_leonsparc(void);
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extern void leon3_getCacheRegs(struct leon3_cacheregs *regs);
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extern int leon_flush_needed(void);
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extern void leon_switch_mm(void);
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extern int srmmu_swprobe_trace;
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#ifdef CONFIG_SMP
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extern int leon_smp_nrcpus(void);
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extern void leon_clear_profile_irq(int cpu);
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extern void leon_smp_done(void);
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extern void leon_boot_cpus(void);
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extern int leon_boot_one_cpu(int i);
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void leon_init_smp(void);
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extern void cpu_probe(void);
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extern void cpu_idle(void);
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extern void init_IRQ(void);
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extern void cpu_panic(void);
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extern int __leon_processor_id(void);
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void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
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extern unsigned int real_irq_entry[], smpleon_ticker[];
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extern unsigned int patchme_maybe_smp_msg[];
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extern unsigned long trapbase_cpu1[];
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extern unsigned long trapbase_cpu2[];
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extern unsigned long trapbase_cpu3[];
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extern unsigned int t_nmi[], linux_trap_ipi15_leon[];
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extern unsigned int linux_trap_ipi15_sun4m[];
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#endif /* CONFIG_SMP */
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#endif /* __KERNEL__ */
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#endif /* __ASSEMBLY__ */
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/* macros used in leon_mm.c */
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#define PFN(x) ((x) >> PAGE_SHIFT)
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#define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base)))
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#define _SRMMU_PTE_PMASK_LEON 0xffffffff
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#else /* defined(CONFIG_SPARC_LEON) */
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/* nop definitions for !LEON case */
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#define leon_init() do {} while (0)
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#define leon_switch_mm() do {} while (0)
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#define leon_init_IRQ() do {} while (0)
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#define init_leon() do {} while (0)
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#define leon_smp_done() do {} while (0)
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#define leon_boot_cpus() do {} while (0)
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#define leon_boot_one_cpu(i) 1
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#define leon_init_smp() do {} while (0)
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#endif /* !defined(CONFIG_SPARC_LEON) */
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#endif
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