183 строки
4.7 KiB
C
183 строки
4.7 KiB
C
/*
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* spu hypervisor abstraction for direct hardware access.
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*
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* (C) Copyright IBM Deutschland Entwicklung GmbH 2005
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* Copyright 2006 Sony Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/wait.h>
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#include <linux/mm.h>
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#include <linux/io.h>
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#include <linux/mutex.h>
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#include <linux/device.h>
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#include <linux/sched.h>
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#include <asm/spu.h>
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#include <asm/spu_priv1.h>
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#include <asm/firmware.h>
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#include <asm/prom.h>
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#include "interrupt.h"
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#include "spu_priv1_mmio.h"
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static void int_mask_and(struct spu *spu, int class, u64 mask)
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{
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u64 old_mask;
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old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
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out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
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}
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static void int_mask_or(struct spu *spu, int class, u64 mask)
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{
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u64 old_mask;
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old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
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out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
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}
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static void int_mask_set(struct spu *spu, int class, u64 mask)
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{
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out_be64(&spu->priv1->int_mask_RW[class], mask);
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}
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static u64 int_mask_get(struct spu *spu, int class)
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{
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return in_be64(&spu->priv1->int_mask_RW[class]);
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}
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static void int_stat_clear(struct spu *spu, int class, u64 stat)
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{
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out_be64(&spu->priv1->int_stat_RW[class], stat);
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}
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static u64 int_stat_get(struct spu *spu, int class)
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{
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return in_be64(&spu->priv1->int_stat_RW[class]);
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}
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static void cpu_affinity_set(struct spu *spu, int cpu)
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{
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u64 target;
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u64 route;
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if (nr_cpus_node(spu->node)) {
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const struct cpumask *spumask = cpumask_of_node(spu->node),
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*cpumask = cpumask_of_node(cpu_to_node(cpu));
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if (!cpumask_intersects(spumask, cpumask))
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return;
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}
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target = iic_get_target_id(cpu);
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route = target << 48 | target << 32 | target << 16;
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out_be64(&spu->priv1->int_route_RW, route);
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}
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static u64 mfc_dar_get(struct spu *spu)
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{
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return in_be64(&spu->priv1->mfc_dar_RW);
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}
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static u64 mfc_dsisr_get(struct spu *spu)
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{
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return in_be64(&spu->priv1->mfc_dsisr_RW);
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}
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static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
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{
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out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
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}
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static void mfc_sdr_setup(struct spu *spu)
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{
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out_be64(&spu->priv1->mfc_sdr_RW, mfspr(SPRN_SDR1));
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}
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static void mfc_sr1_set(struct spu *spu, u64 sr1)
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{
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out_be64(&spu->priv1->mfc_sr1_RW, sr1);
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}
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static u64 mfc_sr1_get(struct spu *spu)
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{
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return in_be64(&spu->priv1->mfc_sr1_RW);
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}
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static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
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{
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out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
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}
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static u64 mfc_tclass_id_get(struct spu *spu)
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{
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return in_be64(&spu->priv1->mfc_tclass_id_RW);
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}
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static void tlb_invalidate(struct spu *spu)
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{
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out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
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}
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static void resource_allocation_groupID_set(struct spu *spu, u64 id)
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{
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out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
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}
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static u64 resource_allocation_groupID_get(struct spu *spu)
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{
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return in_be64(&spu->priv1->resource_allocation_groupID_RW);
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}
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static void resource_allocation_enable_set(struct spu *spu, u64 enable)
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{
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out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
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}
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static u64 resource_allocation_enable_get(struct spu *spu)
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{
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return in_be64(&spu->priv1->resource_allocation_enable_RW);
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}
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const struct spu_priv1_ops spu_priv1_mmio_ops =
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{
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.int_mask_and = int_mask_and,
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.int_mask_or = int_mask_or,
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.int_mask_set = int_mask_set,
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.int_mask_get = int_mask_get,
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.int_stat_clear = int_stat_clear,
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.int_stat_get = int_stat_get,
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.cpu_affinity_set = cpu_affinity_set,
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.mfc_dar_get = mfc_dar_get,
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.mfc_dsisr_get = mfc_dsisr_get,
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.mfc_dsisr_set = mfc_dsisr_set,
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.mfc_sdr_setup = mfc_sdr_setup,
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.mfc_sr1_set = mfc_sr1_set,
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.mfc_sr1_get = mfc_sr1_get,
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.mfc_tclass_id_set = mfc_tclass_id_set,
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.mfc_tclass_id_get = mfc_tclass_id_get,
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.tlb_invalidate = tlb_invalidate,
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.resource_allocation_groupID_set = resource_allocation_groupID_set,
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.resource_allocation_groupID_get = resource_allocation_groupID_get,
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.resource_allocation_enable_set = resource_allocation_enable_set,
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.resource_allocation_enable_get = resource_allocation_enable_get,
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};
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