208 строки
5.8 KiB
C
208 строки
5.8 KiB
C
/*
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* PCI code for DDB5477.
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*
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* Copyright (C) 2001 MontaVista Software Inc.
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* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
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*
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* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/bootinfo.h>
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#include <asm/debug.h>
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#include <asm/ddb5xxx/ddb5xxx.h>
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static struct resource extpci_io_resource = {
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"ext pci IO space",
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DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + 0x4000,
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DDB_PCI0_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI0_IO_SIZE - 1,
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IORESOURCE_IO
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};
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static struct resource extpci_mem_resource = {
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"ext pci memory space",
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DDB_PCI0_MEM_BASE + 0x100000,
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DDB_PCI0_MEM_BASE + DDB_PCI0_MEM_SIZE - 1,
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IORESOURCE_MEM
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};
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static struct resource iopci_io_resource = {
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"io pci IO space",
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DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE,
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DDB_PCI1_IO_BASE - DDB_PCI_IO_BASE + DDB_PCI1_IO_SIZE - 1,
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IORESOURCE_IO
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};
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static struct resource iopci_mem_resource = {
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"ext pci memory space",
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DDB_PCI1_MEM_BASE,
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DDB_PCI1_MEM_BASE + DDB_PCI1_MEM_SIZE - 1,
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IORESOURCE_MEM
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};
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extern struct pci_ops ddb5477_ext_pci_ops;
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extern struct pci_ops ddb5477_io_pci_ops;
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struct pci_controller ddb5477_ext_controller = {
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.pci_ops = &ddb5477_ext_pci_ops,
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.io_resource = &extpci_io_resource,
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.mem_resource = &extpci_mem_resource
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};
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struct pci_controller ddb5477_io_controller = {
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.pci_ops = &ddb5477_io_pci_ops,
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.io_resource = &iopci_io_resource,
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.mem_resource = &iopci_mem_resource
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};
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/*
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* we fix up irqs based on the slot number.
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* The first entry is at AD:11.
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* Fortunately this works because, although we have two pci buses,
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* they all have different slot numbers (except for rockhopper slot 20
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* which is handled below).
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*
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*/
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/*
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* irq mapping : device -> pci int # -> vrc4377 irq# ,
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* ddb5477 board manual page 4 and vrc5477 manual page 46
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*/
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/*
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* based on ddb5477 manual page 11
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*/
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#define MAX_SLOT_NUM 21
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static unsigned char irq_map[MAX_SLOT_NUM] = {
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/* SLOT: 0, AD:11 */ 0xff,
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/* SLOT: 1, AD:12 */ 0xff,
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/* SLOT: 2, AD:13 */ 0xff,
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/* SLOT: 3, AD:14 */ 0xff,
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/* SLOT: 4, AD:15 */ VRC5477_IRQ_INTA, /* onboard tulip */
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/* SLOT: 5, AD:16 */ VRC5477_IRQ_INTB, /* slot 1 */
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/* SLOT: 6, AD:17 */ VRC5477_IRQ_INTC, /* slot 2 */
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/* SLOT: 7, AD:18 */ VRC5477_IRQ_INTD, /* slot 3 */
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/* SLOT: 8, AD:19 */ VRC5477_IRQ_INTE, /* slot 4 */
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/* SLOT: 9, AD:20 */ 0xff,
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/* SLOT: 10, AD:21 */ 0xff,
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/* SLOT: 11, AD:22 */ 0xff,
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/* SLOT: 12, AD:23 */ 0xff,
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/* SLOT: 13, AD:24 */ 0xff,
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/* SLOT: 14, AD:25 */ 0xff,
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/* SLOT: 15, AD:26 */ 0xff,
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/* SLOT: 16, AD:27 */ 0xff,
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/* SLOT: 17, AD:28 */ 0xff,
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/* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC, /* vrc5477 ac97 */
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/* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB, /* vrc5477 usb peri */
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/* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA, /* vrc5477 usb host */
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};
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static unsigned char rockhopperII_irq_map[MAX_SLOT_NUM] = {
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/* SLOT: 0, AD:11 */ 0xff,
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/* SLOT: 1, AD:12 */ VRC5477_IRQ_INTB, /* onboard AMD PCNET */
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/* SLOT: 2, AD:13 */ 0xff,
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/* SLOT: 3, AD:14 */ 0xff,
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/* SLOT: 4, AD:15 */ 14, /* M5229 ide ISA irq */
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/* SLOT: 5, AD:16 */ VRC5477_IRQ_INTD, /* slot 3 */
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/* SLOT: 6, AD:17 */ VRC5477_IRQ_INTA, /* slot 4 */
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/* SLOT: 7, AD:18 */ VRC5477_IRQ_INTD, /* slot 5 */
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/* SLOT: 8, AD:19 */ 0, /* M5457 modem nop */
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/* SLOT: 9, AD:20 */ VRC5477_IRQ_INTA, /* slot 2 */
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/* SLOT: 10, AD:21 */ 0xff,
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/* SLOT: 11, AD:22 */ 0xff,
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/* SLOT: 12, AD:23 */ 0xff,
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/* SLOT: 13, AD:24 */ 0xff,
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/* SLOT: 14, AD:25 */ 0xff,
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/* SLOT: 15, AD:26 */ 0xff,
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/* SLOT: 16, AD:27 */ 0xff,
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/* SLOT: 17, AD:28 */ 0, /* M7101 PMU nop */
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/* SLOT: 18, AD:29 */ VRC5477_IRQ_IOPCI_INTC, /* vrc5477 ac97 */
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/* SLOT: 19, AD:30 */ VRC5477_IRQ_IOPCI_INTB, /* vrc5477 usb peri */
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/* SLOT: 20, AD:31 */ VRC5477_IRQ_IOPCI_INTA, /* vrc5477 usb host */
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};
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int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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int slot_num;
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unsigned char *slot_irq_map;
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unsigned char irq;
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/*
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* We ignore the swizzled slot and pin values. The original
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* pci_fixup_irq() codes largely base irq number on the dev slot
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* numbers because except for one case they are unique even
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* though there are multiple pci buses.
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*/
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if (mips_machtype == MACH_NEC_ROCKHOPPERII)
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slot_irq_map = rockhopperII_irq_map;
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else
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slot_irq_map = irq_map;
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slot_num = PCI_SLOT(dev->devfn);
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irq = slot_irq_map[slot_num];
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db_assert(slot_num < MAX_SLOT_NUM);
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db_assert(irq != 0xff);
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pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
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if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
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/* hack to distinquish overlapping slot 20s, one
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* on bus 0 (ALI USB on the M1535 on the backplane),
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* and one on bus 2 (NEC USB controller on the CPU board)
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* Make the M1535 USB - ISA IRQ number 9.
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*/
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if (slot_num == 20 && dev->bus->number == 0) {
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pci_write_config_byte(dev,
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PCI_INTERRUPT_LINE,
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9);
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irq = 9;
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}
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}
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return irq;
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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void ddb_pci_reset_bus(void)
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{
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u32 temp;
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/*
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* I am not sure about the "official" procedure, the following
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* steps work as far as I know:
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* We first set PCI cold reset bit (bit 31) in PCICTRL-H.
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* Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
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* The same is true for both PCI channels.
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*/
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temp = ddb_in32(DDB_PCICTL0_H);
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temp |= 0x80000000;
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ddb_out32(DDB_PCICTL0_H, temp);
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temp &= ~0xc0000000;
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ddb_out32(DDB_PCICTL0_H, temp);
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temp = ddb_in32(DDB_PCICTL1_H);
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temp |= 0x80000000;
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ddb_out32(DDB_PCICTL1_H, temp);
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temp &= ~0xc0000000;
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ddb_out32(DDB_PCICTL1_H, temp);
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}
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