Yijing Wang 777e61ea40 PCI: Use dev->has_secondary_link to find downstream PCIe links ... Previously we assumed that PCIe Root Ports and Downstream Ports had Links on their secondary side. That is true in most systems, but it is possible to connect a switch with either an Upstream or a Downstream Port leading downstream. Instead of relying on the component type to identify devices that have links leading downstream, use the "dev->has_secondary_link" field. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>		2015-05-29 15:35:26 -05:00
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Kconfig	kconfig: use bool instead of boolean for type definition attributes	2015-01-07 13:08:04 +01:00
Kconfig.debug	…
Makefile	…
aer_inject.c	PCI: Merge multi-line quoted strings	2014-06-10 20:20:42 -06:00
aerdrv.c	PCI: Remove aer_do_secondary_bus_reset()	2013-08-14 15:25:59 -06:00
aerdrv.h	PCI: Remove aer_do_secondary_bus_reset()	2013-08-14 15:25:59 -06:00
aerdrv_acpi.c	PCI/AER: Support ACPI HEST AER error sources for PCI domains other than 0	2014-01-13 12:18:55 -07:00
aerdrv_core.c	PCI: Use dev->has_secondary_link to find downstream PCIe links	2015-05-29 15:35:26 -05:00
aerdrv_errprint.c	PCI/AER: Avoid info leak in __print_tlp_header()	2015-03-06 12:30:23 -06:00
ecrc.c	…