258 строки
8.3 KiB
C
258 строки
8.3 KiB
C
#ifndef _ASM_IA64_INTEL_INTRIN_H
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#define _ASM_IA64_INTEL_INTRIN_H
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/*
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* Intel Compiler Intrinsics
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*
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* Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
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* Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
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*
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*/
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#include <asm/types.h>
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void __lfetch(int lfhint, void *y);
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void __lfetch_excl(int lfhint, void *y);
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void __lfetch_fault(int lfhint, void *y);
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void __lfetch_fault_excl(int lfhint, void *y);
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/* In the following, whichFloatReg should be an integer from 0-127 */
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void __ldfs(const int whichFloatReg, void *src);
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void __ldfd(const int whichFloatReg, void *src);
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void __ldfe(const int whichFloatReg, void *src);
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void __ldf8(const int whichFloatReg, void *src);
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void __ldf_fill(const int whichFloatReg, void *src);
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void __stfs(void *dst, const int whichFloatReg);
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void __stfd(void *dst, const int whichFloatReg);
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void __stfe(void *dst, const int whichFloatReg);
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void __stf8(void *dst, const int whichFloatReg);
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void __stf_spill(void *dst, const int whichFloatReg);
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void __st1_rel(void *dst, const __s8 value);
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void __st2_rel(void *dst, const __s16 value);
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void __st4_rel(void *dst, const __s32 value);
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void __st8_rel(void *dst, const __s64 value);
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__u8 __ld1_acq(void *src);
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__u16 __ld2_acq(void *src);
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__u32 __ld4_acq(void *src);
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__u64 __ld8_acq(void *src);
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__u64 __fetchadd4_acq(__u32 *addend, const int increment);
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__u64 __fetchadd4_rel(__u32 *addend, const int increment);
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__u64 __fetchadd8_acq(__u64 *addend, const int increment);
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__u64 __fetchadd8_rel(__u64 *addend, const int increment);
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__u64 __getf_exp(double d);
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/* OS Related Itanium(R) Intrinsics */
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/* The names to use for whichReg and whichIndReg below come from
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the include file asm/ia64regs.h */
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__u64 __getIndReg(const int whichIndReg, __s64 index);
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__u64 __getReg(const int whichReg);
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void __setIndReg(const int whichIndReg, __s64 index, __u64 value);
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void __setReg(const int whichReg, __u64 value);
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void __mf(void);
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void __mfa(void);
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void __synci(void);
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void __itcd(__s64 pa);
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void __itci(__s64 pa);
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void __itrd(__s64 whichTransReg, __s64 pa);
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void __itri(__s64 whichTransReg, __s64 pa);
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void __ptce(__s64 va);
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void __ptcl(__s64 va, __s64 pagesz);
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void __ptcg(__s64 va, __s64 pagesz);
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void __ptcga(__s64 va, __s64 pagesz);
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void __ptri(__s64 va, __s64 pagesz);
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void __ptrd(__s64 va, __s64 pagesz);
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void __invala (void);
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void __invala_gr(const int whichGeneralReg /* 0-127 */ );
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void __invala_fr(const int whichFloatReg /* 0-127 */ );
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void __nop(const int);
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void __fc(__u64 *addr);
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void __sum(int mask);
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void __rum(int mask);
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void __ssm(int mask);
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void __rsm(int mask);
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__u64 __thash(__s64);
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__u64 __ttag(__s64);
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__s64 __tpa(__s64);
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/* Intrinsics for implementing get/put_user macros */
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void __st_user(const char *tableName, __u64 addr, char size, char relocType, __u64 val);
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void __ld_user(const char *tableName, __u64 addr, char size, char relocType);
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/* This intrinsic does not generate code, it creates a barrier across which
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* the compiler will not schedule data access instructions.
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*/
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void __memory_barrier(void);
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void __isrlz(void);
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void __dsrlz(void);
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__u64 _m64_mux1(__u64 a, const int n);
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__u64 __thash(__u64);
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/* Lock and Atomic Operation Related Intrinsics */
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__u64 _InterlockedExchange8(volatile __u8 *trgt, __u8 value);
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__u64 _InterlockedExchange16(volatile __u16 *trgt, __u16 value);
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__s64 _InterlockedExchange(volatile __u32 *trgt, __u32 value);
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__s64 _InterlockedExchange64(volatile __u64 *trgt, __u64 value);
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__u64 _InterlockedCompareExchange8_rel(volatile __u8 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange8_acq(volatile __u8 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange16_rel(volatile __u16 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange16_acq(volatile __u16 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange_rel(volatile __u32 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange_acq(volatile __u32 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange64_rel(volatile __u64 *dest, __u64 xchg, __u64 comp);
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__u64 _InterlockedCompareExchange64_acq(volatile __u64 *dest, __u64 xchg, __u64 comp);
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__s64 _m64_dep_mi(const int v, __s64 s, const int p, const int len);
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__s64 _m64_shrp(__s64 a, __s64 b, const int count);
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__s64 _m64_popcnt(__s64 a);
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#define ia64_barrier() __memory_barrier()
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#define ia64_stop() /* Nothing: As of now stop bit is generated for each
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* intrinsic
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*/
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#define ia64_getreg __getReg
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#define ia64_setreg __setReg
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#define ia64_hint(x)
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#define ia64_mux1_brcst 0
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#define ia64_mux1_mix 8
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#define ia64_mux1_shuf 9
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#define ia64_mux1_alt 10
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#define ia64_mux1_rev 11
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#define ia64_mux1 _m64_mux1
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#define ia64_popcnt _m64_popcnt
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#define ia64_getf_exp __getf_exp
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#define ia64_shrp _m64_shrp
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#define ia64_tpa __tpa
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#define ia64_invala __invala
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#define ia64_invala_gr __invala_gr
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#define ia64_invala_fr __invala_fr
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#define ia64_nop __nop
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#define ia64_sum __sum
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#define ia64_ssm __ssm
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#define ia64_rum __rum
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#define ia64_rsm __rsm
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#define ia64_fc __fc
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#define ia64_ldfs __ldfs
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#define ia64_ldfd __ldfd
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#define ia64_ldfe __ldfe
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#define ia64_ldf8 __ldf8
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#define ia64_ldf_fill __ldf_fill
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#define ia64_stfs __stfs
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#define ia64_stfd __stfd
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#define ia64_stfe __stfe
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#define ia64_stf8 __stf8
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#define ia64_stf_spill __stf_spill
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#define ia64_mf __mf
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#define ia64_mfa __mfa
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#define ia64_fetchadd4_acq __fetchadd4_acq
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#define ia64_fetchadd4_rel __fetchadd4_rel
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#define ia64_fetchadd8_acq __fetchadd8_acq
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#define ia64_fetchadd8_rel __fetchadd8_rel
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#define ia64_xchg1 _InterlockedExchange8
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#define ia64_xchg2 _InterlockedExchange16
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#define ia64_xchg4 _InterlockedExchange
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#define ia64_xchg8 _InterlockedExchange64
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#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel
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#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq
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#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel
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#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq
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#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel
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#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq
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#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel
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#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq
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#define __ia64_set_dbr(index, val) \
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__setIndReg(_IA64_REG_INDR_DBR, index, val)
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#define ia64_set_ibr(index, val) \
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__setIndReg(_IA64_REG_INDR_IBR, index, val)
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#define ia64_set_pkr(index, val) \
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__setIndReg(_IA64_REG_INDR_PKR, index, val)
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#define ia64_set_pmc(index, val) \
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__setIndReg(_IA64_REG_INDR_PMC, index, val)
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#define ia64_set_pmd(index, val) \
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__setIndReg(_IA64_REG_INDR_PMD, index, val)
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#define ia64_set_rr(index, val) \
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__setIndReg(_IA64_REG_INDR_RR, index, val)
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#define ia64_get_cpuid(index) __getIndReg(_IA64_REG_INDR_CPUID, index)
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#define __ia64_get_dbr(index) __getIndReg(_IA64_REG_INDR_DBR, index)
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#define ia64_get_ibr(index) __getIndReg(_IA64_REG_INDR_IBR, index)
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#define ia64_get_pkr(index) __getIndReg(_IA64_REG_INDR_PKR, index)
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#define ia64_get_pmc(index) __getIndReg(_IA64_REG_INDR_PMC, index)
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#define ia64_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index)
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#define ia64_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index)
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#define ia64_srlz_d __dsrlz
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#define ia64_srlz_i __isrlz
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#define ia64_dv_serialize_data()
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#define ia64_dv_serialize_instruction()
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#define ia64_st1_rel __st1_rel
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#define ia64_st2_rel __st2_rel
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#define ia64_st4_rel __st4_rel
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#define ia64_st8_rel __st8_rel
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#define ia64_ld1_acq __ld1_acq
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#define ia64_ld2_acq __ld2_acq
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#define ia64_ld4_acq __ld4_acq
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#define ia64_ld8_acq __ld8_acq
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#define ia64_sync_i __synci
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#define ia64_thash __thash
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#define ia64_ttag __ttag
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#define ia64_itcd __itcd
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#define ia64_itci __itci
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#define ia64_itrd __itrd
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#define ia64_itri __itri
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#define ia64_ptce __ptce
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#define ia64_ptcl __ptcl
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#define ia64_ptcg __ptcg
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#define ia64_ptcga __ptcga
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#define ia64_ptri __ptri
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#define ia64_ptrd __ptrd
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#define ia64_dep_mi _m64_dep_mi
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/* Values for lfhint in __lfetch and __lfetch_fault */
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#define ia64_lfhint_none 0
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#define ia64_lfhint_nt1 1
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#define ia64_lfhint_nt2 2
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#define ia64_lfhint_nta 3
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#define ia64_lfetch __lfetch
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#define ia64_lfetch_excl __lfetch_excl
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#define ia64_lfetch_fault __lfetch_fault
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#define ia64_lfetch_fault_excl __lfetch_fault_excl
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#define ia64_intrin_local_irq_restore(x) \
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do { \
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if ((x) != 0) { \
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ia64_ssm(IA64_PSR_I); \
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ia64_srlz_d(); \
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} else { \
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ia64_rsm(IA64_PSR_I); \
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} \
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} while (0)
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#endif /* _ASM_IA64_INTEL_INTRIN_H */
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