182 строки
5.6 KiB
C
182 строки
5.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/spinlock.h>
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#include <linux/percpu.h>
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#include <linux/kallsyms.h>
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#include <linux/kcore.h>
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#include <asm/cpu_entry_area.h>
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#include <asm/pgtable.h>
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#include <asm/fixmap.h>
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#include <asm/desc.h>
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static DEFINE_PER_CPU_PAGE_ALIGNED(struct entry_stack_page, entry_stack_storage);
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#ifdef CONFIG_X86_64
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static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
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[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]);
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#endif
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struct cpu_entry_area *get_cpu_entry_area(int cpu)
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{
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unsigned long va = CPU_ENTRY_AREA_PER_CPU + cpu * CPU_ENTRY_AREA_SIZE;
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BUILD_BUG_ON(sizeof(struct cpu_entry_area) % PAGE_SIZE != 0);
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return (struct cpu_entry_area *) va;
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}
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EXPORT_SYMBOL(get_cpu_entry_area);
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void cea_set_pte(void *cea_vaddr, phys_addr_t pa, pgprot_t flags)
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{
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unsigned long va = (unsigned long) cea_vaddr;
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pte_t pte = pfn_pte(pa >> PAGE_SHIFT, flags);
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/*
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* The cpu_entry_area is shared between the user and kernel
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* page tables. All of its ptes can safely be global.
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* _PAGE_GLOBAL gets reused to help indicate PROT_NONE for
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* non-present PTEs, so be careful not to set it in that
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* case to avoid confusion.
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*/
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if (boot_cpu_has(X86_FEATURE_PGE) &&
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(pgprot_val(flags) & _PAGE_PRESENT))
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pte = pte_set_flags(pte, _PAGE_GLOBAL);
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set_pte_vaddr(va, pte);
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}
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static void __init
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cea_map_percpu_pages(void *cea_vaddr, void *ptr, int pages, pgprot_t prot)
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{
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for ( ; pages; pages--, cea_vaddr+= PAGE_SIZE, ptr += PAGE_SIZE)
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cea_set_pte(cea_vaddr, per_cpu_ptr_to_phys(ptr), prot);
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}
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static void __init percpu_setup_debug_store(int cpu)
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{
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#ifdef CONFIG_CPU_SUP_INTEL
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int npages;
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void *cea;
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if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
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return;
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cea = &get_cpu_entry_area(cpu)->cpu_debug_store;
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npages = sizeof(struct debug_store) / PAGE_SIZE;
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BUILD_BUG_ON(sizeof(struct debug_store) % PAGE_SIZE != 0);
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cea_map_percpu_pages(cea, &per_cpu(cpu_debug_store, cpu), npages,
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PAGE_KERNEL);
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cea = &get_cpu_entry_area(cpu)->cpu_debug_buffers;
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/*
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* Force the population of PMDs for not yet allocated per cpu
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* memory like debug store buffers.
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*/
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npages = sizeof(struct debug_store_buffers) / PAGE_SIZE;
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for (; npages; npages--, cea += PAGE_SIZE)
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cea_set_pte(cea, 0, PAGE_NONE);
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#endif
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}
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/* Setup the fixmap mappings only once per-processor */
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static void __init setup_cpu_entry_area(int cpu)
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{
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#ifdef CONFIG_X86_64
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/* On 64-bit systems, we use a read-only fixmap GDT and TSS. */
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pgprot_t gdt_prot = PAGE_KERNEL_RO;
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pgprot_t tss_prot = PAGE_KERNEL_RO;
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#else
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/*
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* On native 32-bit systems, the GDT cannot be read-only because
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* our double fault handler uses a task gate, and entering through
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* a task gate needs to change an available TSS to busy. If the
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* GDT is read-only, that will triple fault. The TSS cannot be
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* read-only because the CPU writes to it on task switches.
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*
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* On Xen PV, the GDT must be read-only because the hypervisor
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* requires it.
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*/
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pgprot_t gdt_prot = boot_cpu_has(X86_FEATURE_XENPV) ?
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PAGE_KERNEL_RO : PAGE_KERNEL;
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pgprot_t tss_prot = PAGE_KERNEL;
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#endif
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cea_set_pte(&get_cpu_entry_area(cpu)->gdt, get_cpu_gdt_paddr(cpu),
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gdt_prot);
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cea_map_percpu_pages(&get_cpu_entry_area(cpu)->entry_stack_page,
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per_cpu_ptr(&entry_stack_storage, cpu), 1,
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PAGE_KERNEL);
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/*
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* The Intel SDM says (Volume 3, 7.2.1):
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*
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* Avoid placing a page boundary in the part of the TSS that the
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* processor reads during a task switch (the first 104 bytes). The
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* processor may not correctly perform address translations if a
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* boundary occurs in this area. During a task switch, the processor
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* reads and writes into the first 104 bytes of each TSS (using
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* contiguous physical addresses beginning with the physical address
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* of the first byte of the TSS). So, after TSS access begins, if
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* part of the 104 bytes is not physically contiguous, the processor
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* will access incorrect information without generating a page-fault
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* exception.
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*
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* There are also a lot of errata involving the TSS spanning a page
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* boundary. Assert that we're not doing that.
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*/
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BUILD_BUG_ON((offsetof(struct tss_struct, x86_tss) ^
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offsetofend(struct tss_struct, x86_tss)) & PAGE_MASK);
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BUILD_BUG_ON(sizeof(struct tss_struct) % PAGE_SIZE != 0);
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cea_map_percpu_pages(&get_cpu_entry_area(cpu)->tss,
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&per_cpu(cpu_tss_rw, cpu),
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sizeof(struct tss_struct) / PAGE_SIZE, tss_prot);
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#ifdef CONFIG_X86_32
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per_cpu(cpu_entry_area, cpu) = get_cpu_entry_area(cpu);
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#endif
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#ifdef CONFIG_X86_64
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BUILD_BUG_ON(sizeof(exception_stacks) % PAGE_SIZE != 0);
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BUILD_BUG_ON(sizeof(exception_stacks) !=
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sizeof(((struct cpu_entry_area *)0)->exception_stacks));
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cea_map_percpu_pages(&get_cpu_entry_area(cpu)->exception_stacks,
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&per_cpu(exception_stacks, cpu),
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sizeof(exception_stacks) / PAGE_SIZE, PAGE_KERNEL);
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#endif
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percpu_setup_debug_store(cpu);
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}
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static __init void setup_cpu_entry_area_ptes(void)
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{
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#ifdef CONFIG_X86_32
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unsigned long start, end;
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BUILD_BUG_ON(CPU_ENTRY_AREA_PAGES * PAGE_SIZE < CPU_ENTRY_AREA_MAP_SIZE);
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BUG_ON(CPU_ENTRY_AREA_BASE & ~PMD_MASK);
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start = CPU_ENTRY_AREA_BASE;
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end = start + CPU_ENTRY_AREA_MAP_SIZE;
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/* Careful here: start + PMD_SIZE might wrap around */
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for (; start < end && start >= CPU_ENTRY_AREA_BASE; start += PMD_SIZE)
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populate_extra_pte(start);
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#endif
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}
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void __init setup_cpu_entry_areas(void)
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{
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unsigned int cpu;
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setup_cpu_entry_area_ptes();
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for_each_possible_cpu(cpu)
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setup_cpu_entry_area(cpu);
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/*
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* This is the last essential update to swapper_pgdir which needs
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* to be synchronized to initial_page_table on 32bit.
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*/
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sync_initial_page_table();
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}
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