Keerthy ced3068344 clk: ti: divider: Add the table parsing to get the best divider value ... Currently the divider selection logic blindly divides the parent_rate by the clk rate and gives the divider value for the divider clocks which do not have the CLK_SET_RATE_PARENT flag set. Add the clk divider table parsing to get the closest divider available in the table provided via Device tree. The code is pretty much taken from: drivers/clk/clk-divider.c. and used here to fix up the best divider selection logic. Signed-off-by: Keerthy <j-keerthy@ti.com> Reported-by: Richard Woodruff <r-woodruff2@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2017-01-26 16:03:04 -08:00
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Kconfig	clk: ti: Add support for dm814x ADPLL	2016-03-01 16:21:25 -08:00
Makefile	clk: ti: Allow COMPILE_TEST to build selected drivers	2016-03-01 16:21:25 -08:00
adpll.c	clk: ti: Fix some errors found by static checkers	2016-03-01 16:21:25 -08:00
apll.c	clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrs	2016-02-22 14:16:49 -08:00
autoidle.c	clk: ti: Convert to clk_hw based provider APIs	2015-08-24 16:48:58 -07:00
clk-2xxx.c	…
clk-3xxx-legacy.c	…
clk-3xxx.c	clk: ti: omap36xx: Work around sprz319 advisory 2.1	2016-12-08 13:15:25 -08:00
clk-7xx.c	clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message	2016-12-08 15:09:12 -08:00
clk-33xx.c	clk: ti: am335x/am4372: Add tbclk to pwm node	2016-06-10 03:25:04 -07:00
clk-43xx.c	ARM: DT updates for v4.8	2016-08-01 18:37:45 -04:00
clk-44xx.c	…
clk-54xx.c	clk: ti: dra7: fix kernel boot with arg 'clocksource=gp_timer'	2016-04-15 17:30:07 -07:00
clk-814x.c	clk: ti: Fix some errors found by static checkers	2016-03-01 16:21:25 -08:00
clk-816x.c	clk: ti816x: Add missing dmtimer clkdev entries	2015-11-24 11:30:27 +02:00
clk-dra7-atl.c	clk: ti: make clk-dra7-atl explicitly non-modular	2016-11-04 13:34:14 -07:00
clk.c	clk: ti: Remove CLK_IS_ROOT	2016-03-02 17:47:46 -08:00
clkt_dflt.c	clk: ti: dflt: remove redundant unlikely	2016-04-15 15:52:48 -07:00
clkt_dpll.c	clk: ti: dpll: add support for specifying max rate for DPLLs	2016-04-15 17:26:18 -07:00
clkt_iclk.c	…
clock.h	clk: ti: omap36xx: Work around sprz319 advisory 2.1	2016-12-08 13:15:25 -08:00
clockdomain.c	clk: ti: Update for of_clk_get_parent_count() returning unsigned int	2016-02-26 16:01:32 -08:00
composite.c	clk: ti: Update for of_clk_get_parent_count() returning unsigned int	2016-02-26 16:01:32 -08:00
divider.c	clk: ti: divider: Add the table parsing to get the best divider value	2017-01-26 16:03:04 -08:00
dpll.c	clk: ti: omap36xx: Work around sprz319 advisory 2.1	2016-12-08 13:15:25 -08:00
dpll3xxx.c	clk: ti: omap36xx: Work around sprz319 advisory 2.1	2016-12-08 13:15:25 -08:00
dpll44xx.c	clk: ti: dpll: convert DPLL support code to use clk_hw instead of clk ptrs	2016-02-22 14:16:49 -08:00
fapll.c	clk: ti: fapll: fix wrong do_div() usage	2015-11-24 11:30:27 +02:00
fixed-factor.c	…
gate.c	clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h	2016-01-29 12:59:50 -08:00
interface.c	clk: Convert __clk_get_flags() to clk_hw_get_flags()	2015-08-24 16:48:44 -07:00
mux.c	clk: ti: Update for of_clk_get_parent_count() returning unsigned int	2016-02-26 16:01:32 -08:00