475 строки
10 KiB
C
475 строки
10 KiB
C
/*
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* arch/xtensa/kernel/setup.c
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1995 Linus Torvalds
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*
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* Chris Zankel <chris@zankel.net>
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* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
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* Kevin Chea
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* Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/proc_fs.h>
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#include <linux/screen_info.h>
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#include <linux/bootmem.h>
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#include <linux/kernel.h>
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#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
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# include <linux/console.h>
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#endif
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#ifdef CONFIG_RTC
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# include <linux/timex.h>
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#endif
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#ifdef CONFIG_PROC_FS
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# include <linux/seq_file.h>
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#endif
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#include <asm/system.h>
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#include <asm/bootparam.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/timex.h>
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#include <asm/platform.h>
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#include <asm/page.h>
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#include <asm/setup.h>
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#include <asm/param.h>
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#include <platform/hardware.h>
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#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
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struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
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#endif
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#ifdef CONFIG_BLK_DEV_FD
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extern struct fd_ops no_fd_ops;
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struct fd_ops *fd_ops;
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#endif
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extern struct rtc_ops no_rtc_ops;
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struct rtc_ops *rtc_ops;
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#ifdef CONFIG_BLK_DEV_INITRD
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extern void *initrd_start;
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extern void *initrd_end;
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extern void *__initrd_start;
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extern void *__initrd_end;
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int initrd_is_mapped = 0;
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extern int initrd_below_start_ok;
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#endif
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unsigned char aux_device_present;
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extern unsigned long loops_per_jiffy;
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/* Command line specified as configuration option. */
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static char __initdata command_line[COMMAND_LINE_SIZE];
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#ifdef CONFIG_CMDLINE_BOOL
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static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
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#endif
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sysmem_info_t __initdata sysmem;
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#ifdef CONFIG_BLK_DEV_INITRD
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int initrd_is_mapped;
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#endif
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extern void init_mmu(void);
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/*
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* Boot parameter parsing.
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*
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* The Xtensa port uses a list of variable-sized tags to pass data to
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* the kernel. The first tag must be a BP_TAG_FIRST tag for the list
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* to be recognised. The list is terminated with a zero-sized
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* BP_TAG_LAST tag.
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*/
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typedef struct tagtable {
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u32 tag;
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int (*parse)(const bp_tag_t*);
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} tagtable_t;
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#define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
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__attribute__((unused, __section__(".taglist"))) = { tag, fn }
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/* parse current tag */
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static int __init parse_tag_mem(const bp_tag_t *tag)
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{
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meminfo_t *mi = (meminfo_t*)(tag->data);
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if (mi->type != MEMORY_TYPE_CONVENTIONAL)
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return -1;
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if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
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printk(KERN_WARNING
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"Ignoring memory bank 0x%08lx size %ldKB\n",
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(unsigned long)mi->start,
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(unsigned long)mi->end - (unsigned long)mi->start);
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return -EINVAL;
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}
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sysmem.bank[sysmem.nr_banks].type = mi->type;
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sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
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sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE;
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sysmem.nr_banks++;
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return 0;
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}
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__tagtable(BP_TAG_MEMORY, parse_tag_mem);
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#ifdef CONFIG_BLK_DEV_INITRD
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static int __init parse_tag_initrd(const bp_tag_t* tag)
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{
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meminfo_t* mi;
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mi = (meminfo_t*)(tag->data);
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initrd_start = (void*)(mi->start);
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initrd_end = (void*)(mi->end);
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return 0;
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}
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__tagtable(BP_TAG_INITRD, parse_tag_initrd);
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#endif /* CONFIG_BLK_DEV_INITRD */
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static int __init parse_tag_cmdline(const bp_tag_t* tag)
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{
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strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
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command_line[COMMAND_LINE_SIZE - 1] = '\0';
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return 0;
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}
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__tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
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static int __init parse_bootparam(const bp_tag_t* tag)
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{
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extern tagtable_t __tagtable_begin, __tagtable_end;
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tagtable_t *t;
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/* Boot parameters must start with a BP_TAG_FIRST tag. */
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if (tag->id != BP_TAG_FIRST) {
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printk(KERN_WARNING "Invalid boot parameters!\n");
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return 0;
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}
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tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
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/* Parse all tags. */
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while (tag != NULL && tag->id != BP_TAG_LAST) {
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for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
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if (tag->id == t->tag) {
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t->parse(tag);
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break;
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}
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}
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if (t == &__tagtable_end)
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printk(KERN_WARNING "Ignoring tag "
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"0x%08x\n", tag->id);
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tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
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}
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return 0;
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}
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/*
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* Initialize architecture. (Early stage)
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*/
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void __init init_arch(bp_tag_t *bp_start)
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{
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#ifdef CONFIG_BLK_DEV_INITRD
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initrd_start = &__initrd_start;
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initrd_end = &__initrd_end;
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#endif
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sysmem.nr_banks = 0;
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#ifdef CONFIG_CMDLINE_BOOL
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strcpy(command_line, default_command_line);
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#endif
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/* Parse boot parameters */
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if (bp_start)
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parse_bootparam(bp_start);
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if (sysmem.nr_banks == 0) {
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sysmem.nr_banks = 1;
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sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
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sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
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+ PLATFORM_DEFAULT_MEM_SIZE;
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}
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/* Early hook for platforms */
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platform_init(bp_start);
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/* Initialize MMU. */
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init_mmu();
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}
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/*
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* Initialize system. Setup memory and reserve regions.
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*/
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extern char _end;
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extern char _stext;
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extern char _WindowVectors_text_start;
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extern char _WindowVectors_text_end;
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extern char _DebugInterruptVector_literal_start;
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extern char _DebugInterruptVector_text_end;
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extern char _KernelExceptionVector_literal_start;
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extern char _KernelExceptionVector_text_end;
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extern char _UserExceptionVector_literal_start;
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extern char _UserExceptionVector_text_end;
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extern char _DoubleExceptionVector_literal_start;
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extern char _DoubleExceptionVector_text_end;
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void __init setup_arch(char **cmdline_p)
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{
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extern int mem_reserve(unsigned long, unsigned long, int);
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extern void bootmem_init(void);
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memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
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boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
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*cmdline_p = command_line;
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/* Reserve some memory regions */
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start < initrd_end) {
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initrd_is_mapped = mem_reserve(__pa(initrd_start),
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__pa(initrd_end), 0);
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initrd_below_start_ok = 1;
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} else {
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initrd_start = 0;
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}
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#endif
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mem_reserve(__pa(&_stext),__pa(&_end), 1);
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mem_reserve(__pa(&_WindowVectors_text_start),
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__pa(&_WindowVectors_text_end), 0);
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mem_reserve(__pa(&_DebugInterruptVector_literal_start),
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__pa(&_DebugInterruptVector_text_end), 0);
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mem_reserve(__pa(&_KernelExceptionVector_literal_start),
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__pa(&_KernelExceptionVector_text_end), 0);
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mem_reserve(__pa(&_UserExceptionVector_literal_start),
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__pa(&_UserExceptionVector_text_end), 0);
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mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
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__pa(&_DoubleExceptionVector_text_end), 0);
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bootmem_init();
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platform_setup(cmdline_p);
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paging_init();
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#ifdef CONFIG_VT
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# if defined(CONFIG_VGA_CONSOLE)
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conswitchp = &vga_con;
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# elif defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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# endif
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#endif
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#ifdef CONFIG_PCI
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platform_pcibios_init();
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#endif
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}
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void machine_restart(char * cmd)
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{
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platform_restart();
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}
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void machine_halt(void)
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{
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platform_halt();
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while (1);
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}
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void machine_power_off(void)
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{
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platform_power_off();
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while (1);
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}
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#ifdef CONFIG_PROC_FS
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/*
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* Display some core information through /proc/cpuinfo.
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*/
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static int
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c_show(struct seq_file *f, void *slot)
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{
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/* high-level stuff */
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seq_printf(f,"processor\t: 0\n"
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"vendor_id\t: Tensilica\n"
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"model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
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"core ID\t\t: " XCHAL_CORE_ID "\n"
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"build ID\t: 0x%x\n"
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"byte order\t: %s\n"
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"cpu MHz\t\t: %lu.%02lu\n"
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"bogomips\t: %lu.%02lu\n",
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XCHAL_BUILD_UNIQUE_ID,
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XCHAL_HAVE_BE ? "big" : "little",
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CCOUNT_PER_JIFFY/(1000000/HZ),
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(CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
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loops_per_jiffy/(500000/HZ),
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(loops_per_jiffy/(5000/HZ)) % 100);
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seq_printf(f,"flags\t\t: "
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#if XCHAL_HAVE_NMI
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"nmi "
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#endif
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#if XCHAL_HAVE_DEBUG
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"debug "
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# if XCHAL_HAVE_OCD
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"ocd "
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# endif
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#endif
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#if XCHAL_HAVE_DENSITY
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"density "
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#endif
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#if XCHAL_HAVE_BOOLEANS
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"boolean "
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#endif
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#if XCHAL_HAVE_LOOPS
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"loop "
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#endif
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#if XCHAL_HAVE_NSA
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"nsa "
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#endif
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#if XCHAL_HAVE_MINMAX
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"minmax "
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#endif
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#if XCHAL_HAVE_SEXT
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"sext "
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#endif
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#if XCHAL_HAVE_CLAMPS
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"clamps "
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#endif
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#if XCHAL_HAVE_MAC16
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"mac16 "
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#endif
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#if XCHAL_HAVE_MUL16
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"mul16 "
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#endif
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#if XCHAL_HAVE_MUL32
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"mul32 "
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#endif
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#if XCHAL_HAVE_MUL32_HIGH
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"mul32h "
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#endif
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#if XCHAL_HAVE_FP
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"fpu "
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#endif
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"\n");
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/* Registers. */
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seq_printf(f,"physical aregs\t: %d\n"
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"misc regs\t: %d\n"
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"ibreak\t\t: %d\n"
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"dbreak\t\t: %d\n",
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XCHAL_NUM_AREGS,
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XCHAL_NUM_MISC_REGS,
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XCHAL_NUM_IBREAK,
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XCHAL_NUM_DBREAK);
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/* Interrupt. */
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seq_printf(f,"num ints\t: %d\n"
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"ext ints\t: %d\n"
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"int levels\t: %d\n"
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"timers\t\t: %d\n"
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"debug level\t: %d\n",
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XCHAL_NUM_INTERRUPTS,
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XCHAL_NUM_EXTINTERRUPTS,
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XCHAL_NUM_INTLEVELS,
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XCHAL_NUM_TIMERS,
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XCHAL_DEBUGLEVEL);
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/* Cache */
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seq_printf(f,"icache line size: %d\n"
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"icache ways\t: %d\n"
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"icache size\t: %d\n"
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"icache flags\t: "
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#if XCHAL_ICACHE_LINE_LOCKABLE
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"lock"
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#endif
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"\n"
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"dcache line size: %d\n"
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"dcache ways\t: %d\n"
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"dcache size\t: %d\n"
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"dcache flags\t: "
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#if XCHAL_DCACHE_IS_WRITEBACK
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"writeback"
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#endif
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#if XCHAL_DCACHE_LINE_LOCKABLE
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"lock"
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#endif
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"\n",
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XCHAL_ICACHE_LINESIZE,
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XCHAL_ICACHE_WAYS,
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XCHAL_ICACHE_SIZE,
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XCHAL_DCACHE_LINESIZE,
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XCHAL_DCACHE_WAYS,
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XCHAL_DCACHE_SIZE);
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return 0;
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}
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/*
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* We show only CPU #0 info.
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*/
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static void *
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c_start(struct seq_file *f, loff_t *pos)
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{
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return (void *) ((*pos == 0) ? (void *)1 : NULL);
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}
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static void *
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c_next(struct seq_file *f, void *v, loff_t *pos)
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{
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return NULL;
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}
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static void
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c_stop(struct seq_file *f, void *v)
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{
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}
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const struct seq_operations cpuinfo_op =
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{
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start: c_start,
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next: c_next,
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stop: c_stop,
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show: c_show
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};
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#endif /* CONFIG_PROC_FS */
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