Masahiro Yamada 5c6201e60a clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs ... I made a mistake as for naming for this block. The MIO block is not implemented for these 3 SoCs in the first place. The current naming will be a trouble if an SoC with both MIO and SD-ctrl blocks appear in the future. This driver has just been merged in the previous merge window. Rename it before the release. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2016-10-19 13:15:05 -07:00
..
Kconfig	…
Makefile	clk: uniphier: add clock data for UniPhier SoCs	2016-09-16 16:31:38 -07:00
clk-uniphier-core.c	clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs	2016-10-19 13:15:05 -07:00
clk-uniphier-fixed-factor.c	…
clk-uniphier-fixed-rate.c	…
clk-uniphier-gate.c	…
clk-uniphier-mio.c	clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs	2016-10-19 13:15:05 -07:00
clk-uniphier-mux.c	clk: uniphier: fix type of variable passed to regmap_read()	2016-10-17 15:20:52 -07:00
clk-uniphier-peri.c	clk: uniphier: add clock data for UniPhier SoCs	2016-09-16 16:31:38 -07:00
clk-uniphier-sys.c	clk: uniphier: add clock data for UniPhier SoCs	2016-09-16 16:31:38 -07:00
clk-uniphier.h	clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs	2016-10-19 13:15:05 -07:00