WSL2-Linux-Kernel/drivers/clk/renesas
Geert Uytterhoeven d04a75af45 clk: renesas: cpg-mssr: Use always-on governor for Clock Domain
As a pure Clock Domain does not have the concept of powering the domain
itself, the CPG/MSTP driver does not provide power_off() and power_on()
callbacks.
However, the genpd core may still perform a dummy power down, causing
/sys/kernel/debug/pm_genpd/pm_genpd_summary to report the domain's
status being "off-0".

Use the always-on governor to make sure the domain is never powered
down, and always shows up as "on" in pm_genpd_summary.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-04-28 10:32:55 +02:00
..
Kconfig clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support 2016-04-20 09:16:58 +02:00
Makefile clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support 2016-04-20 09:16:58 +02:00
clk-div6.c
clk-div6.h clk: renesas: div6: use RENESAS for #define 2016-03-15 18:13:02 -07:00
clk-emev2.c
clk-mstp.c clk: renesas: mstp: Use always-on governor for Clock Domain 2016-04-28 10:32:51 +02:00
clk-r8a73a4.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
clk-r8a7740.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
clk-r8a7778.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
clk-r8a7779.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
clk-rcar-gen2.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
clk-rz.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
clk-sh73a0.c clk: renesas: Rename header file renesas.h 2016-03-15 18:12:14 -07:00
r8a7795-cpg-mssr.c clk: renesas: r8a7795: Add VIN clocks 2016-04-26 08:59:49 +02:00
renesas-cpg-mssr.c clk: renesas: cpg-mssr: Use always-on governor for Clock Domain 2016-04-28 10:32:55 +02:00
renesas-cpg-mssr.h clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocks 2016-04-06 09:48:37 +02:00