189 строки
4.5 KiB
C
189 строки
4.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* User address space access functions.
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*
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* Copyright 1997 Andi Kleen <ak@muc.de>
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* Copyright 1997 Linus Torvalds
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* Copyright 2002 Andi Kleen <ak@suse.de>
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*/
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#include <linux/export.h>
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#include <linux/uaccess.h>
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#include <linux/highmem.h>
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/*
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* Zero Userspace
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*/
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unsigned long __clear_user(void __user *addr, unsigned long size)
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{
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long __d0;
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might_fault();
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/* no memory constraint because it doesn't change any memory gcc knows
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about */
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stac();
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asm volatile(
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" testq %[size8],%[size8]\n"
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" jz 4f\n"
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" .align 16\n"
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"0: movq $0,(%[dst])\n"
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" addq $8,%[dst]\n"
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" decl %%ecx ; jnz 0b\n"
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"4: movq %[size1],%%rcx\n"
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" testl %%ecx,%%ecx\n"
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" jz 2f\n"
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"1: movb $0,(%[dst])\n"
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" incq %[dst]\n"
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" decl %%ecx ; jnz 1b\n"
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"2:\n"
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_ASM_EXTABLE_TYPE_REG(0b, 2b, EX_TYPE_UCOPY_LEN8, %[size1])
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_ASM_EXTABLE_UA(1b, 2b)
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: [size8] "=&c"(size), [dst] "=&D" (__d0)
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: [size1] "r"(size & 7), "[size8]" (size / 8), "[dst]"(addr));
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clac();
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return size;
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}
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EXPORT_SYMBOL(__clear_user);
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unsigned long clear_user(void __user *to, unsigned long n)
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{
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if (access_ok(to, n))
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return __clear_user(to, n);
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return n;
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}
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EXPORT_SYMBOL(clear_user);
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#ifdef CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE
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/**
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* clean_cache_range - write back a cache range with CLWB
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* @vaddr: virtual start address
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* @size: number of bytes to write back
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*
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* Write back a cache range using the CLWB (cache line write back)
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* instruction. Note that @size is internally rounded up to be cache
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* line size aligned.
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*/
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static void clean_cache_range(void *addr, size_t size)
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{
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u16 x86_clflush_size = boot_cpu_data.x86_clflush_size;
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unsigned long clflush_mask = x86_clflush_size - 1;
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void *vend = addr + size;
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void *p;
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for (p = (void *)((unsigned long)addr & ~clflush_mask);
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p < vend; p += x86_clflush_size)
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clwb(p);
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}
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void arch_wb_cache_pmem(void *addr, size_t size)
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{
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clean_cache_range(addr, size);
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}
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EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
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long __copy_user_flushcache(void *dst, const void __user *src, unsigned size)
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{
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unsigned long flushed, dest = (unsigned long) dst;
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long rc = __copy_user_nocache(dst, src, size, 0);
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/*
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* __copy_user_nocache() uses non-temporal stores for the bulk
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* of the transfer, but we need to manually flush if the
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* transfer is unaligned. A cached memory copy is used when
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* destination or size is not naturally aligned. That is:
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* - Require 8-byte alignment when size is 8 bytes or larger.
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* - Require 4-byte alignment when size is 4 bytes.
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*/
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if (size < 8) {
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if (!IS_ALIGNED(dest, 4) || size != 4)
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clean_cache_range(dst, size);
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} else {
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if (!IS_ALIGNED(dest, 8)) {
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dest = ALIGN(dest, boot_cpu_data.x86_clflush_size);
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clean_cache_range(dst, 1);
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}
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flushed = dest - (unsigned long) dst;
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if (size > flushed && !IS_ALIGNED(size - flushed, 8))
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clean_cache_range(dst + size - 1, 1);
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}
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return rc;
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}
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void __memcpy_flushcache(void *_dst, const void *_src, size_t size)
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{
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unsigned long dest = (unsigned long) _dst;
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unsigned long source = (unsigned long) _src;
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/* cache copy and flush to align dest */
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if (!IS_ALIGNED(dest, 8)) {
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size_t len = min_t(size_t, size, ALIGN(dest, 8) - dest);
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memcpy((void *) dest, (void *) source, len);
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clean_cache_range((void *) dest, len);
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dest += len;
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source += len;
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size -= len;
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if (!size)
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return;
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}
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/* 4x8 movnti loop */
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while (size >= 32) {
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asm("movq (%0), %%r8\n"
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"movq 8(%0), %%r9\n"
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"movq 16(%0), %%r10\n"
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"movq 24(%0), %%r11\n"
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"movnti %%r8, (%1)\n"
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"movnti %%r9, 8(%1)\n"
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"movnti %%r10, 16(%1)\n"
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"movnti %%r11, 24(%1)\n"
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:: "r" (source), "r" (dest)
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: "memory", "r8", "r9", "r10", "r11");
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dest += 32;
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source += 32;
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size -= 32;
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}
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/* 1x8 movnti loop */
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while (size >= 8) {
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asm("movq (%0), %%r8\n"
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"movnti %%r8, (%1)\n"
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:: "r" (source), "r" (dest)
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: "memory", "r8");
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dest += 8;
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source += 8;
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size -= 8;
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}
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/* 1x4 movnti loop */
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while (size >= 4) {
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asm("movl (%0), %%r8d\n"
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"movnti %%r8d, (%1)\n"
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:: "r" (source), "r" (dest)
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: "memory", "r8");
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dest += 4;
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source += 4;
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size -= 4;
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}
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/* cache copy for remaining bytes */
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if (size) {
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memcpy((void *) dest, (void *) source, size);
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clean_cache_range((void *) dest, size);
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}
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}
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EXPORT_SYMBOL_GPL(__memcpy_flushcache);
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void memcpy_page_flushcache(char *to, struct page *page, size_t offset,
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size_t len)
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{
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char *from = kmap_atomic(page);
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memcpy_flushcache(to, from + offset, len);
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kunmap_atomic(from);
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}
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#endif
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