419 строки
10 KiB
C
419 строки
10 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/kprobes.h>
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#include <linux/kdebug.h>
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#include <linux/module.h>
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#include <linux/reboot.h>
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#include <linux/uaccess.h>
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#include <linux/ptrace.h>
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#include <linux/hardirq.h>
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#include <linux/nmi.h>
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#include <asm/stack.h>
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#include <asm/traps.h>
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#include <asm/setup.h>
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#include <arch/interrupts.h>
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#include <arch/spr_def.h>
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#include <arch/opcode.h>
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void __init trap_init(void)
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{
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/* Nothing needed here since we link code at .intrpt */
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}
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int unaligned_fixup = 1;
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static int __init setup_unaligned_fixup(char *str)
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{
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/*
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* Say "=-1" to completely disable it. If you just do "=0", we
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* will still parse the instruction, then fire a SIGBUS with
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* the correct address from inside the single_step code.
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*/
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if (kstrtoint(str, 0, &unaligned_fixup) != 0)
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return 0;
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pr_info("Fixups for unaligned data accesses are %s\n",
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unaligned_fixup >= 0 ?
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(unaligned_fixup ? "enabled" : "disabled") :
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"completely disabled");
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return 1;
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}
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__setup("unaligned_fixup=", setup_unaligned_fixup);
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#if CHIP_HAS_TILE_DMA()
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static int dma_disabled;
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static int __init nodma(char *str)
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{
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pr_info("User-space DMA is disabled\n");
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dma_disabled = 1;
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return 1;
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}
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__setup("nodma", nodma);
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/* How to decode SPR_GPV_REASON */
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#define IRET_ERROR (1U << 31)
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#define MT_ERROR (1U << 30)
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#define MF_ERROR (1U << 29)
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#define SPR_INDEX ((1U << 15) - 1)
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#define SPR_MPL_SHIFT 9 /* starting bit position for MPL encoded in SPR */
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/*
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* See if this GPV is just to notify the kernel of SPR use and we can
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* retry the user instruction after adjusting some MPLs suitably.
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*/
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static int retry_gpv(unsigned int gpv_reason)
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{
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int mpl;
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if (gpv_reason & IRET_ERROR)
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return 0;
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BUG_ON((gpv_reason & (MT_ERROR|MF_ERROR)) == 0);
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mpl = (gpv_reason & SPR_INDEX) >> SPR_MPL_SHIFT;
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if (mpl == INT_DMA_NOTIFY && !dma_disabled) {
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/* User is turning on DMA. Allow it and retry. */
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printk(KERN_DEBUG "Process %d/%s is now enabled for DMA\n",
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current->pid, current->comm);
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BUG_ON(current->thread.tile_dma_state.enabled);
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current->thread.tile_dma_state.enabled = 1;
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grant_dma_mpls();
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return 1;
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}
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return 0;
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}
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#endif /* CHIP_HAS_TILE_DMA() */
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extern tile_bundle_bits bpt_code;
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asm(".pushsection .rodata.bpt_code,\"a\";"
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".align 8;"
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"bpt_code: bpt;"
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".size bpt_code,.-bpt_code;"
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".popsection");
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static int special_ill(tile_bundle_bits bundle, int *sigp, int *codep)
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{
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int sig, code, maxcode;
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if (bundle == bpt_code) {
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*sigp = SIGTRAP;
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*codep = TRAP_BRKPT;
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return 1;
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}
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/* If it's a "raise" bundle, then "ill" must be in pipe X1. */
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#ifdef __tilegx__
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if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
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return 0;
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if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
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return 0;
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if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
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return 0;
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if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
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return 0;
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#else
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if (bundle & TILEPRO_BUNDLE_Y_ENCODING_MASK)
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return 0;
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if (get_Opcode_X1(bundle) != SHUN_0_OPCODE_X1)
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return 0;
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if (get_UnShOpcodeExtension_X1(bundle) != UN_0_SHUN_0_OPCODE_X1)
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return 0;
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if (get_UnOpcodeExtension_X1(bundle) != ILL_UN_0_SHUN_0_OPCODE_X1)
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return 0;
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#endif
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/* Check that the magic distinguishers are set to mean "raise". */
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if (get_Dest_X1(bundle) != 29 || get_SrcA_X1(bundle) != 37)
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return 0;
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/* There must be an "addli zero, zero, VAL" in X0. */
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if (get_Opcode_X0(bundle) != ADDLI_OPCODE_X0)
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return 0;
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if (get_Dest_X0(bundle) != TREG_ZERO)
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return 0;
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if (get_SrcA_X0(bundle) != TREG_ZERO)
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return 0;
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/*
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* Validate the proposed signal number and si_code value.
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* Note that we embed these in the static instruction itself
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* so that we perturb the register state as little as possible
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* at the time of the actual fault; it's unlikely you'd ever
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* need to dynamically choose which kind of fault to raise
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* from user space.
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*/
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sig = get_Imm16_X0(bundle) & 0x3f;
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switch (sig) {
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case SIGILL:
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maxcode = NSIGILL;
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break;
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case SIGFPE:
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maxcode = NSIGFPE;
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break;
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case SIGSEGV:
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maxcode = NSIGSEGV;
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break;
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case SIGBUS:
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maxcode = NSIGBUS;
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break;
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case SIGTRAP:
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maxcode = NSIGTRAP;
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break;
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default:
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return 0;
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}
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code = (get_Imm16_X0(bundle) >> 6) & 0xf;
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if (code <= 0 || code > maxcode)
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return 0;
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/* Make it the requested signal. */
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*sigp = sig;
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*codep = code | __SI_FAULT;
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return 1;
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}
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static const char *const int_name[] = {
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[INT_MEM_ERROR] = "Memory error",
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[INT_ILL] = "Illegal instruction",
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[INT_GPV] = "General protection violation",
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[INT_UDN_ACCESS] = "UDN access",
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[INT_IDN_ACCESS] = "IDN access",
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#if CHIP_HAS_SN()
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[INT_SN_ACCESS] = "SN access",
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#endif
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[INT_SWINT_3] = "Software interrupt 3",
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[INT_SWINT_2] = "Software interrupt 2",
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[INT_SWINT_0] = "Software interrupt 0",
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[INT_UNALIGN_DATA] = "Unaligned data",
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[INT_DOUBLE_FAULT] = "Double fault",
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#ifdef __tilegx__
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[INT_ILL_TRANS] = "Illegal virtual address",
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#endif
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};
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static int do_bpt(struct pt_regs *regs)
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{
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unsigned long bundle, bcode, bpt;
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bundle = *(unsigned long *)instruction_pointer(regs);
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/*
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* bpt shoule be { bpt; nop }, which is 0x286a44ae51485000ULL.
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* we encode the unused least significant bits for other purpose.
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*/
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bpt = bundle & ~((1ULL << 12) - 1);
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if (bpt != TILE_BPT_BUNDLE)
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return 0;
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bcode = bundle & ((1ULL << 12) - 1);
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/*
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* notify the kprobe handlers, if instruction is likely to
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* pertain to them.
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*/
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switch (bcode) {
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/* breakpoint_insn */
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case 0:
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notify_die(DIE_BREAK, "debug", regs, bundle,
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INT_ILL, SIGTRAP);
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break;
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/* compiled_bpt */
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case DIE_COMPILED_BPT:
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notify_die(DIE_COMPILED_BPT, "debug", regs, bundle,
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INT_ILL, SIGTRAP);
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break;
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/* breakpoint2_insn */
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case DIE_SSTEPBP:
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notify_die(DIE_SSTEPBP, "single_step", regs, bundle,
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INT_ILL, SIGTRAP);
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break;
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default:
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return 0;
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}
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return 1;
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}
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void __kprobes do_trap(struct pt_regs *regs, int fault_num,
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unsigned long reason)
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{
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siginfo_t info = { 0 };
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int signo, code;
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unsigned long address = 0;
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tile_bundle_bits instr;
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int is_kernel = !user_mode(regs);
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/* Handle breakpoints, etc. */
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if (is_kernel && fault_num == INT_ILL && do_bpt(regs))
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return;
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/* Re-enable interrupts, if they were previously enabled. */
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if (!(regs->flags & PT_FLAGS_DISABLE_IRQ))
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local_irq_enable();
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/*
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* If it hits in kernel mode and we can't fix it up, just exit the
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* current process and hope for the best.
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*/
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if (is_kernel) {
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const char *name;
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char buf[100];
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if (fixup_exception(regs)) /* ILL_TRANS or UNALIGN_DATA */
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return;
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if (fault_num >= 0 &&
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fault_num < ARRAY_SIZE(int_name) &&
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int_name[fault_num] != NULL)
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name = int_name[fault_num];
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else
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name = "Unknown interrupt";
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if (fault_num == INT_GPV)
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snprintf(buf, sizeof(buf), "; GPV_REASON %#lx", reason);
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#ifdef __tilegx__
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else if (fault_num == INT_ILL_TRANS)
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snprintf(buf, sizeof(buf), "; address %#lx", reason);
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#endif
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else
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buf[0] = '\0';
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pr_alert("Kernel took bad trap %d (%s) at PC %#lx%s\n",
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fault_num, name, regs->pc, buf);
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show_regs(regs);
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do_exit(SIGKILL); /* FIXME: implement i386 die() */
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}
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switch (fault_num) {
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case INT_MEM_ERROR:
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signo = SIGBUS;
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code = BUS_OBJERR;
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break;
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case INT_ILL:
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if (copy_from_user(&instr, (void __user *)regs->pc,
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sizeof(instr))) {
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pr_err("Unreadable instruction for INT_ILL: %#lx\n",
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regs->pc);
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do_exit(SIGKILL);
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}
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if (!special_ill(instr, &signo, &code)) {
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signo = SIGILL;
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code = ILL_ILLOPC;
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}
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address = regs->pc;
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break;
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case INT_GPV:
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#if CHIP_HAS_TILE_DMA()
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if (retry_gpv(reason))
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return;
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#endif
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/*FALLTHROUGH*/
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case INT_UDN_ACCESS:
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case INT_IDN_ACCESS:
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#if CHIP_HAS_SN()
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case INT_SN_ACCESS:
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#endif
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signo = SIGILL;
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code = ILL_PRVREG;
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address = regs->pc;
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break;
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case INT_SWINT_3:
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case INT_SWINT_2:
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case INT_SWINT_0:
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signo = SIGILL;
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code = ILL_ILLTRP;
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address = regs->pc;
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break;
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case INT_UNALIGN_DATA:
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#ifndef __tilegx__ /* Emulated support for single step debugging */
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if (unaligned_fixup >= 0) {
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struct single_step_state *state =
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current_thread_info()->step_state;
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if (!state ||
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(void __user *)(regs->pc) != state->buffer) {
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single_step_once(regs);
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return;
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}
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}
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#endif
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signo = SIGBUS;
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code = BUS_ADRALN;
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address = 0;
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break;
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case INT_DOUBLE_FAULT:
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/*
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* For double fault, "reason" is actually passed as
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* SYSTEM_SAVE_K_2, the hypervisor's double-fault info, so
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* we can provide the original fault number rather than
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* the uninteresting "INT_DOUBLE_FAULT" so the user can
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* learn what actually struck while PL0 ICS was set.
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*/
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fault_num = reason;
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signo = SIGILL;
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code = ILL_DBLFLT;
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address = regs->pc;
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break;
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#ifdef __tilegx__
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case INT_ILL_TRANS: {
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/* Avoid a hardware erratum with the return address stack. */
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fill_ra_stack();
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signo = SIGSEGV;
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address = reason;
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code = SEGV_MAPERR;
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break;
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}
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#endif
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default:
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panic("Unexpected do_trap interrupt number %d", fault_num);
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}
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info.si_signo = signo;
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info.si_code = code;
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info.si_addr = (void __user *)address;
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if (signo == SIGILL)
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info.si_trapno = fault_num;
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if (signo != SIGTRAP)
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trace_unhandled_signal("trap", regs, address, signo);
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force_sig_info(signo, &info, current);
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}
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void do_nmi(struct pt_regs *regs, int fault_num, unsigned long reason)
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{
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nmi_enter();
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switch (reason) {
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#ifdef arch_trigger_cpumask_backtrace
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case TILE_NMI_DUMP_STACK:
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nmi_cpu_backtrace(regs);
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break;
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#endif
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default:
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panic("Unexpected do_nmi type %ld", reason);
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}
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nmi_exit();
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}
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/* Deprecated function currently only used here. */
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extern void _dump_stack(int dummy, ulong pc, ulong lr, ulong sp, ulong r52);
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void kernel_double_fault(int dummy, ulong pc, ulong lr, ulong sp, ulong r52)
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{
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_dump_stack(dummy, pc, lr, sp, r52);
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pr_emerg("Double fault: exiting\n");
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machine_halt();
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}
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