e9a9970bf5
CSR address space for Accelerator Functional Units (AFU) is not available
during the early Device Feature List (DFL) enumeration. Early access
to this space results in invalid data and port errors. This change adds
a condition to prevent an early read from the AFU CSR space.
Fixes:
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| altera-cvp.c | ||
| altera-fpga2sdram.c | ||
| altera-freeze-bridge.c | ||
| altera-hps2fpga.c | ||
| altera-pr-ip-core-plat.c | ||
| altera-pr-ip-core.c | ||
| altera-ps-spi.c | ||
| dfl-afu-dma-region.c | ||
| dfl-afu-error.c | ||
| dfl-afu-main.c | ||
| dfl-afu-region.c | ||
| dfl-afu.h | ||
| dfl-fme-br.c | ||
| dfl-fme-error.c | ||
| dfl-fme-main.c | ||
| dfl-fme-mgr.c | ||
| dfl-fme-perf.c | ||
| dfl-fme-pr.c | ||
| dfl-fme-pr.h | ||
| dfl-fme-region.c | ||
| dfl-fme.h | ||
| dfl-n3000-nios.c | ||
| dfl-pci.c | ||
| dfl.c | ||
| dfl.h | ||
| fpga-bridge.c | ||
| fpga-mgr.c | ||
| fpga-region.c | ||
| ice40-spi.c | ||
| machxo2-spi.c | ||
| of-fpga-region.c | ||
| socfpga-a10.c | ||
| socfpga.c | ||
| stratix10-soc.c | ||
| ts73xx-fpga.c | ||
| versal-fpga.c | ||
| xilinx-pr-decoupler.c | ||
| xilinx-spi.c | ||
| zynq-fpga.c | ||
| zynqmp-fpga.c | ||