425 строки
12 KiB
C
425 строки
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* ADXL313 3-Axis Digital Accelerometer
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*
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* Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
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*
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* Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL313.pdf
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*/
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#include <linux/bitfield.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include "adxl313.h"
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static const struct regmap_range adxl312_readable_reg_range[] = {
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regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_DEVID0),
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regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
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regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
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regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS),
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};
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static const struct regmap_range adxl313_readable_reg_range[] = {
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regmap_reg_range(ADXL313_REG_DEVID0, ADXL313_REG_XID),
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regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET),
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regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
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regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
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regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_FIFO_STATUS),
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};
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const struct regmap_access_table adxl312_readable_regs_table = {
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.yes_ranges = adxl312_readable_reg_range,
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.n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range),
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};
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EXPORT_SYMBOL_NS_GPL(adxl312_readable_regs_table, IIO_ADXL313);
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const struct regmap_access_table adxl313_readable_regs_table = {
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.yes_ranges = adxl313_readable_reg_range,
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.n_yes_ranges = ARRAY_SIZE(adxl313_readable_reg_range),
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};
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EXPORT_SYMBOL_NS_GPL(adxl313_readable_regs_table, IIO_ADXL313);
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const struct regmap_access_table adxl314_readable_regs_table = {
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.yes_ranges = adxl312_readable_reg_range,
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.n_yes_ranges = ARRAY_SIZE(adxl312_readable_reg_range),
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};
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EXPORT_SYMBOL_NS_GPL(adxl314_readable_regs_table, IIO_ADXL313);
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static int adxl312_check_id(struct device *dev,
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struct adxl313_data *data)
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{
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unsigned int regval;
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int ret;
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ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val);
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if (ret)
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return ret;
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if (regval != ADXL313_DEVID0_ADXL312_314)
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dev_warn(dev, "Invalid manufacturer ID: %#02x\n", regval);
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return 0;
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}
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static int adxl313_check_id(struct device *dev,
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struct adxl313_data *data)
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{
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unsigned int regval;
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int ret;
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ret = regmap_read(data->regmap, ADXL313_REG_DEVID0, ®val);
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if (ret)
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return ret;
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if (regval != ADXL313_DEVID0)
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dev_warn(dev, "Invalid manufacturer ID: 0x%02x\n", regval);
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/* Check DEVID1 and PARTID */
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if (regval == ADXL313_DEVID0) {
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ret = regmap_read(data->regmap, ADXL313_REG_DEVID1, ®val);
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if (ret)
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return ret;
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if (regval != ADXL313_DEVID1)
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dev_warn(dev, "Invalid mems ID: 0x%02x\n", regval);
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ret = regmap_read(data->regmap, ADXL313_REG_PARTID, ®val);
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if (ret)
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return ret;
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if (regval != ADXL313_PARTID)
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dev_warn(dev, "Invalid device ID: 0x%02x\n", regval);
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}
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return 0;
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}
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const struct adxl313_chip_info adxl31x_chip_info[] = {
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[ADXL312] = {
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.name = "adxl312",
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.type = ADXL312,
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.scale_factor = 28425072,
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.variable_range = true,
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.soft_reset = false,
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.check_id = &adxl312_check_id,
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},
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[ADXL313] = {
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.name = "adxl313",
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.type = ADXL313,
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.scale_factor = 9576806,
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.variable_range = true,
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.soft_reset = true,
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.check_id = &adxl313_check_id,
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},
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[ADXL314] = {
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.name = "adxl314",
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.type = ADXL314,
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.scale_factor = 478858719,
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.variable_range = false,
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.soft_reset = false,
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.check_id = &adxl312_check_id,
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},
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};
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EXPORT_SYMBOL_NS_GPL(adxl31x_chip_info, IIO_ADXL313);
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static const struct regmap_range adxl312_writable_reg_range[] = {
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regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
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regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
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regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP),
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regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT),
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regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL),
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};
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static const struct regmap_range adxl313_writable_reg_range[] = {
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regmap_reg_range(ADXL313_REG_SOFT_RESET, ADXL313_REG_SOFT_RESET),
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regmap_reg_range(ADXL313_REG_OFS_AXIS(0), ADXL313_REG_OFS_AXIS(2)),
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regmap_reg_range(ADXL313_REG_THRESH_ACT, ADXL313_REG_ACT_INACT_CTL),
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regmap_reg_range(ADXL313_REG_BW_RATE, ADXL313_REG_INT_MAP),
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regmap_reg_range(ADXL313_REG_DATA_FORMAT, ADXL313_REG_DATA_FORMAT),
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regmap_reg_range(ADXL313_REG_FIFO_CTL, ADXL313_REG_FIFO_CTL),
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};
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const struct regmap_access_table adxl312_writable_regs_table = {
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.yes_ranges = adxl312_writable_reg_range,
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.n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range),
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};
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EXPORT_SYMBOL_NS_GPL(adxl312_writable_regs_table, IIO_ADXL313);
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const struct regmap_access_table adxl313_writable_regs_table = {
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.yes_ranges = adxl313_writable_reg_range,
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.n_yes_ranges = ARRAY_SIZE(adxl313_writable_reg_range),
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};
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EXPORT_SYMBOL_NS_GPL(adxl313_writable_regs_table, IIO_ADXL313);
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const struct regmap_access_table adxl314_writable_regs_table = {
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.yes_ranges = adxl312_writable_reg_range,
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.n_yes_ranges = ARRAY_SIZE(adxl312_writable_reg_range),
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};
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EXPORT_SYMBOL_NS_GPL(adxl314_writable_regs_table, IIO_ADXL313);
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static const int adxl313_odr_freqs[][2] = {
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[0] = { 6, 250000 },
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[1] = { 12, 500000 },
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[2] = { 25, 0 },
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[3] = { 50, 0 },
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[4] = { 100, 0 },
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[5] = { 200, 0 },
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[6] = { 400, 0 },
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[7] = { 800, 0 },
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[8] = { 1600, 0 },
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[9] = { 3200, 0 },
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};
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#define ADXL313_ACCEL_CHANNEL(index, axis) { \
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.type = IIO_ACCEL, \
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.address = index, \
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.modified = 1, \
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.channel2 = IIO_MOD_##axis, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_CALIBBIAS), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.info_mask_shared_by_type_available = \
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.scan_type = { \
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.realbits = 13, \
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}, \
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}
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static const struct iio_chan_spec adxl313_channels[] = {
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ADXL313_ACCEL_CHANNEL(0, X),
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ADXL313_ACCEL_CHANNEL(1, Y),
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ADXL313_ACCEL_CHANNEL(2, Z),
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};
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static int adxl313_set_odr(struct adxl313_data *data,
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unsigned int freq1, unsigned int freq2)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(adxl313_odr_freqs); i++) {
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if (adxl313_odr_freqs[i][0] == freq1 &&
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adxl313_odr_freqs[i][1] == freq2)
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break;
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}
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if (i == ARRAY_SIZE(adxl313_odr_freqs))
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return -EINVAL;
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return regmap_update_bits(data->regmap, ADXL313_REG_BW_RATE,
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ADXL313_RATE_MSK,
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FIELD_PREP(ADXL313_RATE_MSK, ADXL313_RATE_BASE + i));
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}
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static int adxl313_read_axis(struct adxl313_data *data,
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struct iio_chan_spec const *chan)
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{
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int ret;
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mutex_lock(&data->lock);
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ret = regmap_bulk_read(data->regmap,
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ADXL313_REG_DATA_AXIS(chan->address),
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&data->transf_buf, sizeof(data->transf_buf));
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if (ret)
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goto unlock_ret;
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ret = le16_to_cpu(data->transf_buf);
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unlock_ret:
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mutex_unlock(&data->lock);
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return ret;
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}
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static int adxl313_read_freq_avail(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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const int **vals, int *type, int *length,
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long mask)
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{
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switch (mask) {
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case IIO_CHAN_INFO_SAMP_FREQ:
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*vals = (const int *)adxl313_odr_freqs;
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*length = ARRAY_SIZE(adxl313_odr_freqs) * 2;
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*type = IIO_VAL_INT_PLUS_MICRO;
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return IIO_AVAIL_LIST;
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default:
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return -EINVAL;
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}
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}
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static int adxl313_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct adxl313_data *data = iio_priv(indio_dev);
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unsigned int regval;
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = adxl313_read_axis(data, chan);
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if (ret < 0)
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return ret;
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*val = sign_extend32(ret, chan->scan_type.realbits - 1);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 0;
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*val2 = data->chip_info->scale_factor;
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return IIO_VAL_INT_PLUS_NANO;
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case IIO_CHAN_INFO_CALIBBIAS:
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ret = regmap_read(data->regmap,
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ADXL313_REG_OFS_AXIS(chan->address), ®val);
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if (ret)
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return ret;
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/*
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* 8-bit resolution at minimum range, that is 4x accel data scale
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* factor at full resolution
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*/
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*val = sign_extend32(regval, 7) * 4;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SAMP_FREQ:
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ret = regmap_read(data->regmap, ADXL313_REG_BW_RATE, ®val);
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if (ret)
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return ret;
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ret = FIELD_GET(ADXL313_RATE_MSK, regval) - ADXL313_RATE_BASE;
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*val = adxl313_odr_freqs[ret][0];
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*val2 = adxl313_odr_freqs[ret][1];
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return IIO_VAL_INT_PLUS_MICRO;
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default:
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return -EINVAL;
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}
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}
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static int adxl313_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct adxl313_data *data = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_CALIBBIAS:
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/*
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* 8-bit resolution at minimum range, that is 4x accel data scale
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* factor at full resolution
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*/
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if (clamp_val(val, -128 * 4, 127 * 4) != val)
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return -EINVAL;
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return regmap_write(data->regmap,
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ADXL313_REG_OFS_AXIS(chan->address),
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val / 4);
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case IIO_CHAN_INFO_SAMP_FREQ:
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return adxl313_set_odr(data, val, val2);
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info adxl313_info = {
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.read_raw = adxl313_read_raw,
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.write_raw = adxl313_write_raw,
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.read_avail = adxl313_read_freq_avail,
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};
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static int adxl313_setup(struct device *dev, struct adxl313_data *data,
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int (*setup)(struct device *, struct regmap *))
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{
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int ret;
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/*
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* If sw reset available, ensures the device is in a consistent
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* state after start up
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*/
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if (data->chip_info->soft_reset) {
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ret = regmap_write(data->regmap, ADXL313_REG_SOFT_RESET,
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ADXL313_SOFT_RESET);
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if (ret)
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return ret;
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}
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if (setup) {
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ret = setup(dev, data->regmap);
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if (ret)
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return ret;
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}
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ret = data->chip_info->check_id(dev, data);
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if (ret)
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return ret;
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/* Sets the range to maximum, full resolution, if applicable */
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if (data->chip_info->variable_range) {
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ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT,
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ADXL313_RANGE_MSK,
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FIELD_PREP(ADXL313_RANGE_MSK, ADXL313_RANGE_MAX));
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if (ret)
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return ret;
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/* Enables full resolution */
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ret = regmap_update_bits(data->regmap, ADXL313_REG_DATA_FORMAT,
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ADXL313_FULL_RES, ADXL313_FULL_RES);
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if (ret)
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return ret;
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}
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/* Enables measurement mode */
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return regmap_update_bits(data->regmap, ADXL313_REG_POWER_CTL,
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ADXL313_POWER_CTL_MSK,
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ADXL313_MEASUREMENT_MODE);
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}
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/**
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* adxl313_core_probe() - probe and setup for adxl313 accelerometer
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* @dev: Driver model representation of the device
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* @regmap: Register map of the device
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* @chip_info: Structure containing device specific data
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* @setup: Setup routine to be executed right before the standard device
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* setup, can also be set to NULL if not required
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*
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* Return: 0 on success, negative errno on error cases
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*/
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int adxl313_core_probe(struct device *dev,
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struct regmap *regmap,
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const struct adxl313_chip_info *chip_info,
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int (*setup)(struct device *, struct regmap *))
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{
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struct adxl313_data *data;
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struct iio_dev *indio_dev;
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int ret;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
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if (!indio_dev)
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return -ENOMEM;
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data = iio_priv(indio_dev);
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data->regmap = regmap;
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data->chip_info = chip_info;
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mutex_init(&data->lock);
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indio_dev->name = chip_info->name;
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indio_dev->info = &adxl313_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = adxl313_channels;
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indio_dev->num_channels = ARRAY_SIZE(adxl313_channels);
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ret = adxl313_setup(dev, data, setup);
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if (ret) {
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dev_err(dev, "ADXL313 setup failed\n");
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return ret;
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}
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return devm_iio_device_register(dev, indio_dev);
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}
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EXPORT_SYMBOL_NS_GPL(adxl313_core_probe, IIO_ADXL313);
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MODULE_AUTHOR("Lucas Stankus <lucas.p.stankus@gmail.com>");
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MODULE_DESCRIPTION("ADXL313 3-Axis Digital Accelerometer core driver");
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MODULE_LICENSE("GPL v2");
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