161 строка
5.0 KiB
C
161 строка
5.0 KiB
C
#ifndef __PPC_ELF_H
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#define __PPC_ELF_H
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/*
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* ELF register definitions..
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*/
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#include <asm/types.h>
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#include <asm/ptrace.h>
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#include <asm/cputable.h>
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/* PowerPC relocations defined by the ABIs */
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#define R_PPC_NONE 0
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#define R_PPC_ADDR32 1 /* 32bit absolute address */
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#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
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#define R_PPC_ADDR16 3 /* 16bit absolute address */
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#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
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#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
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#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
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#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
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#define R_PPC_ADDR14_BRTAKEN 8
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#define R_PPC_ADDR14_BRNTAKEN 9
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#define R_PPC_REL24 10 /* PC relative 26 bit */
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#define R_PPC_REL14 11 /* PC relative 16 bit */
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#define R_PPC_REL14_BRTAKEN 12
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#define R_PPC_REL14_BRNTAKEN 13
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#define R_PPC_GOT16 14
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#define R_PPC_GOT16_LO 15
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#define R_PPC_GOT16_HI 16
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#define R_PPC_GOT16_HA 17
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#define R_PPC_PLTREL24 18
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#define R_PPC_COPY 19
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#define R_PPC_GLOB_DAT 20
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#define R_PPC_JMP_SLOT 21
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#define R_PPC_RELATIVE 22
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#define R_PPC_LOCAL24PC 23
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#define R_PPC_UADDR32 24
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#define R_PPC_UADDR16 25
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#define R_PPC_REL32 26
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#define R_PPC_PLT32 27
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#define R_PPC_PLTREL32 28
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#define R_PPC_PLT16_LO 29
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#define R_PPC_PLT16_HI 30
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#define R_PPC_PLT16_HA 31
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#define R_PPC_SDAREL16 32
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#define R_PPC_SECTOFF 33
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#define R_PPC_SECTOFF_LO 34
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#define R_PPC_SECTOFF_HI 35
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#define R_PPC_SECTOFF_HA 36
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/* Keep this the last entry. */
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#define R_PPC_NUM 37
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#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
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#define ELF_NFPREG 33 /* includes fpscr */
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#define ELF_NVRREG 33 /* includes vscr */
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#define ELF_NEVRREG 34 /* includes acc (as 2) */
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_ARCH EM_PPC
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#define ELF_CLASS ELFCLASS32
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#define ELF_DATA ELFDATA2MSB
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/* General registers */
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typedef unsigned long elf_greg_t;
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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/* Floating point registers */
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typedef double elf_fpreg_t;
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typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
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/* Altivec registers */
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typedef __vector128 elf_vrreg_t;
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typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
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#ifdef __KERNEL__
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struct task_struct;
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
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/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
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use of this is to invoke "./ld.so someprog" to test out a new version of
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the loader. We need to make sure that it is out of the way of the program
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that it will "exec", and that there is sufficient room for the brk. */
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#define ELF_ET_DYN_BASE (0x08000000)
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#define USE_ELF_CORE_DUMP
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#define ELF_EXEC_PAGESIZE 4096
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#define ELF_CORE_COPY_REGS(gregs, regs) \
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memcpy((gregs), (regs), sizeof(struct pt_regs)); \
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memset((char *)(gregs) + sizeof(struct pt_regs), 0, \
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sizeof(elf_gregset_t) - sizeof(struct pt_regs));
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#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \
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((t)->thread.regs? \
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({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
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extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
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#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu))
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/* This yields a mask that user programs can use to figure out what
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instruction set this cpu supports. This could be done in userspace,
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but it's not easy, and we've already done it here. */
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#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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intent than poking at uname or /proc/cpuinfo.
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For the moment, we have only optimizations for the Intel generations,
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but that could change... */
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#define ELF_PLATFORM (NULL)
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#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
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/*
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* We need to put in some extra aux table entries to tell glibc what
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* the cache block size is, so it can use the dcbz instruction safely.
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*/
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#define AT_DCACHEBSIZE 19
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#define AT_ICACHEBSIZE 20
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#define AT_UCACHEBSIZE 21
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/* A special ignored type value for PPC, for glibc compatibility. */
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#define AT_IGNOREPPC 22
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extern int dcache_bsize;
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extern int icache_bsize;
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extern int ucache_bsize;
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/*
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* The requirements here are:
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* - keep the final alignment of sp (sp & 0xf)
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* - make sure the 32-bit value at the first 16 byte aligned position of
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* AUXV is greater than 16 for glibc compatibility.
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* AT_IGNOREPPC is used for that.
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* - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
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* even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
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*/
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#define ARCH_DLINFO \
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do { \
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/* Handle glibc compatibility. */ \
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NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
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NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
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/* Cache size items */ \
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NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
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NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
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NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
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} while (0)
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#endif /* __KERNEL__ */
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#endif
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