213 строки
5.4 KiB
Plaintext
213 строки
5.4 KiB
Plaintext
/*
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* Samsung's Exynos4x12 SoCs device tree source
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
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* based board files can include this file and provide values for board specfic
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* bindings.
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*
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* Note: This file does not include device nodes for all the controllers in
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* Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
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* nodes can be added to this file.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "exynos4.dtsi"
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#include "exynos4x12-pinctrl.dtsi"
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/ {
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aliases {
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pinctrl0 = &pinctrl_0;
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pinctrl1 = &pinctrl_1;
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pinctrl2 = &pinctrl_2;
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pinctrl3 = &pinctrl_3;
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fimc-lite0 = &fimc_lite_0;
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fimc-lite1 = &fimc_lite_1;
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mshc0 = &mshc_0;
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};
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pd_isp: isp-power-domain@10023CA0 {
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compatible = "samsung,exynos4210-pd";
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reg = <0x10023CA0 0x20>;
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};
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clock: clock-controller@10030000 {
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compatible = "samsung,exynos4412-clock";
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reg = <0x10030000 0x20000>;
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#clock-cells = <1>;
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};
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mct@10050000 {
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compatible = "samsung,exynos4412-mct";
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reg = <0x10050000 0x800>;
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interrupt-parent = <&mct_map>;
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interrupts = <0>, <1>, <2>, <3>, <4>;
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clocks = <&clock 3>, <&clock 344>;
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clock-names = "fin_pll", "mct";
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mct_map: mct-map {
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0 &gic 0 57 0>,
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<1 &combiner 12 5>,
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<2 &combiner 12 6>,
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<3 &combiner 12 7>,
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<4 &gic 1 12 0>;
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};
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};
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pinctrl_0: pinctrl@11400000 {
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compatible = "samsung,exynos4x12-pinctrl";
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reg = <0x11400000 0x1000>;
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interrupts = <0 47 0>;
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};
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pinctrl_1: pinctrl@11000000 {
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compatible = "samsung,exynos4x12-pinctrl";
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reg = <0x11000000 0x1000>;
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interrupts = <0 46 0>;
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wakup_eint: wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupt-parent = <&gic>;
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interrupts = <0 32 0>;
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};
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};
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pinctrl_2: pinctrl@03860000 {
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compatible = "samsung,exynos4x12-pinctrl";
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reg = <0x03860000 0x1000>;
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interrupt-parent = <&combiner>;
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interrupts = <10 0>;
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};
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pinctrl_3: pinctrl@106E0000 {
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compatible = "samsung,exynos4x12-pinctrl";
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reg = <0x106E0000 0x1000>;
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interrupts = <0 72 0>;
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};
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g2d@10800000 {
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compatible = "samsung,exynos4212-g2d";
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reg = <0x10800000 0x1000>;
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interrupts = <0 89 0>;
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clocks = <&clock 177>, <&clock 277>;
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clock-names = "sclk_fimg2d", "fimg2d";
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status = "disabled";
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};
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camera {
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clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
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clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
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fimc_0: fimc@11800000 {
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compatible = "samsung,exynos4212-fimc";
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samsung,pix-limits = <4224 8192 1920 4224>;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,cam-if;
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};
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fimc_1: fimc@11810000 {
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compatible = "samsung,exynos4212-fimc";
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samsung,pix-limits = <4224 8192 1920 4224>;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,cam-if;
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};
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fimc_2: fimc@11820000 {
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compatible = "samsung,exynos4212-fimc";
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samsung,pix-limits = <4224 8192 1920 4224>;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,lcd-wb;
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samsung,cam-if;
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};
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fimc_3: fimc@11830000 {
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compatible = "samsung,exynos4212-fimc";
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samsung,pix-limits = <1920 8192 1366 1920>;
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samsung,rotators = <0>;
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samsung,mainscaler-ext;
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samsung,isp-wb;
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samsung,lcd-wb;
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};
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fimc_lite_0: fimc-lite@12390000 {
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compatible = "samsung,exynos4212-fimc-lite";
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reg = <0x12390000 0x1000>;
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interrupts = <0 105 0>;
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samsung,power-domain = <&pd_isp>;
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clocks = <&clock 353>;
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clock-names = "flite";
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status = "disabled";
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};
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fimc_lite_1: fimc-lite@123A0000 {
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compatible = "samsung,exynos4212-fimc-lite";
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reg = <0x123A0000 0x1000>;
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interrupts = <0 106 0>;
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samsung,power-domain = <&pd_isp>;
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clocks = <&clock 354>;
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clock-names = "flite";
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status = "disabled";
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};
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fimc_is: fimc-is@12000000 {
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compatible = "samsung,exynos4212-fimc-is", "simple-bus";
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reg = <0x12000000 0x260000>;
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interrupts = <0 90 0>, <0 95 0>;
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samsung,power-domain = <&pd_isp>;
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clocks = <&clock 353>, <&clock 354>, <&clock 355>,
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<&clock 356>, <&clock 17>, <&clock 357>,
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<&clock 358>, <&clock 359>, <&clock 360>,
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<&clock 450>,<&clock 451>, <&clock 452>,
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<&clock 453>, <&clock 176>, <&clock 13>,
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<&clock 454>, <&clock 395>, <&clock 455>;
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clock-names = "lite0", "lite1", "ppmuispx",
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"ppmuispmx", "mpll", "isp",
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"drc", "fd", "mcuisp",
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"ispdiv0", "ispdiv1", "mcuispdiv0",
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"mcuispdiv1", "uart", "aclk200",
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"div_aclk200", "aclk400mcuisp",
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"div_aclk400mcuisp";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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status = "disabled";
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pmu {
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reg = <0x10020000 0x3000>;
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};
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i2c1_isp: i2c-isp@12140000 {
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compatible = "samsung,exynos4212-i2c-isp";
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reg = <0x12140000 0x100>;
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clocks = <&clock 370>;
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clock-names = "i2c_isp";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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mshc_0: mmc@12550000 {
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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fifo-depth = <0x80>;
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clocks = <&clock 301>, <&clock 149>;
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clock-names = "biu", "ciu";
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status = "disabled";
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};
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};
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