зеркало из https://github.com/microsoft/clang.git
Revert x86_64 ABI changes until I have time to check the items raised by Eli.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@134765 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
Родитель
558229f267
Коммит
528a8c7b4c
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@ -820,22 +820,6 @@ class X86_64ABIInfo : public ABIInfo {
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/// should just return Memory for the aggregate).
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static Class merge(Class Accum, Class Field);
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/// postMerge - Implement the X86_64 ABI post merging algorithm.
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///
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/// Post merger cleanup, reduces a malformed Hi and Lo pair to
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/// final MEMORY or SSE classes when necessary.
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///
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/// \param AggregateSize - The size of the current aggregate in
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/// the classification process.
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///
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/// \param Lo - The classification for the parts of the type
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/// residing in the low word of the containing object.
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///
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/// \param Hi - The classification for the parts of the type
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/// residing in the higher words of the containing object.
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///
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void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
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/// classify - Determine the x86_64 register classes in which the
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/// given type T should be passed.
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///
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@ -859,7 +843,7 @@ class X86_64ABIInfo : public ABIInfo {
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/// also be ComplexX87.
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void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const;
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const llvm::Type *GetByteVectorType(QualType Ty) const;
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const llvm::Type *Get16ByteVectorType(QualType Ty) const;
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const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType,
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unsigned IROffset, QualType SourceTy,
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unsigned SourceOffset) const;
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@ -972,39 +956,6 @@ public:
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}
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void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
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Class &Hi) const {
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// AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
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//
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// (a) If one of the classes is Memory, the whole argument is passed in
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// memory.
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//
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// (b) If X87UP is not preceded by X87, the whole argument is passed in
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// memory.
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//
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// (c) If the size of the aggregate exceeds two eightbytes and the first
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// eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
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// argument is passed in memory. NOTE: This is necessary to keep the
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// ABI working for processors that don't support the __m256 type.
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//
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// (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
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//
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// Some of these are enforced by the merging logic. Others can arise
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// only with unions; for example:
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// union { _Complex double; unsigned; }
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//
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// Note that clauses (b) and (c) were added in 0.98.
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//
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if (Hi == Memory)
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Lo = Memory;
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if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
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Lo = Memory;
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if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
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Lo = Memory;
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if (Hi == SSEUp && Lo != SSE)
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Hi = SSE;
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}
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X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
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// AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
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// classified recursively so that always two fields are
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@ -1131,14 +1082,7 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
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// split.
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if (OffsetBase && OffsetBase != 64)
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Hi = Lo;
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} else if (Size == 128 | Size == 256) {
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// Arguments of 256-bits are split into four eightbyte chunks. The
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// least significant one belongs to class SSE and all the others to class
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// SSEUP. The original Lo and Hi design considers that types can't be
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// greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
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// This design isn't correct for 256-bits, but since there're no cases
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// where the upper parts would need to be inspected, avoid adding
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// complexity and just consider Hi to match the 64-256 part.
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} else if (Size == 128) {
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Lo = SSE;
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Hi = SSEUp;
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}
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@ -1177,8 +1121,8 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
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uint64_t Size = getContext().getTypeSize(Ty);
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// AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
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// than four eightbytes, ..., it has class MEMORY.
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if (Size > 256)
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// than two eightbytes, ..., it has class MEMORY.
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if (Size > 128)
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return;
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// AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
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@ -1202,7 +1146,9 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
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break;
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}
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postMerge(Size, Lo, Hi);
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// Do post merger cleanup (see below). Only case we worry about is Memory.
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if (Hi == Memory)
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Lo = Memory;
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assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
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return;
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}
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@ -1211,8 +1157,8 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
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uint64_t Size = getContext().getTypeSize(Ty);
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// AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
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// than four eightbytes, ..., it has class MEMORY.
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if (Size > 256)
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// than two eightbytes, ..., it has class MEMORY.
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if (Size > 128)
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return;
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// AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
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@ -1311,7 +1257,31 @@ void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
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break;
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}
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postMerge(Size, Lo, Hi);
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// AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
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//
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// (a) If one of the classes is MEMORY, the whole argument is
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// passed in memory.
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//
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// (b) If X87UP is not preceded by X87, the whole argument is
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// passed in memory.
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//
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// (c) If the size of the aggregate exceeds two eightbytes and the first
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// eight-byte isn't SSE or any other eightbyte isn't SSEUP, the whole
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// argument is passed in memory.
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//
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// (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
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//
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// Some of these are enforced by the merging logic. Others can arise
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// only with unions; for example:
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// union { _Complex double; unsigned; }
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//
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// Note that clauses (b) and (c) were added in 0.98.
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if (Hi == Memory)
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Lo = Memory;
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if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
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Lo = Memory;
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if (Hi == SSEUp && Lo != SSE)
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Hi = SSE;
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}
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}
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@ -1351,10 +1321,10 @@ ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const {
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return ABIArgInfo::getIndirect(Align);
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}
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/// GetByteVectorType - The ABI specifies that a value should be passed in an
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/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a
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/// Get16ByteVectorType - The ABI specifies that a value should be passed in an
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/// full vector XMM register. Pick an LLVM IR type that will be passed as a
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/// vector register.
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const llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
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const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const {
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const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty);
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// Wrapper structs that just contain vectors are passed just like vectors,
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@ -1365,11 +1335,10 @@ const llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
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STy = dyn_cast<llvm::StructType>(IRType);
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}
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// If the preferred type is a 16/32-byte vector, prefer to pass it.
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// If the preferred type is a 16-byte vector, prefer to pass it.
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if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){
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const llvm::Type *EltTy = VT->getElementType();
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unsigned BitWidth = VT->getBitWidth();
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if ((BitWidth == 128 || BitWidth == 256) &&
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if (VT->getBitWidth() == 128 &&
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(EltTy->isFloatTy() || EltTy->isDoubleTy() ||
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EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) ||
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EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) ||
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@ -1732,13 +1701,12 @@ classifyReturnType(QualType RetTy) const {
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break;
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// AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
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// is passed in the next available eightbyte chunk if the last used
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// vector register.
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// is passed in the upper half of the last used SSE register.
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//
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// SSEUP should always be preceded by SSE, just widen.
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case SSEUp:
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assert(Lo == SSE && "Unexpected SSEUp classification.");
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ResType = GetByteVectorType(RetTy);
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ResType = Get16ByteVectorType(RetTy);
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break;
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// AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
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@ -1878,7 +1846,7 @@ ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt,
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// register. This only happens when 128-bit vectors are passed.
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case SSEUp:
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assert(Lo == SSE && "Unexpected SSEUp classification");
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ResType = GetByteVectorType(Ty);
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ResType = Get16ByteVectorType(Ty);
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break;
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}
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@ -262,18 +262,3 @@ void f9122143()
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// CHECK: define double @f36(double %arg.coerce)
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typedef unsigned v2i32 __attribute((__vector_size__(8)));
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v2i32 f36(v2i32 arg) { return arg; }
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// CHECK: declare void @f38(<8 x float>)
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// CHECK: declare void @f37(<8 x float>)
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typedef float __m256 __attribute__ ((__vector_size__ (32)));
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typedef struct {
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__m256 m;
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} s256;
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s256 x38;
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__m256 x37;
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void f38(s256 x);
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void f37(__m256 x);
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void f39() { f38(x38); f37(x37); }
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