зеркало из https://github.com/microsoft/clang.git
random acts of tidying.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@107050 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -316,6 +316,10 @@ ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty,
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ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
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}
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//===----------------------------------------------------------------------===//
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// X86-32 ABI Implementation
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//===----------------------------------------------------------------------===//
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/// X86_32ABIInfo - The X86-32 ABI information.
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class X86_32ABIInfo : public ABIInfo {
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ASTContext &Context;
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@ -656,6 +660,11 @@ bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
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return false;
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}
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//===----------------------------------------------------------------------===//
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// X86-64 ABI Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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/// X86_64ABIInfo - The X86_64 ABI information.
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class X86_64ABIInfo : public ABIInfo {
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@ -1427,7 +1436,6 @@ static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
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llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
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CodeGenFunction &CGF) const {
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llvm::LLVMContext &VMContext = CGF.getLLVMContext();
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const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext);
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// Assume that va_list type is correct; should be pointer to LLVM type:
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// struct {
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@ -1533,33 +1541,32 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
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RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
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RegAddr = CGF.Builder.CreateBitCast(RegAddr,
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llvm::PointerType::getUnqual(LTy));
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} else if (neededSSE == 1) {
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RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
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RegAddr = CGF.Builder.CreateBitCast(RegAddr,
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llvm::PointerType::getUnqual(LTy));
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} else {
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if (neededSSE == 1) {
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RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
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RegAddr = CGF.Builder.CreateBitCast(RegAddr,
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llvm::PointerType::getUnqual(LTy));
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} else {
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assert(neededSSE == 2 && "Invalid number of needed registers!");
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// SSE registers are spaced 16 bytes apart in the register save
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// area, we need to collect the two eightbytes together.
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llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
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llvm::Value *RegAddrHi =
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CGF.Builder.CreateGEP(RegAddrLo,
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llvm::ConstantInt::get(CGF.Int32Ty, 16));
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const llvm::Type *DblPtrTy =
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llvm::PointerType::getUnqual(DoubleTy);
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const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy,
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DoubleTy, NULL);
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llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST);
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V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
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DblPtrTy));
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CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
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V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
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DblPtrTy));
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CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
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RegAddr = CGF.Builder.CreateBitCast(Tmp,
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llvm::PointerType::getUnqual(LTy));
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}
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assert(neededSSE == 2 && "Invalid number of needed registers!");
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// SSE registers are spaced 16 bytes apart in the register save
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// area, we need to collect the two eightbytes together.
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llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
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llvm::Value *RegAddrHi =
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CGF.Builder.CreateGEP(RegAddrLo,
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llvm::ConstantInt::get(CGF.Int32Ty, 16));
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const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext);
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const llvm::Type *DblPtrTy =
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llvm::PointerType::getUnqual(DoubleTy);
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const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy,
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DoubleTy, NULL);
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llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST);
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V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
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DblPtrTy));
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CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
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V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
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DblPtrTy));
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CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
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RegAddr = CGF.Builder.CreateBitCast(Tmp,
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llvm::PointerType::getUnqual(LTy));
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}
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// AMD64-ABI 3.5.7p5: Step 5. Set:
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@ -1590,11 +1597,14 @@ llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
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ResAddr->reserveOperandSpace(2);
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ResAddr->addIncoming(RegAddr, InRegBlock);
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ResAddr->addIncoming(MemAddr, InMemBlock);
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return ResAddr;
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}
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//===----------------------------------------------------------------------===//
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// PIC16 ABI Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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@ -1727,7 +1737,9 @@ PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
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}
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//===----------------------------------------------------------------------===//
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// ARM ABI Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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@ -2043,7 +2055,9 @@ ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy,
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}
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}
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//===----------------------------------------------------------------------===//
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// SystemZ ABI Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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@ -2127,7 +2141,9 @@ ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty,
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}
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}
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//===----------------------------------------------------------------------===//
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// MSP430 ABI Implementation
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//===----------------------------------------------------------------------===//
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namespace {
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@ -2164,8 +2180,11 @@ void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
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}
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}
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//===----------------------------------------------------------------------===//
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// MIPS ABI Implementation. This works for both little-endian and
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// big-endian variants.
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//===----------------------------------------------------------------------===//
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namespace {
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class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
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public:
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