t7406 & t7407: add missing && at end of lines

Signed-off-by: Jens Lehmann <Jens.Lehmann@web.de>
Signed-off-by: Junio C Hamano <gitster@pobox.com>

t/t7406-submodule-update.sh

@@ -25,7 +25,7 @@ test_expect_success 'setup a submodule tree' '
 	echo file > file &&
 	git add file &&
 	test_tick &&
-	git commit -m upstream
+	git commit -m upstream &&
 	git clone . super &&
 	git clone super submodule &&
 	git clone super rebasing &&

t/t7407-submodule-foreach.sh

@@ -16,7 +16,7 @@ test_expect_success 'setup a submodule tree' '
 	echo file > file &&
 	git add file &&
 	test_tick &&
-	git commit -m upstream
+	git commit -m upstream &&
 	git clone . super &&
 	git clone super submodule &&
 	(
@@ -30,7 +30,7 @@ test_expect_success 'setup a submodule tree' '
 			submodule.sub2 submodule.foo2 &&
 		git config -f .gitmodules --rename-section \
 			submodule.sub3 submodule.foo3 &&
-		git add .gitmodules
+		git add .gitmodules &&
 		test_tick &&
 		git commit -m "submodules" &&
 		git submodule init sub1 &&