onnxruntime-tvm/vta
Luis Vega 30f757eda1 add another default location to verilator (#3324) 2019-06-09 16:41:22 -07:00
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apps/tsim_example add another default location to verilator (#3324) 2019-06-09 16:41:22 -07:00
config [HEADER] Add Header to Comply with ASF Release Policy (#2982) 2019-04-07 21:14:02 -07:00
hardware add another default location to verilator (#3324) 2019-06-09 16:41:22 -07:00
include/vta [VTA] [Hardware] Chisel implementation (#3258) 2019-06-05 10:17:11 -07:00
python/vta [VTA] [Hardware] Chisel implementation (#3258) 2019-06-05 10:17:11 -07:00
src [VTA] [Hardware] Chisel implementation (#3258) 2019-06-05 10:17:11 -07:00
tests [VTA] [Hardware] Chisel implementation (#3258) 2019-06-05 10:17:11 -07:00
tutorials [HEADER] Add Header to Comply with ASF Release Policy (#2982) 2019-04-07 21:14:02 -07:00
README.md [HEADER] Add Header to Comply with ASF Release Policy (#2982) 2019-04-07 21:14:02 -07:00

README.md

VTA: Open, Modular, Deep Learning Accelerator Stack

VTA (versatile tensor accelerator) is an open-source deep learning accelerator complemented with an end-to-end TVM-based compiler stack.

The key features of VTA include:

  • Generic, modular, open-source hardware
    • Streamlined workflow to deploy to FPGAs.
    • Simulator support to prototype compilation passes on regular workstations.
  • Driver and JIT runtime for both simulator and FPGA hardware back-end.
  • End-to-end TVM stack integration
    • Direct optimization and deployment of models from deep learning frameworks via TVM.
    • Customized and extensible TVM compiler back-end.
    • Flexible RPC support to ease deployment, and program FPGAs with the convenience of Python.

Learn more about VTA here.