Merge "msm: camera: cdm: Add support for CDM 2.1" into camera-kernel.lnx.3.1
This commit is contained in:
Camera Software Integration
Gerrit - the friendly Code Review server
Коммит
02996c689b
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_CDM_H_
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@ -276,6 +276,7 @@ struct cam_cdm_common_reg_data {
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* wait, etc.
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* @core_en: offset to pause/enable CDM
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* @fe_cfg: offset to configure CDM fetch engine
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* @irq_context_status offset to read back irq context status
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* @bl_fifo_rb: offset to set BL_FIFO read back
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* @bl_fifo_base_rb: offset to read back base address on offset set by
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* bl_fifo_rb
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@ -319,6 +320,7 @@ struct cam_cdm_common_regs {
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uint32_t core_cfg;
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uint32_t core_en;
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uint32_t fe_cfg;
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uint32_t irq_context_status;
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uint32_t bl_fifo_rb;
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uint32_t bl_fifo_base_rb;
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uint32_t bl_fifo_len_rb;
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@ -415,6 +417,7 @@ enum cam_cdm_hw_version {
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CAM_CDM_VERSION_1_1 = 0x10010000,
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CAM_CDM_VERSION_1_2 = 0x10020000,
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CAM_CDM_VERSION_2_0 = 0x20000000,
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CAM_CDM_VERSION_2_1 = 0x20010000,
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CAM_CDM_VERSION_MAX,
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};
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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#include <linux/delay.h>
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@ -49,6 +49,7 @@ bool cam_cdm_set_cam_hw_version(
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case CAM_CDM110_VERSION:
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case CAM_CDM120_VERSION:
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case CAM_CDM200_VERSION:
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case CAM_CDM210_VERSION:
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cam_version->major = (ver & 0xF0000000);
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cam_version->minor = (ver & 0xFFF0000);
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cam_version->incr = (ver & 0xFFFF);
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@ -81,6 +82,7 @@ struct cam_cdm_utils_ops *cam_cdm_get_ops(
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case CAM_CDM110_VERSION:
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case CAM_CDM120_VERSION:
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case CAM_CDM200_VERSION:
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case CAM_CDM210_VERSION:
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return &CDM170_ops;
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default:
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CAM_ERR(CAM_CDM, "CDM Version=%x not supported in util",
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_CDM_CORE_COMMON_H_
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@ -12,6 +12,7 @@
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#define CAM_CDM110_VERSION 0x10010000
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#define CAM_CDM120_VERSION 0x10020000
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#define CAM_CDM200_VERSION 0x20000000
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#define CAM_CDM210_VERSION 0x20010000
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#define CAM_CDM_AHB_BURST_LEN_1 (BIT(1) - 1)
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#define CAM_CDM_AHB_BURST_LEN_4 (BIT(2) - 1)
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@ -22,6 +22,7 @@
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#include "cam_cdm_hw_reg_1_1.h"
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#include "cam_cdm_hw_reg_1_2.h"
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#include "cam_cdm_hw_reg_2_0.h"
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#include "cam_cdm_hw_reg_2_1.h"
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#include "cam_trace.h"
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#include "cam_req_mgr_workq.h"
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@ -60,6 +61,18 @@ static const struct of_device_id msm_cam_hw_cdm_dt_match[] = {
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.compatible = CAM_HW_CDM_OPE_NAME_2_0,
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.data = &cam_cdm_2_0_reg_offset,
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},
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{
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.compatible = CAM_HW_CDM_CPAS_NAME_2_1,
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.data = &cam_cdm_2_1_reg_offset,
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},
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{
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.compatible = CAM_HW_CDM_OPE_NAME_2_1,
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.data = &cam_cdm_2_1_reg_offset,
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},
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{
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.compatible = CAM_HW_CDM_IFE_NAME_2_1,
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.data = &cam_cdm_2_1_reg_offset,
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},
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{},
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};
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@ -86,6 +99,15 @@ static enum cam_cdm_id cam_hw_cdm_get_id_by_name(char *name)
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if (strnstr(name, CAM_HW_CDM_OPE_NAME_2_0,
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strlen(CAM_HW_CDM_CPAS_NAME_2_0)))
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return CAM_CDM_OPE;
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if (strnstr(name, CAM_HW_CDM_CPAS_NAME_2_1,
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strlen(CAM_HW_CDM_CPAS_NAME_2_1)))
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return CAM_CDM_CPAS;
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if (strnstr(name, CAM_HW_CDM_OPE_NAME_2_1,
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strlen(CAM_HW_CDM_OPE_NAME_2_1)))
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return CAM_CDM_OPE;
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if (strnstr(name, CAM_HW_CDM_IFE_NAME_2_1,
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strlen(CAM_HW_CDM_IFE_NAME_2_1)))
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return CAM_CDM_IFE;
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return CAM_CDM_MAX;
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}
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@ -1339,17 +1361,28 @@ irqreturn_t cam_hw_cdm_irq(int irq_num, void *data)
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struct cam_cdm_work_payload *payload[CAM_CDM_BL_FIFO_MAX] = {0};
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uint32_t user_data = 0;
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uint32_t irq_status[CAM_CDM_BL_FIFO_MAX] = {0};
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uint32_t irq_context_summary = 0xF;
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bool work_status;
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int i;
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CAM_DBG(CAM_CDM, "Got irq");
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CAM_DBG(CAM_CDM, "Got irq hw_version 0x%x", cdm_core->hw_version);
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spin_lock(&cdm_hw->hw_lock);
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if (cdm_hw->hw_state == CAM_HW_STATE_POWER_DOWN) {
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CAM_DBG(CAM_CDM, "CDM is in power down state");
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spin_unlock(&cdm_hw->hw_lock);
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return IRQ_HANDLED;
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}
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if (cdm_core->hw_version >= CAM_CDM_VERSION_2_1) {
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if (cam_cdm_read_hw_reg(cdm_hw,
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cdm_core->offsets->cmn_reg->irq_context_status,
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&irq_context_summary)) {
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CAM_ERR(CAM_CDM, "Failed to read CDM HW IRQ status");
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}
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}
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for (i = 0; i < cdm_core->offsets->reg_data->num_bl_fifo_irq; i++) {
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if (!(BIT(i) & irq_context_summary))
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continue;
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if (cam_cdm_read_hw_reg(cdm_hw,
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cdm_core->offsets->irq_reg[i]->irq_status,
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&irq_status[i])) {
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@ -0,0 +1,253 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2021, The Linux Foundation. All rights reserved.
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*/
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#include "cam_cdm.h"
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struct cam_cdm_bl_pending_req_reg_params cdm_hw_2_1_bl_pending_req0 = {
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.rb_offset = 0x6c,
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.rb_mask = 0x1ff,
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.rb_num_fifo = 0x2,
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.rb_next_fifo_shift = 0x10,
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};
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struct cam_cdm_bl_pending_req_reg_params cdm_hw_2_1_bl_pending_req1 = {
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.rb_offset = 0x70,
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.rb_mask = 0x1ff,
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.rb_num_fifo = 0x2,
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.rb_next_fifo_shift = 0x10,
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};
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static struct cam_cdm_irq_regs cdm_hw_2_1_irq0 = {
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.irq_mask = 0x30,
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.irq_clear = 0x34,
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.irq_clear_cmd = 0x38,
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.irq_set = 0x3c,
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.irq_set_cmd = 0x40,
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.irq_status = 0x44,
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};
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static struct cam_cdm_irq_regs cdm_hw_2_1_irq1 = {
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.irq_mask = 0x130,
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.irq_clear = 0x134,
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.irq_clear_cmd = 0x138,
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.irq_set = 0x13c,
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.irq_set_cmd = 0x140,
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.irq_status = 0x144,
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};
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static struct cam_cdm_irq_regs cdm_hw_2_1_irq2 = {
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.irq_mask = 0x230,
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.irq_clear = 0x234,
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.irq_clear_cmd = 0x238,
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.irq_set = 0x23c,
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.irq_set_cmd = 0x240,
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.irq_status = 0x244,
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};
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static struct cam_cdm_irq_regs cdm_hw_2_1_irq3 = {
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.irq_mask = 0x330,
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.irq_clear = 0x334,
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.irq_clear_cmd = 0x338,
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.irq_set = 0x33c,
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.irq_set_cmd = 0x340,
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.irq_status = 0x344,
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};
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static struct cam_cdm_bl_fifo_regs cdm_hw_2_1_bl_fifo0 = {
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.bl_fifo_base = 0x50,
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.bl_fifo_len = 0x54,
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.bl_fifo_store = 0x58,
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.bl_fifo_cfg = 0x5c,
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};
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static struct cam_cdm_bl_fifo_regs cdm_hw_2_1_bl_fifo1 = {
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.bl_fifo_base = 0x150,
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.bl_fifo_len = 0x154,
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.bl_fifo_store = 0x158,
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.bl_fifo_cfg = 0x15c,
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};
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static struct cam_cdm_bl_fifo_regs cdm_hw_2_1_bl_fifo2 = {
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.bl_fifo_base = 0x250,
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.bl_fifo_len = 0x254,
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.bl_fifo_store = 0x258,
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.bl_fifo_cfg = 0x25c,
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};
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static struct cam_cdm_bl_fifo_regs cdm_hw_2_1_bl_fifo3 = {
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.bl_fifo_base = 0x350,
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.bl_fifo_len = 0x354,
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.bl_fifo_store = 0x358,
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.bl_fifo_cfg = 0x35c,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg0 = {
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.scratch_reg = 0x90,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg1 = {
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.scratch_reg = 0x94,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg2 = {
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.scratch_reg = 0x98,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg3 = {
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.scratch_reg = 0x9c,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg4 = {
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.scratch_reg = 0xa0,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg5 = {
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.scratch_reg = 0xa4,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg6 = {
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.scratch_reg = 0xa8,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg7 = {
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.scratch_reg = 0xac,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg8 = {
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.scratch_reg = 0xb0,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg9 = {
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.scratch_reg = 0xb4,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg10 = {
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.scratch_reg = 0xb8,
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};
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static struct cam_cdm_scratch_reg cdm_2_1_scratch_reg11 = {
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.scratch_reg = 0xbc,
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};
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static struct cam_cdm_perf_mon_regs cdm_2_1_perf_mon0 = {
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.perf_mon_ctrl = 0x110,
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.perf_mon_0 = 0x114,
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.perf_mon_1 = 0x118,
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.perf_mon_2 = 0x11c,
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};
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static struct cam_cdm_perf_mon_regs cdm_2_1_perf_mon1 = {
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.perf_mon_ctrl = 0x120,
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.perf_mon_0 = 0x124,
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.perf_mon_1 = 0x128,
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.perf_mon_2 = 0x12c,
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};
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static struct cam_cdm_comp_wait_status cdm_2_1_comp_wait_status0 = {
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.comp_wait_status = 0x88,
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};
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static struct cam_cdm_comp_wait_status cdm_2_1_comp_wait_status1 = {
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.comp_wait_status = 0x8c,
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};
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static struct cam_cdm_icl_data_regs cdm_2_1_icl_data = {
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.icl_last_data_0 = 0x1c0,
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.icl_last_data_1 = 0x1c4,
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.icl_last_data_2 = 0x1c8,
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.icl_inv_data = 0x1cc,
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};
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static struct cam_cdm_icl_misc_regs cdm_2_1_icl_misc = {
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.icl_inv_bl_addr = 0x1d0,
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.icl_status = 0x1d8,
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};
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static struct cam_cdm_icl_regs cdm_2_1_icl = {
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.data_regs = &cdm_2_1_icl_data,
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.misc_regs = &cdm_2_1_icl_misc,
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};
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static struct cam_cdm_common_regs cdm_hw_2_1_cmn_reg_offset = {
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.cdm_hw_version = 0x0,
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.cam_version = NULL,
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.rst_cmd = 0x10,
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.cgc_cfg = 0x14,
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.core_cfg = 0x18,
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.core_en = 0x1c,
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.fe_cfg = 0x20,
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.irq_context_status = 0x2c,
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.bl_fifo_rb = 0x60,
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.bl_fifo_base_rb = 0x64,
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.bl_fifo_len_rb = 0x68,
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.usr_data = 0x80,
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.wait_status = 0x84,
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.last_ahb_addr = 0xd0,
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.last_ahb_data = 0xd4,
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.core_debug = 0xd8,
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.last_ahb_err_addr = 0xe0,
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.last_ahb_err_data = 0xe4,
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.current_bl_base = 0xe8,
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.current_bl_len = 0xec,
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.current_used_ahb_base = 0xf0,
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.debug_status = 0xf4,
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.bus_misr_cfg0 = 0x100,
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.bus_misr_cfg1 = 0x104,
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.bus_misr_rd_val = 0x108,
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.pending_req = {
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&cdm_hw_2_1_bl_pending_req0,
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&cdm_hw_2_1_bl_pending_req1,
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},
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.comp_wait = {
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&cdm_2_1_comp_wait_status0,
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&cdm_2_1_comp_wait_status1,
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},
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.perf_mon = {
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&cdm_2_1_perf_mon0,
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&cdm_2_1_perf_mon1,
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},
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.scratch = {
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&cdm_2_1_scratch_reg0,
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&cdm_2_1_scratch_reg1,
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&cdm_2_1_scratch_reg2,
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&cdm_2_1_scratch_reg3,
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&cdm_2_1_scratch_reg4,
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&cdm_2_1_scratch_reg5,
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&cdm_2_1_scratch_reg6,
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&cdm_2_1_scratch_reg7,
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&cdm_2_1_scratch_reg8,
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&cdm_2_1_scratch_reg9,
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&cdm_2_1_scratch_reg10,
|
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&cdm_2_1_scratch_reg11,
|
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},
|
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.perf_reg = NULL,
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.icl_reg = &cdm_2_1_icl,
|
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.spare = 0x3fc,
|
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};
|
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|
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static struct cam_cdm_common_reg_data cdm_hw_2_1_cmn_reg_data = {
|
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.num_bl_fifo = 0x4,
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.num_bl_fifo_irq = 0x4,
|
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.num_bl_pending_req_reg = 0x2,
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.num_scratch_reg = 0xc,
|
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};
|
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|
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struct cam_cdm_hw_reg_offset cam_cdm_2_1_reg_offset = {
|
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.cmn_reg = &cdm_hw_2_1_cmn_reg_offset,
|
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.bl_fifo_reg = {
|
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&cdm_hw_2_1_bl_fifo0,
|
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&cdm_hw_2_1_bl_fifo1,
|
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&cdm_hw_2_1_bl_fifo2,
|
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&cdm_hw_2_1_bl_fifo3,
|
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},
|
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.irq_reg = {
|
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&cdm_hw_2_1_irq0,
|
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&cdm_hw_2_1_irq1,
|
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&cdm_hw_2_1_irq2,
|
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&cdm_hw_2_1_irq3,
|
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},
|
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.reg_data = &cdm_hw_2_1_cmn_reg_data,
|
||||
};
|
||||
|
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|
|
@ -1,6 +1,6 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_CDM_SOC_H_
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@ -13,6 +13,9 @@
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#define CAM_HW_CDM_IFE_NAME_1_2 "qcom,cam-ife-cdm1_2"
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#define CAM_HW_CDM_CPAS_NAME_2_0 "qcom,cam-cpas-cdm2_0"
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#define CAM_HW_CDM_OPE_NAME_2_0 "qcom,cam-ope-cdm2_0"
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#define CAM_HW_CDM_CPAS_NAME_2_1 "qcom,cam-cpas-cdm2_1"
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#define CAM_HW_CDM_OPE_NAME_2_1 "qcom,cam-ope-cdm2_1"
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#define CAM_HW_CDM_IFE_NAME_2_1 "qcom,cam-ife-cdm2_1"
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int cam_hw_cdm_soc_get_dt_properties(struct cam_hw_info *cdm_hw,
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const struct of_device_id *table);
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|
|
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