Change-Id: I95b2560f8916f75ea9f2f6207d3e6409c419a8fc
This commit is contained in:
Linux Build Service Account 2020-10-24 01:49:37 -07:00
Родитель 830811ec5a 9546e8383f
Коммит 276ad2a558
15 изменённых файлов: 273 добавлений и 47 удалений

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@ -17,6 +17,7 @@
#include "cam_subdev.h"
#include "cam_cpas_hw_intf.h"
#include "cam_cpas_soc.h"
#include "cam_cpas_api.h"
#define CAM_CPAS_DEV_NAME "cam-cpas"
#define CAM_CPAS_INTF_INITIALIZED() (g_cpas_intf && g_cpas_intf->probe_done)
@ -157,6 +158,25 @@ int cam_cpas_get_cpas_hw_version(uint32_t *hw_version)
return 0;
}
int cam_cpas_get_camnoc_fifo_fill_level_info(
uint32_t cpas_version,
uint32_t client_handle)
{
int rc = 0;
if (!CAM_CPAS_INTF_INITIALIZED()) {
CAM_ERR(CAM_CPAS, "cpas intf not initialized");
return -ENODEV;
}
rc = cam_cpas_hw_get_camnoc_fill_level_info(cpas_version,
client_handle);
if (rc)
CAM_ERR(CAM_CPAS, "Failed to dump fifo reg rc %d", rc);
return rc;
}
int cam_cpas_get_hw_info(uint32_t *camera_family,
struct cam_hw_version *camera_version,
struct cam_hw_version *cpas_version,

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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*/
#include <linux/delay.h>
@ -709,6 +709,97 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw,
return 0;
}
int cam_cpas_hw_get_camnoc_fill_level_info(
uint32_t cpas_version,
uint32_t client_handle)
{
struct cam_camnoc_fifo_lvl_info *camnoc_reg_info;
uint32_t val;
if (!camnoc_info->fill_lvl_register)
return -EFAULT;
camnoc_reg_info = camnoc_info->fill_lvl_register;
switch (cpas_version) {
case CAM_CPAS_TITAN_175_V120:
case CAM_CPAS_TITAN_175_V130:
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC,
camnoc_reg_info->IFE0_nRDI_maxwr_offset,
true, &val);
CAM_INFO(CAM_CPAS, "IFE0_nRDI_MAXWR_LOW offset 0x%x val 0x%x",
camnoc_reg_info->IFE0_nRDI_maxwr_offset,
val);
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC,
camnoc_reg_info->IFE1_nRDI_maxwr_offset,
true, &val);
CAM_INFO(CAM_CPAS, "IFE1_nRDI_MAXWR_LOW offset 0x%x val 0x%x",
camnoc_reg_info->IFE1_nRDI_maxwr_offset,
val);
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC,
camnoc_reg_info->IFE0123_RDI_maxwr_offset,
true, &val);
CAM_INFO(CAM_CPAS, "IFE0_nRDI_MAXWR_LOW offset 0x%x val 0x%x",
camnoc_reg_info->IFE0123_RDI_maxwr_offset,
val);
break;
case CAM_CPAS_TITAN_480_V100:
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_linear,
true, &val);
CAM_INFO(CAM_CPAS, "ife_linear offset 0x%x val 0x%x",
camnoc_reg_info->ife_linear,
val);
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_rdi_wr,
true, &val);
CAM_INFO(CAM_CPAS, "ife_rdi_wr offset 0x%x val 0x%x",
camnoc_reg_info->ife_rdi_wr,
val);
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC, camnoc_reg_info->ife_ubwc_stats,
true, &val);
CAM_INFO(CAM_CPAS, "ife_ubwc_stats offset 0x%x val 0x%x",
camnoc_reg_info->ife_ubwc_stats,
val);
break;
case CAM_CPAS_TITAN_150_V100:
case CAM_CPAS_TITAN_170_V100:
case CAM_CPAS_TITAN_170_V110:
case CAM_CPAS_TITAN_170_V120:
case CAM_CPAS_TITAN_170_V200:
case CAM_CPAS_TITAN_175_V100:
case CAM_CPAS_TITAN_175_V101:
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE02_MAXWR_LOW,
true, &val);
CAM_INFO(CAM_ISP, "IFE02_MAXWR_LOW offset 0x%x val 0x%x",
camnoc_reg_info->IFE02_MAXWR_LOW,
val);
cam_cpas_reg_read(client_handle,
CAM_CPAS_REG_CAMNOC, camnoc_reg_info->IFE13_MAXWR_LOW,
true, &val);
CAM_INFO(CAM_ISP, "IFE13_MAXWR_LOW offset 0x%x val 0x%x",
camnoc_reg_info->IFE13_MAXWR_LOW,
val);
break;
default:
CAM_ERR(CAM_CPAS, "Camera version not supported %d",
cpas_version);
break;
}
return 0;
}
int cam_cpastop_get_internal_ops(struct cam_cpas_internal_ops *internal_ops)
{
if (!internal_ops) {

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@ -256,6 +256,28 @@ struct cam_camnoc_err_logger_info {
uint32_t errlog3_high;
};
/**
* struct cam_camnoc_fifo_lvl_info : Struct for fifo fill level registers
* @IFE0_nRDI_maxwr_offset: Register offset for fill level for IFE0
* @IFE1_nRDI_maxwr_offset: Register offset for fill level for IFE1
* @IFE0123_RDI_maxwr_low_offset: Register offset for RDI
* @ife_linear: Register offset for ife linear
* @ife_rdi_wr: Register offset for rdi wr
* @ife_ubwc_stats: Register offset for ubwc stats
* @IFE02_MAXWR_LOW: Register offset for IFE02
* @IFE13_MAXWR_LOW: Register offset for IFE13
*/
struct cam_camnoc_fifo_lvl_info {
uint32_t IFE0_nRDI_maxwr_offset;
uint32_t IFE1_nRDI_maxwr_offset;
uint32_t IFE0123_RDI_maxwr_offset;
uint32_t ife_linear;
uint32_t ife_rdi_wr;
uint32_t ife_ubwc_stats;
uint32_t IFE02_MAXWR_LOW;
uint32_t IFE13_MAXWR_LOW;
};
/**
* struct cam_camnoc_info : Overall CAMNOC settings info
*
@ -266,6 +288,7 @@ struct cam_camnoc_err_logger_info {
* @irq_err_size: Array size of IRQ Error settings
* @err_logger: Pointer to CAMNOC IRQ Error logger read registers
* @errata_wa_list: HW Errata workaround info
* @fill_level_register: Fill level registers
*
*/
struct cam_camnoc_info {
@ -276,6 +299,7 @@ struct cam_camnoc_info {
int irq_err_size;
struct cam_camnoc_err_logger_info *err_logger;
struct cam_cpas_hw_errata_wa_list *errata_wa_list;
struct cam_camnoc_fifo_lvl_info *fill_lvl_register;
};
/**

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V150_100_H_
@ -515,6 +515,11 @@ static struct cam_cpas_hw_errata_wa_list cam150_cpas100_errata_wa_list = {
},
};
struct cam_camnoc_fifo_lvl_info cam150_cpas100_camnoc_fifo_info = {
.IFE02_MAXWR_LOW = 0x420,
.IFE13_MAXWR_LOW = 0x820,
};
static struct cam_camnoc_info cam150_cpas100_camnoc_info = {
.specific = &cam_cpas_v150_100_camnoc_specific[0],
.specific_size = sizeof(cam_cpas_v150_100_camnoc_specific) /
@ -525,6 +530,7 @@ static struct cam_camnoc_info cam150_cpas100_camnoc_info = {
sizeof(cam_cpas_v150_100_irq_err[0]),
.err_logger = &cam150_cpas100_err_logger_offsets,
.errata_wa_list = &cam150_cpas100_errata_wa_list,
.fill_lvl_register = &cam150_cpas100_camnoc_fifo_info,
};
#endif /* _CPASTOP_V150_100_H_ */

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V170_110_H_
@ -523,6 +523,11 @@ static struct cam_cpas_hw_errata_wa_list cam170_cpas110_errata_wa_list = {
},
};
struct cam_camnoc_fifo_lvl_info cam170_cpas110_camnoc_fifo_info = {
.IFE02_MAXWR_LOW = 0x420,
.IFE13_MAXWR_LOW = 0x820,
};
static struct cam_camnoc_info cam170_cpas110_camnoc_info = {
.specific = &cam_cpas110_camnoc_specific[0],
.specific_size = sizeof(cam_cpas110_camnoc_specific) /
@ -533,6 +538,7 @@ static struct cam_camnoc_info cam170_cpas110_camnoc_info = {
sizeof(cam_cpas110_irq_err[0]),
.err_logger = &cam170_cpas110_err_logger_offsets,
.errata_wa_list = &cam170_cpas110_errata_wa_list,
.fill_lvl_register = &cam170_cpas110_camnoc_fifo_info,
};
#endif /* _CPASTOP_V170_110_H_ */

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@ -521,6 +521,11 @@ static struct cam_cpas_hw_errata_wa_list cam170_cpas200_errata_wa_list = {
},
};
struct cam_camnoc_fifo_lvl_info cam170_cpas200_camnoc_fifo_info = {
.IFE02_MAXWR_LOW = 0x420,
.IFE13_MAXWR_LOW = 0x820,
};
static struct cam_camnoc_info cam170_cpas200_camnoc_info = {
.specific = &cam_cpas_v170_200_camnoc_specific[0],
.specific_size = ARRAY_SIZE(cam_cpas_v170_200_camnoc_specific),
@ -529,6 +534,7 @@ static struct cam_camnoc_info cam170_cpas200_camnoc_info = {
.irq_err_size = ARRAY_SIZE(cam_cpas_v170_200_irq_err),
.err_logger = &cam170_cpas200_err_logger_offsets,
.errata_wa_list = &cam170_cpas200_errata_wa_list,
.fill_lvl_register = &cam170_cpas200_camnoc_fifo_info,
};
#endif /* _CPASTOP_V170_200_H_ */

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_100_H_
@ -543,6 +543,11 @@ static struct cam_cpas_hw_errata_wa_list cam175_cpas100_errata_wa_list = {
},
};
struct cam_camnoc_fifo_lvl_info cam175_cpas100_camnoc_fifo_info = {
.IFE02_MAXWR_LOW = 0x420,
.IFE13_MAXWR_LOW = 0x820,
};
static struct cam_camnoc_info cam175_cpas100_camnoc_info = {
.specific = &cam_cpas_v175_100_camnoc_specific[0],
.specific_size = sizeof(cam_cpas_v175_100_camnoc_specific) /
@ -553,6 +558,7 @@ static struct cam_camnoc_info cam175_cpas100_camnoc_info = {
sizeof(cam_cpas_v175_100_irq_err[0]),
.err_logger = &cam175_cpas100_err_logger_offsets,
.errata_wa_list = &cam175_cpas100_errata_wa_list,
.fill_lvl_register = &cam175_cpas100_camnoc_fifo_info,
};
#endif /* _CPASTOP_V175_100_H_ */

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_101_H_
@ -543,6 +543,11 @@ static struct cam_cpas_hw_errata_wa_list cam175_cpas101_errata_wa_list = {
},
};
struct cam_camnoc_fifo_lvl_info cam175_cpas101_camnoc_fifo_info = {
.IFE02_MAXWR_LOW = 0x420,
.IFE13_MAXWR_LOW = 0x820,
};
static struct cam_camnoc_info cam175_cpas101_camnoc_info = {
.specific = &cam_cpas_v175_101_camnoc_specific[0],
.specific_size = sizeof(cam_cpas_v175_101_camnoc_specific) /
@ -553,6 +558,7 @@ static struct cam_camnoc_info cam175_cpas101_camnoc_info = {
sizeof(cam_cpas_v175_101_irq_err[0]),
.err_logger = &cam175_cpas101_err_logger_offsets,
.errata_wa_list = &cam175_cpas101_errata_wa_list,
.fill_lvl_register = &cam175_cpas101_camnoc_fifo_info,
};
#endif /* _CPASTOP_V175_101_H_ */

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_120_H_
@ -747,6 +747,12 @@ static struct cam_cpas_hw_errata_wa_list cam175_cpas120_errata_wa_list = {
},
};
static struct cam_camnoc_fifo_lvl_info cam175_cpas120_camnoc_fifo_info = {
.IFE0_nRDI_maxwr_offset = 0x3A20,
.IFE1_nRDI_maxwr_offset = 0x5420,
.IFE0123_RDI_maxwr_offset = 0x3620,
};
static struct cam_camnoc_info cam175_cpas120_camnoc_info = {
.specific = &cam_cpas_v175_120_camnoc_specific[0],
.specific_size = ARRAY_SIZE(cam_cpas_v175_120_camnoc_specific),
@ -755,6 +761,7 @@ static struct cam_camnoc_info cam175_cpas120_camnoc_info = {
.irq_err_size = ARRAY_SIZE(cam_cpas_v175_120_irq_err),
.err_logger = &cam175_cpas120_err_logger_offsets,
.errata_wa_list = &cam175_cpas120_errata_wa_list,
.fill_lvl_register = &cam175_cpas120_camnoc_fifo_info,
};
#endif /* _CPASTOP_V175_120_H_ */

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_130_H_
@ -760,6 +760,12 @@ static struct cam_cpas_hw_errata_wa_list cam175_cpas130_errata_wa_list = {
},
};
static struct cam_camnoc_fifo_lvl_info cam175_cpas130_camnoc_fifo_info = {
.IFE0_nRDI_maxwr_offset = 0x3A20,
.IFE1_nRDI_maxwr_offset = 0x5420,
.IFE0123_RDI_maxwr_offset = 0x3620,
};
static struct cam_camnoc_info cam175_cpas130_camnoc_info = {
.specific = &cam_cpas_v175_130_camnoc_specific[0],
.specific_size = ARRAY_SIZE(cam_cpas_v175_130_camnoc_specific),
@ -768,6 +774,7 @@ static struct cam_camnoc_info cam175_cpas130_camnoc_info = {
.irq_err_size = ARRAY_SIZE(cam_cpas_v175_130_irq_err),
.err_logger = &cam175_cpas130_err_logger_offsets,
.errata_wa_list = &cam175_cpas130_errata_wa_list,
.fill_lvl_register = &cam175_cpas130_camnoc_fifo_info,
};
#endif /* _CPASTOP_V175_130_H_ */

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@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V480_100_H_
@ -698,6 +698,12 @@ static struct cam_cpas_hw_errata_wa_list cam480_cpas100_errata_wa_list = {
},
};
struct cam_camnoc_fifo_lvl_info cam480_cpas100_camnoc_fifo_info = {
.ife_linear = 0xA20,
.ife_rdi_wr = 0x1420,
.ife_ubwc_stats = 0x1A20,
};
static struct cam_camnoc_info cam480_cpas100_camnoc_info = {
.specific = &cam_cpas_v480_100_camnoc_specific[0],
.specific_size = ARRAY_SIZE(cam_cpas_v480_100_camnoc_specific),
@ -706,6 +712,7 @@ static struct cam_camnoc_info cam480_cpas100_camnoc_info = {
.irq_err_size = ARRAY_SIZE(cam_cpas_v480_100_irq_err),
.err_logger = &cam480_cpas100_err_logger_offsets,
.errata_wa_list = &cam480_cpas100_errata_wa_list,
.fill_lvl_register = &cam480_cpas100_camnoc_fifo_info,
};
#endif /* _CPASTOP_V480_100_H_ */

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@ -585,6 +585,21 @@ int cam_cpas_get_hw_info(
int cam_cpas_get_cpas_hw_version(
uint32_t *hw_version);
/**
* cam_cpas_get_camnoc_fifo_fill_level_info()
*
* @brief: API to get camera camnoc hw version
*
* @cpas_version: hw version
* @client_handle: cpas client handle
*
* @return 0 on success.
*
*/
int cam_cpas_get_camnoc_fifo_fill_level_info(
uint32_t cpas_version,
uint32_t client_handle);
/**
* cam_cpas_is_feature_supported()
*
@ -635,4 +650,19 @@ const char *cam_cpas_axi_util_trans_type_to_string(
*/
void cam_cpas_log_votes(void);
/**
* cam_cpas_hw_get_camnoc_fill_level_info()
*
* @brief: API to get camnoc info
*
* @cpas_version: cpas hw version
* @client_handle: cpas client handle
*
* @return 0 on success.
*
*/
int cam_cpas_hw_get_camnoc_fill_level_info(
uint32_t cpas_version,
uint32_t client_handle);
#endif /* _CAM_CPAS_API_H_ */

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@ -507,7 +507,6 @@ static int cam_vfe_camif_reg_dump(
struct cam_isp_resource_node *camif_res)
{
struct cam_vfe_mux_camif_data *camif_priv;
struct cam_vfe_soc_private *soc_private;
uint32_t offset, val, wm_idx;
if (!camif_res) {
@ -539,34 +538,6 @@ static int cam_vfe_camif_reg_dump(
}
}
soc_private = camif_priv->soc_info->soc_private;
if (soc_private->cpas_version == CAM_CPAS_TITAN_175_V120 ||
soc_private->cpas_version == CAM_CPAS_TITAN_175_V130) {
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x3A20, true, &val);
CAM_INFO(CAM_ISP, "IFE0_nRDI_MAXWR_LOW offset 0x3A20 val 0x%x",
val);
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x5420, true, &val);
CAM_INFO(CAM_ISP, "IFE1_nRDI_MAXWR_LOW offset 0x5420 val 0x%x",
val);
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x3620, true, &val);
CAM_INFO(CAM_ISP,
"IFE0123_RDI_WR_MAXWR_LOW offset 0x3620 val 0x%x", val);
} else if (soc_private->cpas_version < CAM_CPAS_TITAN_175_V120) {
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x420, true, &val);
CAM_INFO(CAM_ISP, "IFE02_MAXWR_LOW offset 0x420 val 0x%x", val);
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x820, true, &val);
CAM_INFO(CAM_ISP, "IFE13_MAXWR_LOW offset 0x820 val 0x%x", val);
}
return 0;
}
@ -898,6 +869,15 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv,
camif_priv->event_cb(camif_priv->priv,
CAM_ISP_HW_EVENT_ERROR, (void *)&evt_info);
CAM_INFO(CAM_ISP,
"SOF %lld:%lld EPOCH %lld:%lld EOF %lld:%lld",
camif_priv->sof_ts.tv_sec,
camif_priv->sof_ts.tv_usec,
camif_priv->epoch_ts.tv_sec,
camif_priv->epoch_ts.tv_usec,
camif_priv->eof_ts.tv_sec,
camif_priv->eof_ts.tv_usec);
CAM_INFO(CAM_ISP, "Violation status = %x",
payload->irq_reg_val[2]);
@ -906,6 +886,9 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv,
CAM_INFO(CAM_ISP, "ife_clk_src:%lld",
soc_private->ife_clk_src);
cam_cpas_get_camnoc_fifo_fill_level_info(
soc_private->cpas_version,
soc_private->cpas_handle);
cam_cpas_log_votes();
if (camif_priv->camif_debug & CAMIF_DEBUG_ENABLE_REG_DUMP)
@ -915,6 +898,14 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv,
if (irq_status1 & camif_priv->reg_data->error_irq_mask1) {
CAM_DBG(CAM_ISP, "Received ERROR");
CAM_INFO(CAM_ISP,
"SOF %lld:%lld EPOCH %lld:%lld EOF %lld:%lld",
camif_priv->sof_ts.tv_sec,
camif_priv->sof_ts.tv_usec,
camif_priv->epoch_ts.tv_sec,
camif_priv->epoch_ts.tv_usec,
camif_priv->eof_ts.tv_sec,
camif_priv->eof_ts.tv_usec);
ktime_get_boottime_ts64(&ts);
if (camif_priv->event_cb)
@ -930,6 +921,9 @@ static int cam_vfe_camif_handle_irq_bottom_half(void *handler_priv,
CAM_INFO(CAM_ISP, "ife_clk_src:%lld",
soc_private->ife_clk_src);
cam_cpas_get_camnoc_fifo_fill_level_info(
soc_private->cpas_version,
soc_private->cpas_handle);
cam_cpas_log_votes();
if (camif_priv->camif_debug & CAMIF_DEBUG_ENABLE_REG_DUMP)

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@ -938,7 +938,6 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status,
uint32_t violation_mask = 0x3F, module_id = 0;
uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;
struct cam_vfe_soc_private *soc_private;
uint32_t val0, val1, val2;
if (!status) {
CAM_ERR(CAM_ISP, "Invalid params");
@ -1025,15 +1024,11 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status,
CAM_INFO(CAM_ISP, "PDAF BUS OVERFLOW");
soc_private = camif_priv->soc_info->soc_private;
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
cam_cpas_reg_read(soc_private->cpas_handle,
CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
CAM_INFO(CAM_ISP,
"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
val0, val1, val2);
cam_cpas_get_camnoc_fifo_fill_level_info(
soc_private->cpas_version,
soc_private->cpas_handle);
cam_cpas_log_votes();
return;
}
@ -1441,6 +1436,14 @@ static int cam_vfe_camif_ver3_handle_irq_bottom_half(void *handler_priv,
& camif_priv->reg_data->error_irq_mask0) {
CAM_ERR(CAM_ISP, "VFE:%d Overflow", evt_info.hw_idx);
CAM_INFO(CAM_ISP,
"SOF %lld:%lld EPOCH %lld:%lld EOF %lld:%lld",
camif_priv->sof_ts.tv_sec,
camif_priv->sof_ts.tv_usec,
camif_priv->epoch_ts.tv_sec,
camif_priv->epoch_ts.tv_usec,
camif_priv->eof_ts.tv_sec,
camif_priv->eof_ts.tv_usec);
ktime_get_boottime_ts64(&ts);
CAM_INFO(CAM_ISP,
"current monotonic time stamp seconds %lld:%lld",
@ -1473,6 +1476,14 @@ static int cam_vfe_camif_ver3_handle_irq_bottom_half(void *handler_priv,
if (irq_status[CAM_IFE_IRQ_CAMIF_REG_STATUS2]) {
CAM_ERR(CAM_ISP, "VFE:%d Violation", evt_info.hw_idx);
CAM_INFO(CAM_ISP,
"SOF %lld:%lld EPOCH %lld:%lld EOF %lld:%lld",
camif_priv->sof_ts.tv_sec,
camif_priv->sof_ts.tv_usec,
camif_priv->epoch_ts.tv_sec,
camif_priv->epoch_ts.tv_usec,
camif_priv->eof_ts.tv_sec,
camif_priv->eof_ts.tv_usec);
ktime_get_boottime_ts64(&ts);
CAM_INFO(CAM_ISP,
"current monotonic time stamp seconds %lld:%lld",

Просмотреть файл

@ -14,6 +14,7 @@
#include "cam_cdm_util.h"
#include "cam_irq_controller.h"
#include "cam_tasklet_util.h"
#include "cam_cpas_api.h"
struct cam_vfe_mux_rdi_data {
void __iomem *mem_base;
@ -539,6 +540,10 @@ static int cam_vfe_rdi_handle_irq_bottom_half(void *handler_priv,
rdi_priv->event_cb(rdi_priv->priv,
CAM_ISP_HW_EVENT_ERROR,
(void *)&evt_info);
cam_cpas_get_camnoc_fifo_fill_level_info(
soc_private->cpas_version,
soc_private->cpas_handle);
cam_cpas_log_votes();
}
end: