microsoft
/
surface-duo-oss-platform.vendor.opensource.camera-kernel
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msm: camera: cpas: Support OT enablement through Fuse 

This change is to support enable and disable of OT values
for real time block through fuse.

CRs-Fixed: 2924987
Change-Id: If4c6b89cafd517a5c6f7706bf65cc0a47ecdc62e
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
This commit is contained in:
Ayush Kumar 2021-08-02 20:28:17 +05:30
Родитель a84ec521b5
Коммит 3cc0296241
22 изменённых файлов: 1061 добавлений и 17 удалений
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6
drivers/cam_cpas/cam_cpas_hw.c
Просмотреть файл

@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
*/
#include <linux/device.h>
@ -112,6 +112,10 @@ int cam_cpas_util_reg_update(struct cam_hw_info *cpas_hw,
if (reg_info->enable == false)
return 0;
if (reg_info->is_fuse_based &&
!cam_cpas_is_feature_supported(CAM_CPAS_RT_OT_FUSE, 0xFF, 0))
return 0;
reg_base_index = cpas_core->regbase_index[reg_base];
if (reg_base_index == -1)
return -EINVAL;

4
drivers/cam_cpas/cam_cpas_hw.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CAM_CPAS_HW_H_
@ -94,6 +94,7 @@ struct cam_cpas_internal_ops {
* struct cam_cpas_reg : CPAS register info
*
* @enable: Whether this reg info need to be enabled
* @is_fuse_based : Whether this reg info need to be enabled based on fuse
* @access_type: Register access type
* @masked_value: Whether this register write/read is based on mask, shift
* @mask: Mask for this register value
@ -103,6 +104,7 @@ struct cam_cpas_internal_ops {
*/
struct cam_cpas_reg {
bool enable;
bool is_fuse_based;
enum cam_cpas_access_type access_type;
bool masked_value;
uint32_t offset;

37
drivers/cam_cpas/cpas_top/cpastop100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP100_H_
@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
@ -227,6 +230,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -234,6 +238,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -248,6 +253,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
@ -255,6 +261,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
@ -262,6 +269,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
@ -273,18 +281,21 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
.value = 0x3,
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
@ -296,6 +307,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
@ -303,6 +315,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
@ -310,6 +323,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
@ -321,18 +335,21 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
.value = 0x3,
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
@ -344,6 +361,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -351,6 +369,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -358,6 +377,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -369,6 +389,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -376,6 +397,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -383,6 +405,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -394,6 +417,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -401,6 +425,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -408,6 +433,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -419,6 +445,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -426,6 +453,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -433,6 +461,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -444,6 +473,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -451,6 +481,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -458,6 +489,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -465,6 +497,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -472,6 +505,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -479,6 +513,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{

35
drivers/cam_cpas/cpas_top/cpastop_v150_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V150_100_H_
@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
@ -227,6 +230,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -234,6 +238,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -248,6 +253,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
@ -255,6 +261,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
@ -262,6 +269,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
@ -273,12 +281,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
.value = 0x1,
@ -292,6 +302,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
@ -299,6 +310,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
@ -306,6 +318,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
@ -317,12 +330,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
.value = 0x1,
@ -336,6 +351,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -343,6 +359,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -350,6 +367,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -361,6 +379,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -368,6 +387,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -375,6 +395,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -386,6 +407,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -393,6 +415,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -400,6 +423,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -411,6 +435,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -418,6 +443,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -425,6 +451,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -436,6 +463,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -443,6 +471,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -450,6 +479,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -457,6 +487,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -464,6 +495,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -482,6 +514,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

48
drivers/cam_cpas/cpas_top/cpastop_v165_100.h
Просмотреть файл

@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4230, /* CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4234, /* CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0, /* CDM_Urgency_Low */
.offset = 0x4238,
@ -227,6 +230,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4240, /* CDM_DANGERLUT_LOW */
@ -234,6 +238,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4248, /* CDM_SAFELUT_LOW */
@ -248,6 +253,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3630, /* IFE01234_RDI_PRIORITYLUT_LOW */
@ -255,6 +261,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3634, /* IFE01234_RDI_PRIORITYLUT_HIGH */
@ -262,6 +269,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3638, /* IFE01234_RDI_LINEAR_URGENCY_LOW */
@ -271,12 +279,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3640, /* IFE01234_RDI_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3648, /* IFE01234_RDI_SAFELUT_LOW */
.value = 0x000F,
@ -291,6 +301,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4808, /* IFE01234_RDI_QOSGEN_MAINCTL */
@ -298,6 +309,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4820, /* IFE01234_RDI_QOSGEN_SHAPING_LOW */
@ -305,6 +317,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4824, /* IFE01234_RDI_QOSGEN_SHAPING_HIGH */
@ -316,6 +329,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3A30, /* IFE01_NRDI_PRIORITYLUT_LOW */
@ -323,6 +337,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3A34, /* IFE01_NRDI_PRIORITYLUT_HIGH */
@ -330,6 +345,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3A38, /* IFE01_NRDI_URGENCY_LOW */
@ -341,12 +357,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3A40, /* IFE01_NRDI_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3A48, /* IFE01_NRDI_SAFELUT_LOW */
.value = 0xF,
@ -366,6 +384,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4708, /* IFE01_NRDI_QOSGEN_MAINCTL */
@ -373,6 +392,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4720, /* IFE01_NRDI_QOSGEN_SHAPING_LOW */
@ -380,6 +400,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4724, /* IFE01_NRDI_QOSGEN_SHAPING_HIGH */
@ -391,6 +412,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5430, /* IFE2_NDRI_PRIORITYLUT_LOW */
@ -398,6 +420,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* IFE2_NRDI_PRIORITYLUT_HIGH */
@ -406,6 +429,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x5438, /* IFE2_NRDI_URGENCY_LOW */
@ -417,12 +441,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5440, /* IFE2_NRDI_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5448, /* IFE2_NRDI_SAFELUT_LOW */
.value = 0xF,
@ -441,6 +467,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5188, /* IFE2_NRDI_QOSGEN_MAINCTL */
@ -448,6 +475,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x51A0, /* IFE2_NRDI_QOSGEN_SHAPING_LOW */
@ -455,6 +483,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = true,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x51A4, /* IFE2_NRDI_QOSGEN_SHAPING_HIGH */
@ -466,6 +495,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* IPE_BPS_LRME_RD_PRIORITYLUT_LOW */
@ -473,6 +503,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* IPE_BPS_LRME_RD_PRIORITYLUT_HIGH */
@ -480,6 +511,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2E38, /* IPE_BPS_LRME_RD_URGENCY_LOW */
@ -491,6 +523,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* IPE_BPS_LRME_RD_DANGERLUT_LOW */
@ -498,6 +531,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* IPE_BPS_LRME_RD_SAFELUT_LOW */
@ -510,6 +544,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2F08, /* IPE_BPS_LRME_RD_DECCTL_LOW */
@ -521,6 +556,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A30, /* IPE_BPS_LRME_WR_PRIORITYLUT_LOW */
@ -528,6 +564,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A34, /* IPE_BPS_LRME_WR_PRIORITYLUT_HIGH */
@ -535,6 +572,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2A38, /* IPE_BPS_LRME_WR_URGENCY_LOW */
@ -546,6 +584,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A40, /* IPE_BPS_LRME_WR_DANGERLUT_LOW */
@ -553,6 +592,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A48, /* IPE_BPS_LRME_WR_SAFELUT_LOW */
@ -565,6 +605,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2B88, /* IPE_BPS_LRME_WR_ENCCTL_LOW */
@ -576,6 +617,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2630, /* JPEG_PRIORITYLUT_LOW */
@ -583,6 +625,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2634, /* JPEG_PRIORITYLUT_HIGH */
@ -590,6 +633,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2638, /* JPEG_URGENCY_LOW */
@ -599,6 +643,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2640, /* JPEG_DANGERLUT_LOW */
@ -606,6 +651,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2648, /* JPEG_SAFELUT_LOW */
@ -613,6 +659,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -621,6 +668,7 @@ static struct cam_camnoc_specific
.enable = false,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x5088,

38
drivers/cam_cpas/cpas_top/cpastop_v170_110.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V170_110_H_
@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
@ -227,6 +230,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -234,6 +238,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -248,6 +253,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
@ -255,6 +261,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
@ -262,6 +269,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
@ -273,18 +281,21 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
.value = 0x1,
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
@ -296,6 +307,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
@ -303,6 +315,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
@ -310,6 +323,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
@ -321,18 +335,21 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
.value = 0x1,
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
@ -344,6 +361,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -351,6 +369,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -358,6 +377,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -369,6 +389,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -376,6 +397,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -383,6 +405,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -394,6 +417,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -401,6 +425,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -408,6 +433,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -419,6 +445,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -426,6 +453,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -433,6 +461,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -444,6 +473,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -451,6 +481,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -458,6 +489,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -465,6 +497,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -472,6 +505,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -479,6 +513,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -490,6 +525,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

37
drivers/cam_cpas/cpas_top/cpastop_v170_200.h
Просмотреть файл

@ -206,6 +206,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -213,6 +214,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -220,6 +222,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
@ -229,6 +232,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -236,6 +240,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -243,6 +248,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -250,6 +256,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
@ -257,6 +264,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
@ -264,6 +272,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
@ -275,18 +284,21 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
.value = 0x1,
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
@ -298,6 +310,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
@ -305,6 +318,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
@ -312,6 +326,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
@ -323,18 +338,21 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
.value = 0x1,
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
@ -346,6 +364,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -353,6 +372,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -360,6 +380,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -371,6 +392,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -378,6 +400,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -385,6 +408,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -396,6 +420,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -403,6 +428,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -410,6 +436,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -421,6 +448,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -428,6 +456,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -435,6 +464,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -446,6 +476,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -453,6 +484,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -460,6 +492,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -467,6 +500,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -474,6 +508,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -481,6 +516,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -492,6 +528,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

39
drivers/cam_cpas/cpas_top/cpastop_v175_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_100_H_
@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
@ -227,6 +230,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -234,6 +238,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -241,6 +246,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -248,6 +254,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
@ -255,6 +262,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
@ -262,6 +270,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
@ -273,12 +282,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
.value = 0x1,
@ -290,6 +301,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
@ -301,6 +313,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
@ -308,6 +321,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
@ -315,6 +329,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
@ -326,12 +341,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
.value = 0x1,
@ -343,6 +360,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
@ -354,6 +372,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -361,6 +380,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -368,6 +388,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -379,6 +400,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -386,6 +408,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -398,6 +421,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -409,6 +433,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -416,6 +441,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -423,6 +449,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -434,6 +461,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -441,6 +469,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -453,6 +482,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -464,6 +494,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -471,6 +502,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -478,6 +510,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -485,6 +518,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -492,6 +526,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -499,6 +534,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -510,6 +546,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

39
drivers/cam_cpas/cpas_top/cpastop_v175_101.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_101_H_
@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
@ -227,6 +230,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -234,6 +238,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -241,6 +246,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -248,6 +254,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
@ -255,6 +262,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
@ -262,6 +270,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
@ -273,12 +282,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
.value = 0x1,
@ -290,6 +301,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
@ -301,6 +313,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
@ -308,6 +321,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
@ -315,6 +329,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
@ -326,12 +341,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
.value = 0x1,
@ -343,6 +360,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
@ -354,6 +372,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -361,6 +380,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -368,6 +388,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -379,6 +400,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -386,6 +408,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -398,6 +421,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -409,6 +433,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -416,6 +441,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -423,6 +449,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -434,6 +461,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -441,6 +469,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -453,6 +482,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -464,6 +494,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -471,6 +502,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -478,6 +510,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -485,6 +518,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -492,6 +526,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -499,6 +534,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -510,6 +546,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

63
drivers/cam_cpas/cpas_top/cpastop_v175_120.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_120_H_
@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4230, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4234, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
/* cdm_main_SpecificToNttpTr_Urgency_Low */
@ -228,6 +231,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4240, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -235,6 +239,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4248, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -242,6 +247,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -249,6 +255,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IFE0123_PRIORITYLUT_LOW */
@ -257,6 +264,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IFE0123_PRIORITYLUT_HIGH */
@ -265,6 +273,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3638, /* SPECIFIC_IFE0123_URGENCY_LOW */
@ -276,12 +285,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3640, /* SPECIFIC_IFE0123_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3648, /* SPECIFIC_IFE0123_SAFELUT_LOW */
.value = 0xF,
@ -293,6 +304,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -300,6 +312,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3A30, /* SPECIFIC_IFE0_PRIORITYLUT_LOW */
@ -307,6 +320,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3A34, /* SPECIFIC_IFE0_PRIORITYLUT_HIGH */
@ -314,6 +328,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3A38, /* SPECIFIC_IFE0_URGENCY_LOW */
@ -325,12 +340,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3A40, /* SPECIFIC_IFE0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3A48, /* SPECIFIC_IFE0_SAFELUT_LOW */
.value = 0xF,
@ -342,6 +359,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3B88, /* SPECIFIC_IFE0_ENCCTL_LOW */
@ -354,6 +372,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3230, /* SPECIFIC_IFE1_PRIORITYLUT_LOW */
@ -361,6 +380,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3234, /* SPECIFIC_IFE1_PRIORITYLUT_HIGH */
@ -368,6 +388,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3238, /* SPECIFIC_IFE1_URGENCY_LOW */
@ -379,12 +400,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3240, /* SPECIFIC_IFE1_DANGERLUT_LOW */
.value = 0x00000000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3248, /* SPECIFIC_IFE1_SAFELUT_LOW */
.value = 0xF,
@ -396,6 +419,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -403,6 +427,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5430, /* SPECIFIC_IFE1_WR_PRIORITYLUT_LOW */
@ -410,6 +435,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IFE1_WR_PRIORITYLUT_HIGH */
@ -418,6 +444,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x5438, /* SPECIFIC_IFE1_WR_URGENCY_LOW */
@ -429,12 +456,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5440, /* SPECIFIC_IFE1_WR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5448, /* SPECIFIC_IFE1_WR_SAFELUT_LOW */
.value = 0xF,
@ -446,6 +475,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5588, /* SPECIFIC_IFE1_WR_ENCCTL_LOW */
@ -457,6 +487,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -464,6 +495,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -471,6 +503,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2E38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -482,6 +515,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -489,6 +523,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -501,6 +536,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2F08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -512,6 +548,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A30, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -519,6 +556,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A34, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -526,6 +564,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2A38, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -537,6 +576,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A40, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -544,6 +584,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A48, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -556,6 +597,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2B88, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -567,6 +609,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IPE_VID_DISP_PRIORITYLUT_LOW */
@ -575,6 +618,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IPE_VID_DISP_PRIORITYLUT_HIGH */
@ -583,6 +627,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
/* SPECIFIC_IPE_VID_DISP_URGENCY_LOW */
@ -595,6 +640,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC__IPE_VID_DISP_DANGERLUT_LOW */
@ -603,6 +649,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IPE_VID_DISP_SAFELUT_LOW */
@ -616,6 +663,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5F88, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -628,6 +676,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2630, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -635,6 +684,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2634, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -642,6 +692,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2638, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -649,6 +700,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2640, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -656,6 +708,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2648, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -663,6 +716,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -670,6 +724,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E30, /* SPECIFIC_FD_PRIORITYLUT_LOW */
@ -677,6 +732,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E34, /* SPECIFIC_FD_PRIORITYLUT_HIGH */
@ -684,6 +740,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E38, /* SPECIFIC_FD_URGENCY_LOW */
@ -691,6 +748,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E40, /* SPECIFIC_FD_DANGERLUT_LOW */
@ -698,6 +756,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E48, /* SPECIFIC_FD_SAFELUT_LOW */
@ -705,6 +764,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
@ -714,6 +774,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2288,

63
drivers/cam_cpas/cpas_top/cpastop_v175_130.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V175_130_H_
@ -206,6 +206,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4230, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
@ -213,6 +214,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4234, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
@ -220,6 +222,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
/* cdm_main_SpecificToNttpTr_Urgency_Low */
@ -230,6 +233,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4240, /* SPECIFIC_CDM_DANGERLUT_LOW */
@ -237,6 +241,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4248, /* SPECIFIC_CDM_SAFELUT_LOW */
@ -244,6 +249,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -251,6 +257,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IFE0123_PRIORITYLUT_LOW */
@ -259,6 +266,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IFE0123_PRIORITYLUT_HIGH */
@ -267,6 +275,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3638, /* SPECIFIC_IFE0123_URGENCY_LOW */
@ -278,12 +287,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3640, /* SPECIFIC_IFE0123_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3648, /* SPECIFIC_IFE0123_SAFELUT_LOW */
.value = 0xF,
@ -295,6 +306,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -302,6 +314,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3A30, /* SPECIFIC_IFE0_PRIORITYLUT_LOW */
@ -309,6 +322,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3A34, /* SPECIFIC_IFE0_PRIORITYLUT_HIGH */
@ -316,6 +330,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3A38, /* SPECIFIC_IFE0_URGENCY_LOW */
@ -327,12 +342,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3A40, /* SPECIFIC_IFE0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3A48, /* SPECIFIC_IFE0_SAFELUT_LOW */
.value = 0xF,
@ -344,6 +361,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3B88, /* SPECIFIC_IFE0_ENCCTL_LOW */
@ -356,6 +374,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3230, /* SPECIFIC_IFE1_PRIORITYLUT_LOW */
@ -363,6 +382,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3234, /* SPECIFIC_IFE1_PRIORITYLUT_HIGH */
@ -370,6 +390,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x3238, /* SPECIFIC_IFE1_URGENCY_LOW */
@ -381,12 +402,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3240, /* SPECIFIC_IFE1_DANGERLUT_LOW */
.value = 0x00000000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x3248, /* SPECIFIC_IFE1_SAFELUT_LOW */
.value = 0xFFFFFFFF,
@ -398,6 +421,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -405,6 +429,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5430, /* SPECIFIC_IFE1_WR_PRIORITYLUT_LOW */
@ -412,6 +437,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IFE1_WR_PRIORITYLUT_HIGH */
@ -420,6 +446,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x5438, /* SPECIFIC_IFE1_WR_URGENCY_LOW */
@ -431,12 +458,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5440, /* SPECIFIC_IFE1_WR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5448, /* SPECIFIC_IFE1_WR_SAFELUT_LOW */
.value = 0xF,
@ -448,6 +477,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5588, /* SPECIFIC_IFE1_WR_ENCCTL_LOW */
@ -459,6 +489,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
@ -466,6 +497,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
@ -473,6 +505,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2E38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
@ -484,6 +517,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
@ -491,6 +525,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
@ -503,6 +538,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2F08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
@ -514,6 +550,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A30, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
@ -521,6 +558,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A34, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
@ -528,6 +566,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
.offset = 0x2A38, /* SPECIFIC_IBL_WR_URGENCY_LOW */
@ -539,6 +578,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A40, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
@ -546,6 +586,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2A48, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
@ -558,6 +599,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2B88, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -569,6 +611,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IPE_VID_DISP_PRIORITYLUT_LOW */
@ -577,6 +620,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IPE_VID_DISP_PRIORITYLUT_HIGH */
@ -585,6 +629,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 1,
/* SPECIFIC_IPE_VID_DISP_URGENCY_LOW */
@ -597,6 +642,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC__IPE_VID_DISP_DANGERLUT_LOW */
@ -605,6 +651,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* SPECIFIC_IPE_VID_DISP_SAFELUT_LOW */
@ -618,6 +665,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5F88, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
@ -630,6 +678,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2630, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
@ -637,6 +686,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2634, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
@ -644,6 +694,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2638, /* SPECIFIC_JPEG_URGENCY_LOW */
@ -651,6 +702,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2640, /* SPECIFIC_JPEG_DANGERLUT_LOW */
@ -658,6 +710,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2648, /* SPECIFIC_JPEG_SAFELUT_LOW */
@ -665,6 +718,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -672,6 +726,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E30, /* SPECIFIC_FD_PRIORITYLUT_LOW */
@ -679,6 +734,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E34, /* SPECIFIC_FD_PRIORITYLUT_HIGH */
@ -686,6 +742,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E38, /* SPECIFIC_FD_URGENCY_LOW */
@ -693,6 +750,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E40, /* SPECIFIC_FD_DANGERLUT_LOW */
@ -700,6 +758,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3E48, /* SPECIFIC_FD_SAFELUT_LOW */
@ -707,6 +766,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
@ -716,6 +776,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2288,

63
drivers/cam_cpas/cpas_top/cpastop_v480_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V480_100_H_
@ -202,6 +202,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* CDM_PRIORITYLUT_LOW */
@ -209,6 +210,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* CDM_PRIORITYLUT_HIGH */
@ -216,6 +218,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* CDM_URGENCY_LOW */
@ -223,6 +226,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* CDM_DANGERLUT_LOW */
@ -230,6 +234,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* CDM_SAFELUT_LOW */
@ -237,6 +242,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -244,6 +250,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x630, /* FD_PRIORITYLUT_LOW */
@ -251,6 +258,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x634, /* FD_PRIORITYLUT_HIGH */
@ -258,6 +266,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x638, /* FD_URGENCY_LOW */
@ -265,6 +274,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x640, /* FD_DANGERLUT_LOW */
@ -272,6 +282,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x648, /* FD_SAFELUT_LOW */
@ -279,6 +290,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -286,6 +298,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA30, /* IFE_LINEAR_PRIORITYLUT_LOW */
@ -293,6 +306,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA34, /* IFE_LINEAR_PRIORITYLUT_HIGH */
@ -300,6 +314,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA38, /* IFE_LINEAR_URGENCY_LOW */
@ -307,12 +322,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA40, /* IFE_LINEAR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA48, /* IFE_LINEAR_SAFELUT_LOW */
.value = 0x000F,
@ -324,6 +341,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -331,6 +349,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* IFE_RDI_RD_PRIORITYLUT_LOW */
@ -338,6 +357,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* IFE_RDI_RD_PRIORITYLUT_HIGH */
@ -345,6 +365,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1038, /* IFE_RDI_RD_URGENCY_LOW */
@ -352,12 +373,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1040, /* IFE_RDI_RD_DANGERLUT_LOW */
.value = 0x0,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1048, /* IFE_RDI_RD_SAFELUT_LOW */
.value = 0x0,
@ -369,6 +392,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -376,6 +400,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* IFE_RDI_WR_PRIORITYLUT_LOW */
@ -383,6 +408,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* IFE_RDI_WR_PRIORITYLUT_HIGH */
@ -390,6 +416,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* IFE_RDI_WR_URGENCY_LOW */
@ -397,12 +424,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1440, /* IFE_RDI_WR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1448, /* IFE_RDI_WR_SAFELUT_LOW */
.value = 0x000F,
@ -414,6 +443,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -421,6 +451,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A30, /* IFE_UBWC_STATS_PRIORITYLUT_LOW */
@ -428,6 +459,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A34, /* IFE_UBWC_STATS_PRIORITYLUT_HIGH */
@ -435,6 +467,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A38, /* IFE_UBWC_STATS_URGENCY_LOW */
@ -442,12 +475,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A40, /* IFE_UBWC_STATS_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A48, /* IFE_UBWC_STATS_SAFELUT_LOW */
.value = 0x000F,
@ -459,6 +494,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1B88, /* IFE_ENCCTL_LOW */
@ -470,6 +506,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E30, /* IPE0_RD_PRIORITYLUT_LOW */
@ -477,6 +514,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E34, /* IPE0_RD_PRIORITYLUT_HIGH */
@ -484,6 +522,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E38, /* IPE0_RD_URGENCY_LOW */
@ -491,6 +530,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E40, /* IPE0_RD_DANGERLUT_LOW */
@ -498,6 +538,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E48, /* IPE0_RD_SAFELUT_LOW */
@ -510,6 +551,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1F08, /* IPE0_RD_DECCTL_LOW */
@ -521,6 +563,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2430, /* IPE1_BPS_RD_PRIORITYLUT_LOW */
@ -528,6 +571,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2434, /* IPE1_BPS_RD_PRIORITYLUT_HIGH */
@ -535,6 +579,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2438, /* IPE1_BPS_RD_URGENCY_LOW */
@ -542,6 +587,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2440, /* IPE1_BPS_RD_DANGERLUT_LOW */
@ -549,6 +595,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2448, /* IPE1_BPS_RD_SAFELUT_LOW */
@ -561,6 +608,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2508, /* IPE1_BPS_RD_DECCTL_LOW */
@ -572,6 +620,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2830, /* IPE_BPS_WR_PRIORITYLUT_LOW */
@ -579,6 +628,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2834, /* IPE_BPS_WR_PRIORITYLUT_HIGH */
@ -586,6 +636,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2838, /* IPE_BPS_WR_URGENCY_LOW */
@ -593,6 +644,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2840, /* IPE_BPS_WR_DANGERLUT_LOW */
@ -600,6 +652,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2848, /* IPE_BPS_WR_SAFELUT_LOW */
@ -612,6 +665,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2988, /* IPE_BPS_WR_ENCCTL_LOW */
@ -623,6 +677,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* JPEG_PRIORITYLUT_LOW */
@ -630,6 +685,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* JPEG_PRIORITYLUT_HIGH */
@ -637,6 +693,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E38, /* JPEG_URGENCY_LOW */
@ -644,6 +701,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* JPEG_DANGERLUT_LOW */
@ -651,6 +709,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* JPEG_SAFELUT_LOW */
@ -658,6 +717,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -665,6 +725,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

63
drivers/cam_cpas/cpas_top/cpastop_v480_custom.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V480_CUSTOM_H_
@ -202,6 +202,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* CDM_PRIORITYLUT_LOW */
@ -209,6 +210,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* CDM_PRIORITYLUT_HIGH */
@ -216,6 +218,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* CDM_URGENCY_LOW */
@ -223,6 +226,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* CDM_DANGERLUT_LOW */
@ -230,6 +234,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* CDM_SAFELUT_LOW */
@ -237,6 +242,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -244,6 +250,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x630, /* FD_PRIORITYLUT_LOW */
@ -251,6 +258,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x634, /* FD_PRIORITYLUT_HIGH */
@ -258,6 +266,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x638, /* FD_URGENCY_LOW */
@ -265,6 +274,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x640, /* FD_DANGERLUT_LOW */
@ -272,6 +282,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x648, /* FD_SAFELUT_LOW */
@ -279,6 +290,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -286,6 +298,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA30, /* IFE_LINEAR_PRIORITYLUT_LOW */
@ -293,6 +306,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA34, /* IFE_LINEAR_PRIORITYLUT_HIGH */
@ -300,6 +314,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA38, /* IFE_LINEAR_URGENCY_LOW */
@ -307,12 +322,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA40, /* IFE_LINEAR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA48, /* IFE_LINEAR_SAFELUT_LOW */
.value = 0x000F,
@ -324,6 +341,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -331,6 +349,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* IFE_RDI_RD_PRIORITYLUT_LOW */
@ -338,6 +357,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* IFE_RDI_RD_PRIORITYLUT_HIGH */
@ -345,6 +365,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1038, /* IFE_RDI_RD_URGENCY_LOW */
@ -352,12 +373,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1040, /* IFE_RDI_RD_DANGERLUT_LOW */
.value = 0x0,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1048, /* IFE_RDI_RD_SAFELUT_LOW */
.value = 0x0,
@ -369,6 +392,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -376,6 +400,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* IFE_RDI_WR_PRIORITYLUT_LOW */
@ -383,6 +408,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* IFE_RDI_WR_PRIORITYLUT_HIGH */
@ -390,6 +416,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* IFE_RDI_WR_URGENCY_LOW */
@ -397,12 +424,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1440, /* IFE_RDI_WR_DANGERLUT_LOW */
.value = 0xFFFFFFF0,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1448, /* IFE_RDI_WR_SAFELUT_LOW */
.value = 0x1,
@ -414,6 +443,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -421,6 +451,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A30, /* IFE_UBWC_STATS_PRIORITYLUT_LOW */
@ -428,6 +459,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A34, /* IFE_UBWC_STATS_PRIORITYLUT_HIGH */
@ -435,6 +467,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A38, /* IFE_UBWC_STATS_URGENCY_LOW */
@ -442,12 +475,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A40, /* IFE_UBWC_STATS_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A48, /* IFE_UBWC_STATS_SAFELUT_LOW */
.value = 0x000F,
@ -459,6 +494,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1B88, /* IFE_ENCCTL_LOW */
@ -470,6 +506,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E30, /* IPE0_RD_PRIORITYLUT_LOW */
@ -477,6 +514,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E34, /* IPE0_RD_PRIORITYLUT_HIGH */
@ -484,6 +522,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E38, /* IPE0_RD_URGENCY_LOW */
@ -491,6 +530,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E40, /* IPE0_RD_DANGERLUT_LOW */
@ -498,6 +538,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E48, /* IPE0_RD_SAFELUT_LOW */
@ -510,6 +551,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1F08, /* IPE0_RD_DECCTL_LOW */
@ -521,6 +563,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2430, /* IPE1_BPS_RD_PRIORITYLUT_LOW */
@ -528,6 +571,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2434, /* IPE1_BPS_RD_PRIORITYLUT_HIGH */
@ -535,6 +579,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2438, /* IPE1_BPS_RD_URGENCY_LOW */
@ -542,6 +587,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2440, /* IPE1_BPS_RD_DANGERLUT_LOW */
@ -549,6 +595,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2448, /* IPE1_BPS_RD_SAFELUT_LOW */
@ -561,6 +608,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2508, /* IPE1_BPS_RD_DECCTL_LOW */
@ -572,6 +620,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2830, /* IPE_BPS_WR_PRIORITYLUT_LOW */
@ -579,6 +628,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2834, /* IPE_BPS_WR_PRIORITYLUT_HIGH */
@ -586,6 +636,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2838, /* IPE_BPS_WR_URGENCY_LOW */
@ -593,6 +644,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2840, /* IPE_BPS_WR_DANGERLUT_LOW */
@ -600,6 +652,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2848, /* IPE_BPS_WR_SAFELUT_LOW */
@ -612,6 +665,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2988, /* IPE_BPS_WR_ENCCTL_LOW */
@ -623,6 +677,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* JPEG_PRIORITYLUT_LOW */
@ -630,6 +685,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* JPEG_PRIORITYLUT_HIGH */
@ -637,6 +693,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E38, /* JPEG_URGENCY_LOW */
@ -644,6 +701,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* JPEG_DANGERLUT_LOW */
@ -651,6 +709,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* JPEG_SAFELUT_LOW */
@ -658,6 +717,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -665,6 +725,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2088,

20
drivers/cam_cpas/cpas_top/cpastop_v520_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V520_100_H_
@ -84,6 +84,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
@ -91,6 +92,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
@ -98,6 +100,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE38, /* CDM_URGENCY_LOW */
@ -105,6 +108,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE40, /* CDM_DANGERLUT_LOW */
@ -112,6 +116,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE48, /* CDM_SAFELUT_LOW */
@ -119,6 +124,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -126,6 +132,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -134,6 +141,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -142,6 +150,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* TFE_URGENCY_LOW */
@ -149,12 +158,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x40, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x48, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -166,6 +177,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -173,6 +185,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
@ -180,6 +193,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
@ -187,18 +201,21 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x438, /* OPE_URGENCY_LOW */
.value = 0x00000033,
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* OPE_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* OPE_SAFELUT_LOW */
.value = 0xF,
@ -210,6 +227,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
};

18
drivers/cam_cpas/cpas_top/cpastop_v520_110.h
Просмотреть файл

@ -84,6 +84,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
@ -91,6 +92,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
@ -98,6 +100,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE38, /* CDM_URGENCY_LOW */
@ -105,6 +108,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE40, /* CDM_DANGERLUT_LOW */
@ -112,6 +116,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE48, /* CDM_SAFELUT_LOW */
@ -119,6 +124,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -126,6 +132,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -134,6 +141,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -142,6 +150,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* TFE_URGENCY_LOW */
@ -149,12 +158,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x40, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x48, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -166,6 +177,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -173,6 +185,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
@ -180,6 +193,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
@ -187,18 +201,21 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x438, /* OPE_URGENCY_LOW */
.value = 0x00000033,
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* OPE_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* OPE_SAFELUT_LOW */
.value = 0xF,
@ -210,6 +227,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
};

20
drivers/cam_cpas/cpas_top/cpastop_v540_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V540_100_H_
@ -85,6 +85,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
@ -92,6 +93,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
@ -99,6 +101,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE38, /* CDM_URGENCY_LOW */
@ -106,6 +109,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE40, /* CDM_DANGERLUT_LOW */
@ -113,6 +117,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE48, /* CDM_SAFELUT_LOW */
@ -120,6 +125,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -127,6 +133,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -135,6 +142,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -143,6 +151,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* TFE_URGENCY_LOW */
@ -150,12 +159,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x40, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x48, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -167,6 +178,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -174,6 +186,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
@ -181,6 +194,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
@ -188,18 +202,21 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x438, /* OPE_URGENCY_LOW */
.value = 0x00000033,
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* OPE_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* OPE_SAFELUT_LOW */
.value = 0xF,
@ -211,6 +228,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
};

30
drivers/cam_cpas/cpas_top/cpastop_v545_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V545_100_H_
@ -84,6 +84,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
@ -91,6 +92,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
@ -98,6 +100,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE38, /* CDM_URGENCY_LOW */
@ -105,6 +108,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE40, /* CDM_DANGERLUT_LOW */
@ -112,6 +116,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE48, /* CDM_SAFELUT_LOW */
@ -119,6 +124,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -126,6 +132,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -134,6 +141,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -142,6 +150,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* TFE_URGENCY_LOW */
@ -149,12 +158,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x40, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x48, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -166,6 +177,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -173,6 +185,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -181,6 +194,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -189,6 +203,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4038, /* TFE_URGENCY_LOW */
@ -196,12 +211,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x4040, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x4048, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -212,6 +229,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -220,6 +238,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -228,6 +247,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5038, /* TFE_URGENCY_LOW */
@ -235,12 +255,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5040, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5048, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -251,6 +273,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
@ -258,6 +281,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
@ -265,18 +289,21 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x438, /* OPE_URGENCY_LOW */
.value = 0x00000033,
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* OPE_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* OPE_SAFELUT_LOW */
.value = 0xF,
@ -288,6 +315,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
};

28
drivers/cam_cpas/cpas_top/cpastop_v545_110.h
Просмотреть файл

@ -84,6 +84,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
@ -91,6 +92,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
@ -98,6 +100,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE38, /* CDM_URGENCY_LOW */
@ -105,6 +108,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE40, /* CDM_DANGERLUT_LOW */
@ -112,6 +116,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE48, /* CDM_SAFELUT_LOW */
@ -119,6 +124,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
},
{
@ -126,6 +132,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -134,6 +141,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -142,6 +150,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* TFE_URGENCY_LOW */
@ -149,12 +158,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x40, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x48, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -166,6 +177,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
{
@ -173,6 +185,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -181,6 +194,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -189,6 +203,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4038, /* TFE_URGENCY_LOW */
@ -196,12 +211,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x4040, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x4048, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -212,6 +229,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_LOW */
@ -220,6 +238,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
/* TFE_PRIORITYLUT_HIGH */
@ -228,6 +247,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5038, /* TFE_URGENCY_LOW */
@ -235,12 +255,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5040, /* TFE_DANGERLUT_LOW */
.value = 0xffff0000,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x5048, /* TFE_SAFELUT_LOW */
.value = 0x00000003,
@ -251,6 +273,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
@ -258,6 +281,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
@ -265,18 +289,21 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x438, /* OPE_URGENCY_LOW */
.value = 0x00000033,
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x440, /* OPE_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x448, /* OPE_SAFELUT_LOW */
.value = 0xF,
@ -288,6 +315,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
},
};

85
drivers/cam_cpas/cpas_top/cpastop_v570_200.h
Просмотреть файл

@ -204,6 +204,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* CDM_PRIORITYLUT_LOW */
@ -211,6 +212,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* CDM_PRIORITYLUT_HIGH */
@ -218,6 +220,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* CDM_URGENCY_LOW */
@ -225,6 +228,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* CDM_DANGERLUT_LOW */
@ -232,6 +236,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* CDM_SAFELUT_LOW */
@ -239,9 +244,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x408, /* CDM_QOSGEN_MAINCTL */
@ -249,6 +256,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x420, /* CDM_QOSGEN_SHAPING_LOW */
@ -256,6 +264,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x424, /* CDM_QOSGEN_SHAPING_HIGH */
@ -267,6 +276,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA30, /* IFE_LINEAR_PRIORITYLUT_LOW */
@ -274,6 +284,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA34, /* IFE_LINEAR_PRIORITYLUT_HIGH */
@ -281,6 +292,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA38, /* IFE_LINEAR_URGENCY_LOW */
@ -288,12 +300,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA40, /* IFE_LINEAR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA48, /* IFE_LINEAR_SAFELUT_LOW */
.value = 0x000F,
@ -305,9 +319,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE08, /* IFE_LINEAR_QOSGEN_MAINCTL */
@ -315,6 +331,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE20, /* IFE_LINEAR_QOSGEN_SHAPING_LOW */
@ -322,6 +339,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE24, /* IFE_LINEAR_QOSGEN_SHAPING_HIGH */
@ -333,6 +351,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* IFE_RDI_RD_PRIORITYLUT_LOW */
@ -340,6 +359,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* IFE_RDI_RD_PRIORITYLUT_HIGH */
@ -347,6 +367,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1038, /* IFE_RDI_RD_URGENCY_LOW */
@ -354,12 +375,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1040, /* IFE_RDI_RD_DANGERLUT_LOW */
.value = 0x0,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1048, /* IFE_RDI_RD_SAFELUT_LOW */
.value = 0x0,
@ -371,9 +394,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF08, /* IFE_RDI_RD_QOSGEN_MAINCTL */
@ -381,6 +406,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF20, /* IFE_RDI_RD_QOSGEN_SHAPING_LOW */
@ -388,6 +414,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF24, /* IFE_RDI_RD_QOSGEN_SHAPING_HIGH */
@ -399,6 +426,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* IFE_RDI_WR_0_PRIORITYLUT_LOW */
@ -406,6 +434,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* IFE_RDI_WR_0_PRIORITYLUT_HIGH */
@ -413,6 +442,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* IFE_RDI_WR_0_URGENCY_LOW */
@ -420,12 +450,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1440, /* IFE_RDI_WR_0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1448, /* IFE_RDI_WR_0_SAFELUT_LOW */
.value = 0x000F,
@ -437,9 +469,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1808, /* IFE_RDI_WR_0_QOSGEN_MAINCTL */
@ -447,6 +481,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1820, /* IFE_RDI_WR_0_QOSGEN_SHAPING_LOW */
@ -454,6 +489,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1824, /* IFE_RDI_WR_0_QOSGEN_SHAPING_HIGH */
@ -465,6 +501,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A30, /* IFE_UBWC_STATS_0_PRIORITYLUT_LOW */
@ -472,6 +509,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A34,
@ -480,6 +518,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A38, /* IFE_UBWC_STATS_0_URGENCY_LOW */
@ -487,12 +526,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A40, /* IFE_UBWC_STATS_0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A48, /* IFE_UBWC_STATS_0_SAFELUT_LOW */
.value = 0x000F,
@ -504,6 +545,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1B88, /* IFE_UBWC_STATS_0_ENCCTL_LOW */
@ -511,6 +553,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1908, /* IFE_UBWC_STATS_0_QOSGEN_MAINCTL */
@ -518,6 +561,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1920,
@ -526,6 +570,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1924,
@ -538,6 +583,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E30, /* IPE0_RD_PRIORITYLUT_LOW */
@ -545,6 +591,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E34, /* IPE0_RD_PRIORITYLUT_HIGH */
@ -552,6 +599,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E38, /* IPE0_RD_URGENCY_LOW */
@ -559,6 +607,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E40, /* IPE0_RD_DANGERLUT_LOW */
@ -566,6 +615,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E48, /* IPE0_RD_SAFELUT_LOW */
@ -578,6 +628,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1F08, /* IPE0_RD_DECCTL_LOW */
@ -585,6 +636,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2208, /* IPE0_RD_QOSGEN_MAINCTL */
@ -592,6 +644,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2220, /* IPE0_RD_QOSGEN_SHAPING_LOW */
@ -599,6 +652,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2224, /* IPE0_RD_QOSGEN_SHAPING_HIGH */
@ -610,6 +664,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2430, /* IPE1_BPS_RD_PRIORITYLUT_LOW */
@ -617,6 +672,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2434, /* IPE1_BPS_RD_PRIORITYLUT_HIGH */
@ -624,6 +680,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2438, /* IPE1_BPS_RD_URGENCY_LOW */
@ -631,6 +688,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2440, /* IPE1_BPS_RD_DANGERLUT_LOW */
@ -638,6 +696,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2448, /* IPE1_BPS_RD_SAFELUT_LOW */
@ -650,6 +709,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2508, /* IPE1_BPS_RD_DECCTL_LOW */
@ -657,6 +717,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2308, /* IPE1_BPS_RD_QOSGEN_MAINCTL */
@ -665,6 +726,7 @@ static struct cam_camnoc_specific
// TITAN_A_CAMNOC_cam_noc_amm_nrt_niu_0_qosgen_Shaping_Low
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2320, /* IPE1_BPS_RD_QOSGEN_SHAPING_LOW */
@ -672,6 +734,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2324, /* IPE1_BPS_RD_QOSGEN_SHAPING_HIGH */
@ -683,6 +746,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2830, /* IPE_BPS_WR_PRIORITYLUT_LOW */
@ -690,6 +754,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2834, /* IPE_BPS_WR_PRIORITYLUT_HIGH */
@ -697,6 +762,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2838, /* IPE_BPS_WR_URGENCY_LOW */
@ -704,6 +770,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2840, /* IPE_BPS_WR_DANGERLUT_LOW */
@ -711,6 +778,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2848, /* IPE_BPS_WR_SAFELUT_LOW */
@ -723,6 +791,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2988, /* IPE_BPS_WR_ENCCTL_LOW */
@ -730,6 +799,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C08, /* IPE_BPS_WR_QOSGEN_MAINCTL */
@ -737,6 +807,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C20, /* IPE_BPS_WR_QOSGEN_SHAPING_LOW */
@ -744,6 +815,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C24, /* IPE_BPS_WR_QOSGEN_SHAPING_HIGH */
@ -755,6 +827,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* JPEG_PRIORITYLUT_LOW */
@ -762,6 +835,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* JPEG_PRIORITYLUT_HIGH */
@ -769,6 +843,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E38, /* JPEG_URGENCY_LOW */
@ -776,6 +851,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* JPEG_DANGERLUT_LOW */
@ -783,6 +859,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* JPEG_SAFELUT_LOW */
@ -790,9 +867,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D08, /* JPEG_QOSGEN_MAINCTL */
@ -800,6 +879,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D20, /* JPEG_QOSGEN_SHAPING_LOW */
@ -807,6 +887,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D24, /* JPEG_QOSGEN_SHAPING_HIGH */
@ -818,6 +899,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x3888,
@ -825,6 +907,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3488, /* ICP_QOSGEN_MAINCTL */
@ -832,6 +915,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34A0, /* ICP_QOSGEN_SHAPING_LOW */
@ -839,6 +923,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34A4, /* ICP_QOSGEN_SHAPING_HIGH */

105
drivers/cam_cpas/cpas_top/cpastop_v580_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V580_100_H_
@ -227,6 +227,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* CDM_PRIORITYLUT_LOW */
@ -234,6 +235,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* CDM_PRIORITYLUT_HIGH */
@ -241,6 +243,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* CDM_URGENCY_LOW */
@ -248,6 +251,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* CDM_DANGERLUT_LOW */
@ -255,6 +259,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* CDM_SAFELUT_LOW */
@ -262,9 +267,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x408, /* CDM_QOSGEN_MAINCTL */
@ -272,6 +279,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x420, /* CDM_QOSGEN_SHAPING_LOW */
@ -279,6 +287,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x424, /* CDM_QOSGEN_SHAPING_HIGH */
@ -290,6 +299,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA30, /* IFE_LINEAR_PRIORITYLUT_LOW */
@ -297,6 +307,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA34, /* IFE_LINEAR_PRIORITYLUT_HIGH */
@ -304,6 +315,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA38, /* IFE_LINEAR_URGENCY_LOW */
@ -311,12 +323,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA40, /* IFE_LINEAR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA48, /* IFE_LINEAR_SAFELUT_LOW */
.value = 0x000F,
@ -328,9 +342,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE08, /* IFE_LINEAR_QOSGEN_MAINCTL */
@ -338,6 +354,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE20, /* IFE_LINEAR_QOSGEN_SHAPING_LOW */
@ -345,6 +362,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE24, /* IFE_LINEAR_QOSGEN_SHAPING_HIGH */
@ -356,6 +374,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* IFE_RDI_RD_PRIORITYLUT_LOW */
@ -363,6 +382,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* IFE_RDI_RD_PRIORITYLUT_HIGH */
@ -370,6 +390,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1038, /* IFE_RDI_RD_URGENCY_LOW */
@ -377,12 +398,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1040, /* IFE_RDI_RD_DANGERLUT_LOW */
.value = 0x0,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1048, /* IFE_RDI_RD_SAFELUT_LOW */
.value = 0x0,
@ -394,9 +417,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF08, /* IFE_RDI_RD_QOSGEN_MAINCTL */
@ -404,6 +429,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF20, /* IFE_RDI_RD_QOSGEN_SHAPING_LOW */
@ -411,6 +437,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF24, /* IFE_RDI_RD_QOSGEN_SHAPING_HIGH */
@ -422,6 +449,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* IFE_RDI_WR_0_PRIORITYLUT_LOW */
@ -429,6 +457,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* IFE_RDI_WR_0_PRIORITYLUT_HIGH */
@ -436,6 +465,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* IFE_RDI_WR_0_URGENCY_LOW */
@ -443,12 +473,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1440, /* IFE_RDI_WR_0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1448, /* IFE_RDI_WR_0_SAFELUT_LOW */
.value = 0x000F,
@ -460,9 +492,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1808, /* IFE_RDI_WR_0_QOSGEN_MAINCTL */
@ -470,6 +504,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1820, /* IFE_RDI_WR_0_QOSGEN_SHAPING_LOW */
@ -477,6 +512,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1824, /* IFE_RDI_WR_0_QOSGEN_SHAPING_HIGH */
@ -488,6 +524,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7430, /* IFE_RDI_WR_1_PRIORITYLUT_LOW */
@ -495,6 +532,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7434, /* IFE_RDI_WR_1_PRIORITYLUT_HIGH */
@ -502,6 +540,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7438, /* IFE_RDI_WR_1_URGENCY_LOW */
@ -509,12 +548,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7440, /* IFE_RDI_WR_1_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7448, /* IFE_RDI_WR_1_SAFELUT_LOW */
.value = 0x000F,
@ -526,9 +567,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C08, /* IFE_RDI_WR_1_QOSGEN_MAINCTL */
@ -536,6 +579,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C20, /* IFE_RDI_WR_1_QOSGEN_SHAPING_LOW */
@ -543,6 +587,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C24, /* IFE_RDI_WR_1_QOSGEN_SHAPING_HIGH */
@ -554,6 +599,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A30, /* IFE_UBWC_STATS_0_PRIORITYLUT_LOW */
@ -561,6 +607,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A34,
@ -569,6 +616,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A38, /* IFE_UBWC_STATS_0_URGENCY_LOW */
@ -576,12 +624,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A40, /* IFE_UBWC_STATS_0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A48, /* IFE_UBWC_STATS_0_SAFELUT_LOW */
.value = 0x000F,
@ -593,6 +643,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1B88, /* IFE_UBWC_STATS_0_ENCCTL_LOW */
@ -600,6 +651,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1908, /* IFE_UBWC_STATS_0_QOSGEN_MAINCTL */
@ -607,6 +659,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1920,
@ -615,6 +668,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1924,
@ -627,6 +681,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7630, /* IFE_UBWC_STATS_1_PRIORITYLUT_LOW */
@ -634,6 +689,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7634,
@ -642,6 +698,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7638, /* IFE_UBWC_STATS_1_URGENCY_LOW */
@ -649,12 +706,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7640, /* IFE_UBWC_STATS_1_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7648, /* IFE_UBWC_STATS_1_SAFELUT_LOW */
.value = 0x000F,
@ -666,6 +725,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7788, /* IFE_UBWC_STATS_1_ENCCTL_LOW */
@ -673,6 +733,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C88, /* IFE_UBWC_STATS_1_QOSGEN_MAINCTL */
@ -680,6 +741,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7CA0,
@ -688,6 +750,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7CA4,
@ -700,6 +763,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E30, /* IPE0_RD_PRIORITYLUT_LOW */
@ -707,6 +771,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E34, /* IPE0_RD_PRIORITYLUT_HIGH */
@ -714,6 +779,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E38, /* IPE0_RD_URGENCY_LOW */
@ -721,6 +787,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E40, /* IPE0_RD_DANGERLUT_LOW */
@ -728,6 +795,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E48, /* IPE0_RD_SAFELUT_LOW */
@ -740,6 +808,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1F08, /* IPE0_RD_DECCTL_LOW */
@ -747,6 +816,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2208, /* IPE0_RD_QOSGEN_MAINCTL */
@ -754,6 +824,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2220, /* IPE0_RD_QOSGEN_SHAPING_LOW */
@ -761,6 +832,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2224, /* IPE0_RD_QOSGEN_SHAPING_HIGH */
@ -772,6 +844,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2430, /* IPE1_BPS_RD_PRIORITYLUT_LOW */
@ -779,6 +852,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2434, /* IPE1_BPS_RD_PRIORITYLUT_HIGH */
@ -786,6 +860,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2438, /* IPE1_BPS_RD_URGENCY_LOW */
@ -793,6 +868,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2440, /* IPE1_BPS_RD_DANGERLUT_LOW */
@ -800,6 +876,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2448, /* IPE1_BPS_RD_SAFELUT_LOW */
@ -812,6 +889,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2508, /* IPE1_BPS_RD_DECCTL_LOW */
@ -819,6 +897,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2308, /* IPE1_BPS_RD_QOSGEN_MAINCTL */
@ -826,6 +905,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2320, /* IPE1_BPS_RD_QOSGEN_SHAPING_LOW */
@ -833,6 +913,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2324, /* IPE1_BPS_RD_QOSGEN_SHAPING_HIGH */
@ -844,6 +925,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2830, /* IPE_BPS_WR_PRIORITYLUT_LOW */
@ -851,6 +933,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2834, /* IPE_BPS_WR_PRIORITYLUT_HIGH */
@ -858,6 +941,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2838, /* IPE_BPS_WR_URGENCY_LOW */
@ -865,6 +949,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2840, /* IPE_BPS_WR_DANGERLUT_LOW */
@ -872,6 +957,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2848, /* IPE_BPS_WR_SAFELUT_LOW */
@ -884,6 +970,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2988, /* IPE_BPS_WR_ENCCTL_LOW */
@ -891,6 +978,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C08, /* IPE_BPS_WR_QOSGEN_MAINCTL */
@ -898,6 +986,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C20, /* IPE_BPS_WR_QOSGEN_SHAPING_LOW */
@ -905,6 +994,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C24, /* IPE_BPS_WR_QOSGEN_SHAPING_HIGH */
@ -916,6 +1006,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* JPEG_PRIORITYLUT_LOW */
@ -923,6 +1014,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* JPEG_PRIORITYLUT_HIGH */
@ -930,6 +1022,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E38, /* JPEG_URGENCY_LOW */
@ -937,6 +1030,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* JPEG_DANGERLUT_LOW */
@ -944,6 +1038,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* JPEG_SAFELUT_LOW */
@ -951,9 +1046,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D08, /* JPEG_QOSGEN_MAINCTL */
@ -961,6 +1058,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D20, /* JPEG_QOSGEN_SHAPING_LOW */
@ -968,6 +1066,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D24, /* JPEG_QOSGEN_SHAPING_HIGH */
@ -979,6 +1078,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x3888,
@ -986,6 +1086,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3488, /* ICP_QOSGEN_MAINCTL */
@ -993,6 +1094,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34A0, /* ICP_QOSGEN_SHAPING_LOW */
@ -1000,6 +1102,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34A4, /* ICP_QOSGEN_SHAPING_HIGH */

105
drivers/cam_cpas/cpas_top/cpastop_v580_custom.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V580_CUSTOM_H_
@ -227,6 +227,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* CDM_PRIORITYLUT_LOW */
@ -234,6 +235,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* CDM_PRIORITYLUT_HIGH */
@ -241,6 +243,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* CDM_URGENCY_LOW */
@ -248,6 +251,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* CDM_DANGERLUT_LOW */
@ -255,6 +259,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* CDM_SAFELUT_LOW */
@ -262,9 +267,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x408, /* CDM_QOSGEN_MAINCTL */
@ -272,6 +279,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x420, /* CDM_QOSGEN_SHAPING_LOW */
@ -279,6 +287,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x424, /* CDM_QOSGEN_SHAPING_HIGH */
@ -290,6 +299,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA30, /* IFE_LINEAR_PRIORITYLUT_LOW */
@ -297,6 +307,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA34, /* IFE_LINEAR_PRIORITYLUT_HIGH */
@ -304,6 +315,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xA38, /* IFE_LINEAR_URGENCY_LOW */
@ -311,12 +323,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA40, /* IFE_LINEAR_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0xA48, /* IFE_LINEAR_SAFELUT_LOW */
.value = 0x000F,
@ -328,9 +342,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE08, /* IFE_LINEAR_QOSGEN_MAINCTL */
@ -338,6 +354,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE20, /* IFE_LINEAR_QOSGEN_SHAPING_LOW */
@ -345,6 +362,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xE24, /* IFE_LINEAR_QOSGEN_SHAPING_HIGH */
@ -356,6 +374,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1030, /* IFE_RDI_RD_PRIORITYLUT_LOW */
@ -363,6 +382,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1034, /* IFE_RDI_RD_PRIORITYLUT_HIGH */
@ -370,6 +390,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1038, /* IFE_RDI_RD_URGENCY_LOW */
@ -377,12 +398,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1040, /* IFE_RDI_RD_DANGERLUT_LOW */
.value = 0x0,
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1048, /* IFE_RDI_RD_SAFELUT_LOW */
.value = 0x0,
@ -394,9 +417,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF08, /* IFE_RDI_RD_QOSGEN_MAINCTL */
@ -404,6 +429,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF20, /* IFE_RDI_RD_QOSGEN_SHAPING_LOW */
@ -411,6 +437,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0xF24, /* IFE_RDI_RD_QOSGEN_SHAPING_HIGH */
@ -422,6 +449,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1430, /* IFE_RDI_WR_0_PRIORITYLUT_LOW */
@ -429,6 +457,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1434, /* IFE_RDI_WR_0_PRIORITYLUT_HIGH */
@ -436,6 +465,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1438, /* IFE_RDI_WR_0_URGENCY_LOW */
@ -443,12 +473,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1440, /* IFE_RDI_WR_0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1448, /* IFE_RDI_WR_0_SAFELUT_LOW */
.value = 0x0000,
@ -460,9 +492,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1808, /* IFE_RDI_WR_0_QOSGEN_MAINCTL */
@ -470,6 +504,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1820, /* IFE_RDI_WR_0_QOSGEN_SHAPING_LOW */
@ -477,6 +512,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1824, /* IFE_RDI_WR_0_QOSGEN_SHAPING_HIGH */
@ -488,6 +524,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7430, /* IFE_RDI_WR_1_PRIORITYLUT_LOW */
@ -495,6 +532,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7434, /* IFE_RDI_WR_1_PRIORITYLUT_HIGH */
@ -502,6 +540,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7438, /* IFE_RDI_WR_1_URGENCY_LOW */
@ -509,12 +548,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7440, /* IFE_RDI_WR_1_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7448, /* IFE_RDI_WR_1_SAFELUT_LOW */
.value = 0x0000,
@ -526,9 +567,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C08, /* IFE_RDI_WR_1_QOSGEN_MAINCTL */
@ -536,6 +579,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C20, /* IFE_RDI_WR_1_QOSGEN_SHAPING_LOW */
@ -543,6 +587,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C24, /* IFE_RDI_WR_1_QOSGEN_SHAPING_HIGH */
@ -554,6 +599,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A30, /* IFE_UBWC_STATS_0_PRIORITYLUT_LOW */
@ -561,6 +607,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A34,
@ -569,6 +616,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1A38, /* IFE_UBWC_STATS_0_URGENCY_LOW */
@ -576,12 +624,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A40, /* IFE_UBWC_STATS_0_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x1A48, /* IFE_UBWC_STATS_0_SAFELUT_LOW */
.value = 0x000F,
@ -593,6 +643,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1B88, /* IFE_UBWC_STATS_0_ENCCTL_LOW */
@ -600,6 +651,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1908, /* IFE_UBWC_STATS_0_QOSGEN_MAINCTL */
@ -607,6 +659,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1920,
@ -615,6 +668,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1924,
@ -627,6 +681,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7630, /* IFE_UBWC_STATS_1_PRIORITYLUT_LOW */
@ -634,6 +689,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7634,
@ -642,6 +698,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7638, /* IFE_UBWC_STATS_1_URGENCY_LOW */
@ -649,12 +706,14 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7640, /* IFE_UBWC_STATS_1_DANGERLUT_LOW */
.value = 0xFFFFFF00,
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.offset = 0x7648, /* IFE_UBWC_STATS_1_SAFELUT_LOW */
.value = 0x000F,
@ -666,6 +725,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7788, /* IFE_UBWC_STATS_1_ENCCTL_LOW */
@ -673,6 +733,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7C88, /* IFE_UBWC_STATS_1_QOSGEN_MAINCTL */
@ -680,6 +741,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7CA0,
@ -688,6 +750,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7CA4,
@ -700,6 +763,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E30, /* IPE0_RD_PRIORITYLUT_LOW */
@ -707,6 +771,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E34, /* IPE0_RD_PRIORITYLUT_HIGH */
@ -714,6 +779,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E38, /* IPE0_RD_URGENCY_LOW */
@ -721,6 +787,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E40, /* IPE0_RD_DANGERLUT_LOW */
@ -728,6 +795,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1E48, /* IPE0_RD_SAFELUT_LOW */
@ -740,6 +808,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x1F08, /* IPE0_RD_DECCTL_LOW */
@ -747,6 +816,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2208, /* IPE0_RD_QOSGEN_MAINCTL */
@ -754,6 +824,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2220, /* IPE0_RD_QOSGEN_SHAPING_LOW */
@ -761,6 +832,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2224, /* IPE0_RD_QOSGEN_SHAPING_HIGH */
@ -772,6 +844,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2430, /* IPE1_BPS_RD_PRIORITYLUT_LOW */
@ -779,6 +852,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2434, /* IPE1_BPS_RD_PRIORITYLUT_HIGH */
@ -786,6 +860,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2438, /* IPE1_BPS_RD_URGENCY_LOW */
@ -793,6 +868,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2440, /* IPE1_BPS_RD_DANGERLUT_LOW */
@ -800,6 +876,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2448, /* IPE1_BPS_RD_SAFELUT_LOW */
@ -812,6 +889,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2508, /* IPE1_BPS_RD_DECCTL_LOW */
@ -819,6 +897,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2308, /* IPE1_BPS_RD_QOSGEN_MAINCTL */
@ -826,6 +905,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2320, /* IPE1_BPS_RD_QOSGEN_SHAPING_LOW */
@ -833,6 +913,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2324, /* IPE1_BPS_RD_QOSGEN_SHAPING_HIGH */
@ -844,6 +925,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2830, /* IPE_BPS_WR_PRIORITYLUT_LOW */
@ -851,6 +933,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2834, /* IPE_BPS_WR_PRIORITYLUT_HIGH */
@ -858,6 +941,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2838, /* IPE_BPS_WR_URGENCY_LOW */
@ -865,6 +949,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2840, /* IPE_BPS_WR_DANGERLUT_LOW */
@ -872,6 +957,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2848, /* IPE_BPS_WR_SAFELUT_LOW */
@ -884,6 +970,7 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2988, /* IPE_BPS_WR_ENCCTL_LOW */
@ -891,6 +978,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C08, /* IPE_BPS_WR_QOSGEN_MAINCTL */
@ -898,6 +986,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C20, /* IPE_BPS_WR_QOSGEN_SHAPING_LOW */
@ -905,6 +994,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2C24, /* IPE_BPS_WR_QOSGEN_SHAPING_HIGH */
@ -916,6 +1006,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E30, /* JPEG_PRIORITYLUT_LOW */
@ -923,6 +1014,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E34, /* JPEG_PRIORITYLUT_HIGH */
@ -930,6 +1022,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E38, /* JPEG_URGENCY_LOW */
@ -937,6 +1030,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E40, /* JPEG_DANGERLUT_LOW */
@ -944,6 +1038,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2E48, /* JPEG_SAFELUT_LOW */
@ -951,9 +1046,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D08, /* JPEG_QOSGEN_MAINCTL */
@ -961,6 +1058,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D20, /* JPEG_QOSGEN_SHAPING_LOW */
@ -968,6 +1066,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x2D24, /* JPEG_QOSGEN_SHAPING_HIGH */
@ -979,6 +1078,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x3888,
@ -986,6 +1086,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3488, /* ICP_QOSGEN_MAINCTL */
@ -993,6 +1094,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34A0, /* ICP_QOSGEN_SHAPING_LOW */
@ -1000,6 +1102,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34A4, /* ICP_QOSGEN_SHAPING_HIGH */

132
drivers/cam_cpas/cpas_top/cpastop_v680_100.h
Просмотреть файл

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
*/
#ifndef _CPASTOP_V680_100_H_
@ -224,6 +224,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5830, /* IFE_UBWC_PRIORITYLUT_LOW */
@ -231,6 +232,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5834, /* IFE_UBWC_PRIORITYLUT_HIGH */
@ -238,6 +240,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5838, /* IFE_UBWC_URGENCY_LOW */
@ -245,6 +248,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5840, /* IFE_UBWC_DANGERLUT_LOW */
@ -252,6 +256,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5848, /* IFE_UBWC_SAFELUT_LOW */
@ -264,9 +269,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5A08, /* IFE_UBWC_QOSGEN_MAINCTL */
@ -274,6 +281,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5A20, /* IFE_UBWC_QOSGEN_SHAPING_LOW */
@ -281,6 +289,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5A24, /* IFE_UBWC_QOSGEN_SHAPING_HIGH */
@ -292,6 +301,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5230, /* IFE_RDI_WR_PRIORITYLUT_LOW */
@ -299,6 +309,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5234, /* IFE_RDI_WR_PRIORITYLUT_HIGH */
@ -306,6 +317,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5238, /* IFE_RDI_WR_URGENCY_LOW */
@ -313,6 +325,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5240, /* IFE_RDI_WR_DANGERLUT_LOW */
@ -320,6 +333,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5248, /* IFE_RDI_WR_SAFELUT_LOW */
@ -332,9 +346,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5408, /* IFE_RDI_WR_QOSGEN_MAINCTL */
@ -342,6 +358,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5420, /* IFE_RDI_WR_QOSGEN_SHAPING_LOW */
@ -349,6 +366,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5424, /* IFE_RDI_WR_QOSGEN_SHAPING_HIGH */
@ -360,6 +378,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4c30, /* IFE_PDAF_PRIORITYLUT_LOW */
@ -367,6 +386,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4c34, /* IFE_PDAF_PRIORITYLUT_HIGH */
@ -374,6 +394,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4c38, /* IFE_PDAF_URGENCY_LOW */
@ -381,6 +402,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4c40, /* IFE_PDAF_DANGERLUT_LOW */
@ -388,6 +410,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4c48, /* IFE_PDAF_SAFELUT_LOW */
@ -400,9 +423,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4e08, /* IFE_PDAF_QOSGEN_MAINCTL */
@ -410,6 +435,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4e20, /* IFE_PDAF_QOSGEN_SHAPING_LOW */
@ -417,6 +443,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4e24, /* IFE_PDAF_QOSGEN_SHAPING_HIGH */
@ -428,6 +455,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4030, /* IFE_LINEAR_PRIORITYLUT_LOW */
@ -435,6 +463,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4034, /* IFE_LINEAR_PRIORITYLUT_HIGH */
@ -442,6 +471,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4038, /* IFE_LINEAR_URGENCY_LOW */
@ -449,6 +479,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4040, /* IFE_LINEAR_DANGERLUT_LOW */
@ -456,6 +487,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4048, /* IFE_LINEAR_SAFELUT_LOW */
@ -468,9 +500,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4208, /* IFE_LINEAR_QOSGEN_MAINCTL */
@ -478,6 +512,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4220, /* IFE_LINEAR_QOSGEN_SHAPING_LOW */
@ -485,6 +520,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4224, /* IFE_LINEAR_QOSGEN_SHAPING_HIGH */
@ -496,6 +532,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8230, /* IFE_LINEAR_1_PRIORITYLUT_LOW */
@ -503,6 +540,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8234, /* IFE_LINEAR_1_PRIORITYLUT_HIGH */
@ -510,6 +548,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8238, /* IFE_LINEAR_1_URGENCY_LOW */
@ -517,6 +556,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8240, /* IFE_LINEAR_1_DANGERLUT_LOW */
@ -524,6 +564,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8248, /* IFE_LINEAR_1_SAFELUT_LOW */
@ -536,9 +577,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8408, /* IFE_LINEAR_1_QOSGEN_MAINCTL */
@ -546,6 +589,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8420, /* IFE_LINEAR_1_QOSGEN_SHAPING_LOW */
@ -553,6 +597,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x8424, /* IFE_LINEAR_1_QOSGEN_SHAPING_HIGH */
@ -564,6 +609,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4630, /* IFE_LITE_PRIORITYLUT_LOW */
@ -571,6 +617,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4634, /* IFE_LITE_PRIORITYLUT_HIGH */
@ -578,6 +625,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4638, /* IFE_LITE_URGENCY_LOW */
@ -585,6 +633,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4640, /* IFE_LITE_DANGERLUT_LOW */
@ -592,6 +641,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4648, /* IFE_LITE_SAFELUT_LOW */
@ -604,9 +654,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4808, /* IFE_LITE_QOSGEN_MAINCTL */
@ -614,6 +666,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4820, /* IFE_LITE_QOSGEN_SHAPING_LOW */
@ -621,6 +674,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x4824, /* IFE_LITE_QOSGEN_SHAPING_HIGH */
@ -632,6 +686,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7030, /* SFE_RD_PRIORITYLUT_LOW */
@ -639,6 +694,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7034, /* SFE_RD_PRIORITYLUT_HIGH */
@ -646,6 +702,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7038, /* SFE_RD_URGENCY_LOW */
@ -653,6 +710,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7040, /* SFE_RD_DANGERLUT_LOW */
@ -660,6 +718,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7048, /* SFE_RD_SAFELUT_LOW */
@ -672,9 +731,11 @@ static struct cam_camnoc_specific
* register settings.
*/
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7208, /* SFE_RD_QOSGEN_MAINCTL */
@ -682,6 +743,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7220, /* SFE_RD_QOSGEN_SHAPING_LOW */
@ -689,6 +751,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7224, /* SFE_RD_QOSGEN_SHAPING_HIGH */
@ -700,6 +763,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6a30, /* IPE_WR_PRIORITYLUT_LOW */
@ -707,6 +771,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6a34, /* IPE_WR_PRIORITYLUT_HIGH */
@ -714,6 +779,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6a38, /* IPE_WR_URGENCY_LOW */
@ -721,6 +787,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6a40, /* IPE_WR_DANGERLUT_LOW */
@ -728,6 +795,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6a48, /* IPE_WR_SAFELUT_LOW */
@ -735,9 +803,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6c08, /* IPE_WR_QOSGEN_MAINCTL */
@ -745,6 +815,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6c20, /* IPE_WR_QOSGEN_SHAPING_LOW */
@ -752,6 +823,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6c24, /* IPE_WR_QOSGEN_SHAPING_HIGH */
@ -763,6 +835,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x630, /* BPS_WR_PRIORITYLUT_LOW */
@ -770,6 +843,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x634, /* BPS_WR_PRIORITYLUT_HIGH */
@ -777,6 +851,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x638, /* BPS_WR_URGENCY_LOW */
@ -784,6 +859,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x640, /* BPS_WR_DANGERLUT_LOW */
@ -791,6 +867,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x648, /* BPS_WR_SAFELUT_LOW */
@ -798,9 +875,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x808, /* BPS_WR_QOSGEN_MAINCTL */
@ -808,6 +887,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x820, /* BPS_WR_QOSGEN_SHAPING_LOW */
@ -815,6 +895,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x824, /* BPS_WR_QOSGEN_SHAPING_HIGH */
@ -826,6 +907,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x30, /* BPS_RD_PRIORITYLUT_LOW */
@ -833,6 +915,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x34, /* BPS_RD_PRIORITYLUT_HIGH */
@ -840,6 +923,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x38, /* BPS_RD_URGENCY_LOW */
@ -847,6 +931,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x40, /* BPS_RD_DANGERLUT_LOW */
@ -854,6 +939,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x48, /* BPS_RD_SAFELUT_LOW */
@ -861,9 +947,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x208, /* BPS_RD_QOSGEN_MAINCTL */
@ -871,6 +959,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x220, /* BPS_RD_QOSGEN_SHAPING_LOW */
@ -878,6 +967,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x224, /* BPS_RD_QOSGEN_SHAPING_HIGH */
@ -889,6 +979,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7c30, /* JPEG_PRIORITYLUT_LOW */
@ -896,6 +987,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7c34, /* JPEG_PRIORITYLUT_HIGH */
@ -903,6 +995,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7c38, /* JPEG_URGENCY_LOW */
@ -910,6 +1003,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7c40, /* JPEG_DANGERLUT_LOW */
@ -917,6 +1011,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7c48, /* JPEG_SAFELUT_LOW */
@ -924,9 +1019,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7e08, /* JPEG_QOSGEN_MAINCTL */
@ -934,6 +1031,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7e20, /* JPEG_QOSGEN_SHAPING_LOW */
@ -941,6 +1039,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7e24, /* JPEG_QOSGEN_SHAPING_HIGH */
@ -952,6 +1051,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5E30, /* IPE0_RD_PRIORITYLUT_LOW */
@ -959,6 +1059,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5E34, /* IPE0_RD_PRIORITYLUT_HIGH */
@ -966,6 +1067,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5E38, /* IPE0_RD_URGENCY_LOW */
@ -973,6 +1075,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5E40, /* IPE0_RD_DANGERLUT_LOW */
@ -980,6 +1083,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5E48, /* IPE0_RD_SAFELUT_LOW */
@ -987,6 +1091,7 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x5F08, /* IPE0_RD_DECCTL_LOW */
@ -994,6 +1099,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6008, /* IPE0_RD_QOSGEN_MAINCTL */
@ -1001,6 +1107,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6020, /* IPE0_RD_QOSGEN_SHAPING_LOW */
@ -1008,6 +1115,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6024, /* IPE0_RD_QOSGEN_SHAPING_HIGH */
@ -1019,6 +1127,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6430, /* IPE1_RD_PRIORITYLUT_LOW */
@ -1026,6 +1135,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6434, /* IPE1_RD_PRIORITYLUT_HIGH */
@ -1033,6 +1143,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6438, /* IPE1_RD_URGENCY_LOW */
@ -1040,6 +1151,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6440, /* IPE1_RD_DANGERLUT_LOW */
@ -1047,6 +1159,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6448, /* IPE1_RD_SAFELUT_LOW */
@ -1054,9 +1167,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6608, /* IPE1_RD_QOSGEN_MAINCTL */
@ -1064,6 +1179,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6620, /* IPE1_RD_QOSGEN_SHAPING_LOW */
@ -1071,6 +1187,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x6624, /* IPE1_RD_QOSGEN_SHAPING_HIGH */
@ -1082,6 +1199,7 @@ static struct cam_camnoc_specific
.enable = true,
.priority_lut_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3830, /* CDM_PRIORITYLUT_LOW */
@ -1089,6 +1207,7 @@ static struct cam_camnoc_specific
},
.priority_lut_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3834, /* CDM_PRIORITYLUT_HIGH */
@ -1096,6 +1215,7 @@ static struct cam_camnoc_specific
},
.urgency = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3838, /* CDM_URGENCY_LOW */
@ -1103,6 +1223,7 @@ static struct cam_camnoc_specific
},
.danger_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3840, /* CDM_DANGERLUT_LOW */
@ -1110,6 +1231,7 @@ static struct cam_camnoc_specific
},
.safe_lut = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3848, /* CDM_SAFELUT_LOW */
@ -1117,9 +1239,11 @@ static struct cam_camnoc_specific
},
.ubwc_ctl = {
.enable = false,
.is_fuse_based = false,
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3a08, /* CDM_QOSGEN_MAINCTL */
@ -1127,6 +1251,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3a20, /* CDM_QOSGEN_SHAPING_LOW */
@ -1134,6 +1259,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x3a24, /* CDM_QOSGEN_SHAPING_HIGH */
@ -1145,6 +1271,7 @@ static struct cam_camnoc_specific
.enable = true,
.flag_out_set0_low = {
.enable = true,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_WRITE,
.masked_value = 0,
.offset = 0x2288,
@ -1152,6 +1279,7 @@ static struct cam_camnoc_specific
},
.qosgen_mainctl = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x7688, /* ICP_QOSGEN_MAINCTL */
@ -1159,6 +1287,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_low = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x76A0, /* ICP_QOSGEN_SHAPING_LOW */
@ -1166,6 +1295,7 @@ static struct cam_camnoc_specific
},
.qosgen_shaping_high = {
.enable = false,
.is_fuse_based = false,
.access_type = CAM_REG_TYPE_READ_WRITE,
.masked_value = 0,
.offset = 0x76A4, /* ICP_QOSGEN_SHAPING_HIGH */