313 строки
12 KiB
C
313 строки
12 KiB
C
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/*
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* Copyright (c) 2016, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#ifndef AV1_INV_TXFM2D_CFG_H_
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#define AV1_INV_TXFM2D_CFG_H_
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#include "av1/common/av1_inv_txfm1d.h"
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// ---------------- 4x4 1D config -----------------------
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// shift
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static const int8_t inv_shift_4[2] = { 0, -4 };
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// stage range
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static const int8_t inv_stage_range_col_dct_4[4] = { 18, 18, 17, 17 };
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static const int8_t inv_stage_range_row_dct_4[4] = { 18, 18, 18, 18 };
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static const int8_t inv_stage_range_col_adst_4[6] = { 18, 18, 18, 18, 17, 17 };
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static const int8_t inv_stage_range_row_adst_4[6] = { 18, 18, 18, 18, 18, 18 };
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// cos bit
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static const int8_t inv_cos_bit_col_dct_4[4] = { 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_4[4] = { 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_col_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_4[6] = { 13, 13, 13, 13, 13, 13 };
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// ---------------- 8x8 1D constants -----------------------
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// shift
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static const int8_t inv_shift_8[2] = { 0, -5 };
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// stage range
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static const int8_t inv_stage_range_col_dct_8[6] = { 19, 19, 19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_8[6] = { 19, 19, 19, 19, 19, 19 };
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static const int8_t inv_stage_range_col_adst_8[8] = { 19, 19, 19, 19,
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19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_adst_8[8] = { 19, 19, 19, 19,
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19, 19, 19, 19 };
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// cos bit
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static const int8_t inv_cos_bit_col_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_8[6] = { 13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_col_adst_8[8] = {
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13, 13, 13, 13, 13, 13, 13, 13
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};
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static const int8_t inv_cos_bit_row_adst_8[8] = {
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13, 13, 13, 13, 13, 13, 13, 13
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};
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// ---------------- 16x16 1D constants -----------------------
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// shift
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static const int8_t inv_shift_16[2] = { -1, -5 };
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// stage range
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static const int8_t inv_stage_range_col_dct_16[8] = { 19, 19, 19, 19,
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19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_16[8] = { 20, 20, 20, 20,
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20, 20, 20, 20 };
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static const int8_t inv_stage_range_col_adst_16[10] = { 19, 19, 19, 19, 19,
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19, 19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_adst_16[10] = { 20, 20, 20, 20, 20,
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20, 20, 20, 20, 20 };
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// cos bit
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static const int8_t inv_cos_bit_col_dct_16[8] = {
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13, 13, 13, 13, 13, 13, 13, 13
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};
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static const int8_t inv_cos_bit_row_dct_16[8] = {
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12, 12, 12, 12, 12, 12, 12, 12
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};
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static const int8_t inv_cos_bit_col_adst_16[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_16[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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// ---------------- 32x32 1D constants -----------------------
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// shift
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static const int8_t inv_shift_32[2] = { -1, -5 };
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// stage range
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static const int8_t inv_stage_range_col_dct_32[10] = { 19, 19, 19, 19, 19,
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19, 19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_32[10] = { 20, 20, 20, 20, 20,
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20, 20, 20, 20, 20 };
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static const int8_t inv_stage_range_col_adst_32[12] = {
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19, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, 18
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};
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static const int8_t inv_stage_range_row_adst_32[12] = {
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20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20
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};
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// cos bit
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static const int8_t inv_cos_bit_col_dct_32[10] = { 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_32[10] = { 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12 };
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static const int8_t inv_cos_bit_col_adst_32[12] = { 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_adst_32[12] = { 12, 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12, 12 };
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// ---------------- 64x64 1D constants -----------------------
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// shift
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static const int8_t inv_shift_64[2] = { -1, -7 };
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// stage range
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static const int8_t inv_stage_range_col_dct_64[12] = { 19, 19, 19, 19, 19, 19,
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19, 19, 19, 19, 18, 18 };
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static const int8_t inv_stage_range_row_dct_64[12] = { 20, 20, 20, 20, 20, 20,
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20, 20, 20, 20, 20, 20 };
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// cos bit
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static const int8_t inv_cos_bit_col_dct_64[12] = { 13, 13, 13, 13, 13, 13,
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13, 13, 13, 13, 13, 13 };
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static const int8_t inv_cos_bit_row_dct_64[12] = { 12, 12, 12, 12, 12, 12,
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12, 12, 12, 12, 12, 12 };
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// ---------------- row config inv_dct_4 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_4 = {
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4, // .txfm_size
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4, // .stage_num
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// 0, // .log_scale
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inv_shift_4, // .shift
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inv_stage_range_row_dct_4, // .stage_range
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inv_cos_bit_row_dct_4, // .cos_bit
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TXFM_TYPE_DCT4 // .txfm_type
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};
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// ---------------- row config inv_dct_8 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_8 = {
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8, // .txfm_size
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6, // .stage_num
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// 0, // .log_scale
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inv_shift_8, // .shift
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inv_stage_range_row_dct_8, // .stage_range
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inv_cos_bit_row_dct_8, // .cos_bit_
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TXFM_TYPE_DCT8 // .txfm_type
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};
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// ---------------- row config inv_dct_16 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_16 = {
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16, // .txfm_size
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8, // .stage_num
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// 0, // .log_scale
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inv_shift_16, // .shift
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inv_stage_range_row_dct_16, // .stage_range
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inv_cos_bit_row_dct_16, // .cos_bit
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TXFM_TYPE_DCT16 // .txfm_type
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};
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// ---------------- row config inv_dct_32 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_32 = {
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32, // .txfm_size
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10, // .stage_num
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// 1, // .log_scale
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inv_shift_32, // .shift
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inv_stage_range_row_dct_32, // .stage_range
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inv_cos_bit_row_dct_32, // .cos_bit_row
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TXFM_TYPE_DCT32 // .txfm_type
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};
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// ---------------- row config inv_dct_64 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_dct_64 = {
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64, // .txfm_size
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12, // .stage_num
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inv_shift_64, // .shift
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inv_stage_range_row_dct_64, // .stage_range
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inv_cos_bit_row_dct_64, // .cos_bit
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TXFM_TYPE_DCT64, // .txfm_type_col
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};
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// ---------------- row config inv_adst_4 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_4 = {
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4, // .txfm_size
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6, // .stage_num
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// 0, // .log_scale
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inv_shift_4, // .shift
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inv_stage_range_row_adst_4, // .stage_range
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inv_cos_bit_row_adst_4, // .cos_bit
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TXFM_TYPE_ADST4, // .txfm_type
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};
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// ---------------- row config inv_adst_8 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_8 = {
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8, // .txfm_size
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8, // .stage_num
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// 0, // .log_scale
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inv_shift_8, // .shift
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inv_stage_range_row_adst_8, // .stage_range
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inv_cos_bit_row_adst_8, // .cos_bit
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TXFM_TYPE_ADST8, // .txfm_type_col
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};
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// ---------------- row config inv_adst_16 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_16 = {
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16, // .txfm_size
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10, // .stage_num
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// 0, // .log_scale
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inv_shift_16, // .shift
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inv_stage_range_row_adst_16, // .stage_range
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inv_cos_bit_row_adst_16, // .cos_bit
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TXFM_TYPE_ADST16, // .txfm_type
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};
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// ---------------- row config inv_adst_32 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_row_cfg_adst_32 = {
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32, // .txfm_size
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12, // .stage_num
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// 1, // .log_scale
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inv_shift_32, // .shift
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inv_stage_range_row_adst_32, // .stage_range
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inv_cos_bit_row_adst_32, // .cos_bit
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TXFM_TYPE_ADST32, // .txfm_type
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};
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// ---------------- col config inv_dct_4 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_4 = {
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4, // .txfm_size
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4, // .stage_num
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// 0, // .log_scale
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inv_shift_4, // .shift
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inv_stage_range_col_dct_4, // .stage_range
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inv_cos_bit_col_dct_4, // .cos_bit
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TXFM_TYPE_DCT4 // .txfm_type
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};
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// ---------------- col config inv_dct_8 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_8 = {
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8, // .txfm_size
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6, // .stage_num
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// 0, // .log_scale
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inv_shift_8, // .shift
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inv_stage_range_col_dct_8, // .stage_range
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inv_cos_bit_col_dct_8, // .cos_bit_
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TXFM_TYPE_DCT8 // .txfm_type
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};
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// ---------------- col config inv_dct_16 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_16 = {
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16, // .txfm_size
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8, // .stage_num
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// 0, // .log_scale
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inv_shift_16, // .shift
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inv_stage_range_col_dct_16, // .stage_range
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inv_cos_bit_col_dct_16, // .cos_bit
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TXFM_TYPE_DCT16 // .txfm_type
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};
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// ---------------- col config inv_dct_32 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_32 = {
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32, // .txfm_size
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10, // .stage_num
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// 1, // .log_scale
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inv_shift_32, // .shift
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inv_stage_range_col_dct_32, // .stage_range
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inv_cos_bit_col_dct_32, // .cos_bit_col
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TXFM_TYPE_DCT32 // .txfm_type
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};
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// ---------------- col config inv_dct_64 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_dct_64 = {
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64, // .txfm_size
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12, // .stage_num
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inv_shift_64, // .shift
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inv_stage_range_col_dct_64, // .stage_range
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inv_cos_bit_col_dct_64, // .cos_bit
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TXFM_TYPE_DCT64, // .txfm_type_col
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};
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// ---------------- col config inv_adst_4 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_4 = {
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4, // .txfm_size
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6, // .stage_num
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// 0, // .log_scale
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inv_shift_4, // .shift
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inv_stage_range_col_adst_4, // .stage_range
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inv_cos_bit_col_adst_4, // .cos_bit
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TXFM_TYPE_ADST4, // .txfm_type
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};
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// ---------------- col config inv_adst_8 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_8 = {
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8, // .txfm_size
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8, // .stage_num
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// 0, // .log_scale
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inv_shift_8, // .shift
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inv_stage_range_col_adst_8, // .stage_range
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inv_cos_bit_col_adst_8, // .cos_bit
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TXFM_TYPE_ADST8, // .txfm_type_col
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};
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// ---------------- col config inv_adst_16 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_16 = {
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16, // .txfm_size
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10, // .stage_num
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// 0, // .log_scale
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inv_shift_16, // .shift
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inv_stage_range_col_adst_16, // .stage_range
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inv_cos_bit_col_adst_16, // .cos_bit
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TXFM_TYPE_ADST16, // .txfm_type
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};
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// ---------------- col config inv_adst_32 ----------------
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static const TXFM_1D_CFG inv_txfm_1d_col_cfg_adst_32 = {
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32, // .txfm_size
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12, // .stage_num
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// 1, // .log_scale
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inv_shift_32, // .shift
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inv_stage_range_col_adst_32, // .stage_range
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inv_cos_bit_col_adst_32, // .cos_bit
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TXFM_TYPE_ADST32, // .txfm_type
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};
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#endif // AV1_INV_TXFM2D_CFG_H_
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