Merge "Add vp10_fwd_txfm2d_sse2" into nextgenv2
This commit is contained in:
Angie Chiang
Gerrit Code Review
Коммит
0a9eedfbef
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@ -174,6 +174,8 @@ LIBVPX_TEST_SRCS-$(CONFIG_ANS) += vp10_ans_test.cc
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LIBVPX_TEST_SRCS-$(CONFIG_VP10_ENCODER) += sum_squares_test.cc
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LIBVPX_TEST_SRCS-$(CONFIG_VP10_ENCODER) += subtract_test.cc
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LIBVPX_TEST_SRCS-$(HAVE_SSE2) += vp10_fwd_txfm2d_sse2_test.cc
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ifeq ($(CONFIG_EXT_INTER),yes)
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LIBVPX_TEST_SRCS-$(HAVE_SSSE3) += masked_variance_test.cc
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LIBVPX_TEST_SRCS-$(HAVE_SSSE3) += masked_sad_test.cc
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@ -0,0 +1,71 @@
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#include <math.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include "./vp10_rtcd.h"
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#include "test/acm_random.h"
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#include "test/vp10_txfm_test.h"
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#include "vp10/common/vp10_fwd_txfm2d_cfg.h"
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using libvpx_test::ACMRandom;
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namespace {
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#if CONFIG_VP9_HIGHBITDEPTH
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TEST(vp10_fwd_txfm2d_sse2, accuracy) {
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int16_t input[4096] = {0};
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int32_t output_sse2[4096] = {0};
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int32_t output_c[4096] = {0};
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int txfm_num = 17;
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TXFM_2D_CFG cfg_list[] = {
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fwd_txfm_2d_cfg_dct_dct_4, fwd_txfm_2d_cfg_dct_dct_8,
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fwd_txfm_2d_cfg_dct_dct_16, fwd_txfm_2d_cfg_dct_dct_32,
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fwd_txfm_2d_cfg_dct_dct_64, fwd_txfm_2d_cfg_dct_adst_4,
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fwd_txfm_2d_cfg_dct_adst_8, fwd_txfm_2d_cfg_dct_adst_16,
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fwd_txfm_2d_cfg_dct_adst_32, fwd_txfm_2d_cfg_adst_dct_4,
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fwd_txfm_2d_cfg_adst_dct_8, fwd_txfm_2d_cfg_adst_dct_16,
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fwd_txfm_2d_cfg_adst_dct_32, fwd_txfm_2d_cfg_adst_adst_4,
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fwd_txfm_2d_cfg_adst_adst_8, fwd_txfm_2d_cfg_adst_adst_16,
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fwd_txfm_2d_cfg_adst_adst_32,
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};
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Fwd_Txfm2d_Func txfm2d_func_c_list[] = {
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vp10_fwd_txfm2d_4x4_c, vp10_fwd_txfm2d_8x8_c, vp10_fwd_txfm2d_16x16_c,
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vp10_fwd_txfm2d_32x32_c, vp10_fwd_txfm2d_64x64_c,
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};
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Fwd_Txfm2d_Func txfm2d_func_sse2_list[] = {
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vp10_fwd_txfm2d_4x4_sse2, vp10_fwd_txfm2d_8x8_sse2,
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vp10_fwd_txfm2d_16x16_sse2, vp10_fwd_txfm2d_32x32_sse2,
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vp10_fwd_txfm2d_64x64_sse2,
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};
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for (int i = 0; i < txfm_num; i++) {
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TXFM_2D_CFG cfg = cfg_list[i];
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int txfm_size = cfg.txfm_size;
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int func_idx = get_max_bit(txfm_size) - 2;
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Fwd_Txfm2d_Func txfm2d_func_c = txfm2d_func_c_list[func_idx];
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Fwd_Txfm2d_Func txfm2d_func_sse2 = txfm2d_func_sse2_list[func_idx];
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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// init input
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for (int r = 0; r < txfm_size; r++) {
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for (int c = 0; c < txfm_size; c++) {
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input[r * txfm_size + c] = rnd.Rand16() % base;
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}
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}
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txfm2d_func_c(input, output_c, cfg.txfm_size, &cfg, 10);
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txfm2d_func_sse2(input, output_sse2, cfg.txfm_size, &cfg, 10);
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for (int r = 0; r < txfm_size; r++) {
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for (int c = 0; c < txfm_size; c++) {
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EXPECT_EQ(output_c[r * txfm_size + c], output_sse2[r * txfm_size + c]);
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}
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}
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}
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}
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#endif // CONFIG_VP9_HIGHBITDEPTH
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} // anonymous namespace
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@ -615,15 +615,15 @@ if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
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if (vpx_config("CONFIG_VP9_HIGHBITDEPTH") eq "yes") {
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#fwd txfm
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add_proto qw/void vp10_fwd_txfm2d_4x4/, "const int16_t *input, int32_t *output, const int stride, const TXFM_2D_CFG *cfg, const int bd";
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specialize qw/vp10_fwd_txfm2d_4x4/;
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specialize qw/vp10_fwd_txfm2d_4x4 sse2/;
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add_proto qw/void vp10_fwd_txfm2d_8x8/, "const int16_t *input, int32_t *output, const int stride, const TXFM_2D_CFG *cfg, const int bd";
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specialize qw/vp10_fwd_txfm2d_8x8/;
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specialize qw/vp10_fwd_txfm2d_8x8 sse2/;
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add_proto qw/void vp10_fwd_txfm2d_16x16/, "const int16_t *input, int32_t *output, const int stride, const TXFM_2D_CFG *cfg, const int bd";
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specialize qw/vp10_fwd_txfm2d_16x16/;
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specialize qw/vp10_fwd_txfm2d_16x16 sse2/;
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add_proto qw/void vp10_fwd_txfm2d_32x32/, "const int16_t *input, int32_t *output, const int stride, const TXFM_2D_CFG *cfg, const int bd";
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specialize qw/vp10_fwd_txfm2d_32x32/;
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specialize qw/vp10_fwd_txfm2d_32x32 sse2/;
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add_proto qw/void vp10_fwd_txfm2d_64x64/, "const int16_t *input, int32_t *output, const int stride, const TXFM_2D_CFG *cfg, const int bd";
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specialize qw/vp10_fwd_txfm2d_64x64/;
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specialize qw/vp10_fwd_txfm2d_64x64 sse2/;
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#inv txfm
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add_proto qw/void vp10_inv_txfm2d_add_4x4/, "const int32_t *input, uint16_t *output, const int stride, const TXFM_2D_CFG *cfg, const int bd";
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Разница между файлами не показана из-за своего большого размера
Загрузить разницу
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@ -0,0 +1,117 @@
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#include "vp10/common/x86/vp10_txfm1d_sse2.h"
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static inline void int16_array_with_stride_to_int32_array_without_stride(
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const int16_t *input, int stride, int32_t *output, int txfm1d_size) {
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int r, c;
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for (r = 0; r < txfm1d_size; r++) {
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for (c = 0; c < txfm1d_size; c++) {
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output[r * txfm1d_size + c] = (int32_t)input[r * stride + c];
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}
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}
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}
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typedef void (*TxfmFuncSSE2)(const __m128i *input, __m128i *output,
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const int8_t *cos_bit, const int8_t *stage_range);
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static inline TxfmFuncSSE2 fwd_txfm_type_to_func(TXFM_TYPE txfm_type) {
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switch (txfm_type) {
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case TXFM_TYPE_DCT4:
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return vp10_fdct4_new_sse2;
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break;
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case TXFM_TYPE_DCT8:
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return vp10_fdct8_new_sse2;
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break;
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case TXFM_TYPE_DCT16:
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return vp10_fdct16_new_sse2;
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break;
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case TXFM_TYPE_DCT32:
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return vp10_fdct32_new_sse2;
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break;
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case TXFM_TYPE_DCT64:
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return vp10_fdct64_new_sse2;
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break;
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case TXFM_TYPE_ADST4:
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return vp10_fadst4_new_sse2;
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break;
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case TXFM_TYPE_ADST8:
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return vp10_fadst8_new_sse2;
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break;
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case TXFM_TYPE_ADST16:
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return vp10_fadst16_new_sse2;
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break;
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case TXFM_TYPE_ADST32:
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return vp10_fadst32_new_sse2;
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break;
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default:
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assert(0);
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}
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return NULL;
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}
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static inline void fwd_txfm2d_sse2(const int16_t *input, int32_t *output,
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const int stride, const TXFM_2D_CFG *cfg,
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int32_t *txfm_buf) {
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const int txfm_size = cfg->txfm_size;
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const int8_t *shift = cfg->shift;
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const int8_t *stage_range_col = cfg->stage_range_col;
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const int8_t *stage_range_row = cfg->stage_range_row;
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const int8_t *cos_bit_col = cfg->cos_bit_col;
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const int8_t *cos_bit_row = cfg->cos_bit_row;
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const TxfmFuncSSE2 txfm_func_col = fwd_txfm_type_to_func(cfg->txfm_type_col);
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const TxfmFuncSSE2 txfm_func_row = fwd_txfm_type_to_func(cfg->txfm_type_row);
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__m128i *buf_128 = (__m128i *)txfm_buf;
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__m128i *out_128 = (__m128i *)output;
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int num_per_128 = 4;
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int txfm2d_size_128 = txfm_size * txfm_size / num_per_128;
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int16_array_with_stride_to_int32_array_without_stride(input, stride, txfm_buf,
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txfm_size);
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round_shift_array_32_sse2(buf_128, out_128, txfm2d_size_128, -shift[0]);
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txfm_func_col(out_128, buf_128, cos_bit_col, stage_range_col);
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round_shift_array_32_sse2(buf_128, out_128, txfm2d_size_128, -shift[1]);
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transpose_32(txfm_size, out_128, buf_128);
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txfm_func_row(buf_128, out_128, cos_bit_row, stage_range_row);
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round_shift_array_32_sse2(out_128, buf_128, txfm2d_size_128, -shift[2]);
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transpose_32(txfm_size, buf_128, out_128);
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}
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void vp10_fwd_txfm2d_4x4_sse2(const int16_t *input, int32_t *output,
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const int stride, const TXFM_2D_CFG *cfg,
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const int bd) {
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int32_t txfm_buf[16];
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(void)bd;
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fwd_txfm2d_sse2(input, output, stride, cfg, txfm_buf);
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}
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void vp10_fwd_txfm2d_8x8_sse2(const int16_t *input, int32_t *output,
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const int stride, const TXFM_2D_CFG *cfg,
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const int bd) {
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int32_t txfm_buf[64];
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(void)bd;
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fwd_txfm2d_sse2(input, output, stride, cfg, txfm_buf);
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}
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void vp10_fwd_txfm2d_16x16_sse2(const int16_t *input, int32_t *output,
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const int stride, const TXFM_2D_CFG *cfg,
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const int bd) {
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int32_t txfm_buf[256];
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(void)bd;
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fwd_txfm2d_sse2(input, output, stride, cfg, txfm_buf);
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}
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void vp10_fwd_txfm2d_32x32_sse2(const int16_t *input, int32_t *output,
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const int stride, const TXFM_2D_CFG *cfg,
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const int bd) {
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int32_t txfm_buf[1024];
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(void)bd;
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fwd_txfm2d_sse2(input, output, stride, cfg, txfm_buf);
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}
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void vp10_fwd_txfm2d_64x64_sse2(const int16_t *input, int32_t *output,
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const int stride, const TXFM_2D_CFG *cfg,
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const int bd) {
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int32_t txfm_buf[4096];
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(void)bd;
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fwd_txfm2d_sse2(input, output, stride, cfg, txfm_buf);
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}
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@ -0,0 +1,165 @@
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#ifndef VP10_TXMF1D_SSE2_H_
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#define VP10_TXMF1D_SSE2_H_
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#include <emmintrin.h>
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#include "vp10/common/vp10_txfm.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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void vp10_fdct4_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fdct8_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fdct16_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fdct32_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fdct64_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fadst4_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fadst8_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fadst16_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_fadst32_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_idct4_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_idct8_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_idct16_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_idct32_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_idct64_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_iadst4_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_iadst8_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_iadst16_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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void vp10_iadst32_new_sse2(const __m128i* input, __m128i* output,
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const int8_t* cos_bit, const int8_t* stage_range);
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static INLINE void transpose_32_4x4(int stride, const __m128i* input,
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__m128i* output) {
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__m128i temp0 = _mm_unpacklo_epi32(input[0 * stride], input[2 * stride]);
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__m128i temp1 = _mm_unpackhi_epi32(input[0 * stride], input[2 * stride]);
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__m128i temp2 = _mm_unpacklo_epi32(input[1 * stride], input[3 * stride]);
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__m128i temp3 = _mm_unpackhi_epi32(input[1 * stride], input[3 * stride]);
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output[0 * stride] = _mm_unpacklo_epi32(temp0, temp2);
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output[1 * stride] = _mm_unpackhi_epi32(temp0, temp2);
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output[2 * stride] = _mm_unpacklo_epi32(temp1, temp3);
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output[3 * stride] = _mm_unpackhi_epi32(temp1, temp3);
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}
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// the entire input block can be represent by a grid of 4x4 blocks
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// each 4x4 blocks can be represent by 4 vertical __m128i
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// we first transpose each 4x4 block internally
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// than transpose the grid
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static INLINE void transpose_32(int txfm_size, const __m128i* input,
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__m128i* output) {
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const int num_per_128 = 4;
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const int row_size = txfm_size;
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const int col_size = txfm_size / num_per_128;
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int r, c;
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// transpose each 4x4 block internally
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for (r = 0; r < row_size; r += 4) {
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for (c = 0; c < col_size; c++) {
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transpose_32_4x4(col_size, &input[r * col_size + c],
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&output[c * 4 * col_size + r / 4]);
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}
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}
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}
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#define mullo_epi32(a, b) \
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({ \
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__m128i tmp1 = _mm_mul_epu32(a, b); \
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__m128i tmp2 = _mm_mul_epu32(_mm_srli_si128(a, 4), _mm_srli_si128(b, 4)); \
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_mm_unpacklo_epi32(_mm_shuffle_epi32(tmp1, _MM_SHUFFLE(0, 0, 2, 0)), \
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_mm_shuffle_epi32(tmp2, _MM_SHUFFLE(0, 0, 2, 0))); \
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})
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#define round_shift_32_simple_sse2(input, bit) \
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({ \
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__m128i round = _mm_set1_epi32((1 << (bit - 1)) - 1); \
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__m128i tmp1 = _mm_add_epi32(input, round); \
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_mm_srai_epi32(tmp1, bit); \
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})
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#define round_shift_32_sse2(vec, bit) \
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({ \
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__m128i sign, tmp, round; \
|
||||
sign = _mm_srai_epi32(vec, 31); \
|
||||
tmp = _mm_add_epi32(vec, sign); \
|
||||
tmp = _mm_xor_si128(tmp, sign); \
|
||||
round = _mm_set1_epi32((1 << (bit - 1)) - 1); \
|
||||
tmp = _mm_add_epi32(tmp, round); \
|
||||
tmp = _mm_srli_epi32(tmp, bit); \
|
||||
tmp = _mm_xor_si128(tmp, sign); \
|
||||
_mm_sub_epi32(tmp, sign); \
|
||||
})
|
||||
|
||||
#define round_shift_array_32_sse2(input, output, size, bit) \
|
||||
({ \
|
||||
if (bit > 0) { \
|
||||
int i; \
|
||||
for (i = 0; i < size; i++) { \
|
||||
output[i] = round_shift_32_sse2(input[i], bit); \
|
||||
} \
|
||||
} else { \
|
||||
int i; \
|
||||
for (i = 0; i < size; i++) { \
|
||||
output[i] = _mm_slli_epi32(input[i], -bit); \
|
||||
} \
|
||||
} \
|
||||
})
|
||||
|
||||
// out0 = in0*w0 + in1*w1
|
||||
// out1 = -in1*w0 + in0*w1
|
||||
#define btf_32_sse2_type0(w0, w1, in0, in1, out0, out1, bit) \
|
||||
({ \
|
||||
__m128i ww0, ww1, in0_w0, in1_w1, in0_w1, in1_w0; \
|
||||
ww0 = _mm_set1_epi32(w0); \
|
||||
ww1 = _mm_set1_epi32(w1); \
|
||||
in0_w0 = mullo_epi32(in0, ww0); \
|
||||
in1_w1 = mullo_epi32(in1, ww1); \
|
||||
out0 = _mm_add_epi32(in0_w0, in1_w1); \
|
||||
out0 = round_shift_32_sse2(out0, bit); \
|
||||
in0_w1 = mullo_epi32(in0, ww1); \
|
||||
in1_w0 = mullo_epi32(in1, ww0); \
|
||||
out1 = _mm_sub_epi32(in0_w1, in1_w0); \
|
||||
out1 = round_shift_32_sse2(out1, bit); \
|
||||
})
|
||||
|
||||
// out0 = in0*w0 + in1*w1
|
||||
// out1 = in1*w0 - in0*w1
|
||||
#define btf_32_sse2_type1(w0, w1, in0, in1, out0, out1, bit) \
|
||||
({ \
|
||||
__m128i ww0, ww1, in0_w0, in1_w1, in0_w1, in1_w0; \
|
||||
ww0 = _mm_set1_epi32(w0); \
|
||||
ww1 = _mm_set1_epi32(w1); \
|
||||
in0_w0 = mullo_epi32(in0, ww0); \
|
||||
in1_w1 = mullo_epi32(in1, ww1); \
|
||||
out0 = _mm_add_epi32(in0_w0, in1_w1); \
|
||||
out0 = round_shift_32_sse2(out0, bit); \
|
||||
in0_w1 = mullo_epi32(in0, ww1); \
|
||||
in1_w0 = mullo_epi32(in1, ww0); \
|
||||
out1 = _mm_sub_epi32(in1_w0, in0_w1); \
|
||||
out1 = round_shift_32_sse2(out1, bit); \
|
||||
})
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // VP10_TXMF1D_SSE2_H_
|
||||
|
|
@ -110,6 +110,10 @@ VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/idct_intrin_sse2.c
|
|||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_fwd_txfm_sse2.c
|
||||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_fwd_dct32x32_impl_sse2.h
|
||||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_fwd_txfm_impl_sse2.h
|
||||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_txfm1d_sse2.h
|
||||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_fwd_txfm1d_sse2.h
|
||||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_fwd_txfm1d_sse2.c
|
||||
VP10_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp10_fwd_txfm2d_sse2.c
|
||||
|
||||
ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
|
||||
VP10_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/iht4x4_add_neon.c
|
||||
|
|
|
|||
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