Merge "Consistent names for inverse hybrid transforms (1 of 2)."

This commit is contained in:
Dmitry Kovalev 2013-10-11 15:33:00 -07:00 коммит произвёл Gerrit Code Review
Родитель e765aade0b 7ef573914d
Коммит 107897cf05
10 изменённых файлов: 48 добавлений и 48 удалений

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@ -500,10 +500,10 @@ INSTANTIATE_TEST_CASE_P(
INSTANTIATE_TEST_CASE_P(
C, Trans16x16HT,
::testing::Values(
make_tuple(&vp9_short_fht16x16_c, &vp9_short_iht16x16_add_c, 0),
make_tuple(&vp9_short_fht16x16_c, &vp9_short_iht16x16_add_c, 1),
make_tuple(&vp9_short_fht16x16_c, &vp9_short_iht16x16_add_c, 2),
make_tuple(&vp9_short_fht16x16_c, &vp9_short_iht16x16_add_c, 3)));
make_tuple(&vp9_short_fht16x16_c, &vp9_iht16x16_256_add_c, 0),
make_tuple(&vp9_short_fht16x16_c, &vp9_iht16x16_256_add_c, 1),
make_tuple(&vp9_short_fht16x16_c, &vp9_iht16x16_256_add_c, 2),
make_tuple(&vp9_short_fht16x16_c, &vp9_iht16x16_256_add_c, 3)));
#if HAVE_SSE2
INSTANTIATE_TEST_CASE_P(
@ -514,9 +514,9 @@ INSTANTIATE_TEST_CASE_P(
INSTANTIATE_TEST_CASE_P(
SSE2, Trans16x16HT,
::testing::Values(
make_tuple(&vp9_short_fht16x16_sse2, &vp9_short_iht16x16_add_sse2, 0),
make_tuple(&vp9_short_fht16x16_sse2, &vp9_short_iht16x16_add_sse2, 1),
make_tuple(&vp9_short_fht16x16_sse2, &vp9_short_iht16x16_add_sse2, 2),
make_tuple(&vp9_short_fht16x16_sse2, &vp9_short_iht16x16_add_sse2, 3)));
make_tuple(&vp9_short_fht16x16_sse2, &vp9_iht16x16_256_add_sse2, 0),
make_tuple(&vp9_short_fht16x16_sse2, &vp9_iht16x16_256_add_sse2, 1),
make_tuple(&vp9_short_fht16x16_sse2, &vp9_iht16x16_256_add_sse2, 2),
make_tuple(&vp9_short_fht16x16_sse2, &vp9_iht16x16_256_add_sse2, 3)));
#endif
} // namespace

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@ -39,7 +39,7 @@ void fht4x4(int16_t *in, int16_t *out, uint8_t* /*dst*/,
}
void iht4x4_add(int16_t* /*in*/, int16_t *out, uint8_t *dst,
int stride, int tx_type) {
vp9_short_iht4x4_add_c(out, dst, stride >> 1, tx_type);
vp9_iht4x4_16_add_c(out, dst, stride >> 1, tx_type);
}
class FwdTrans4x4Test : public ::testing::TestWithParam<int> {

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@ -300,10 +300,10 @@ INSTANTIATE_TEST_CASE_P(
INSTANTIATE_TEST_CASE_P(
C, FwdTrans8x8HT,
::testing::Values(
make_tuple(&vp9_short_fht8x8_c, &vp9_short_iht8x8_add_c, 0),
make_tuple(&vp9_short_fht8x8_c, &vp9_short_iht8x8_add_c, 1),
make_tuple(&vp9_short_fht8x8_c, &vp9_short_iht8x8_add_c, 2),
make_tuple(&vp9_short_fht8x8_c, &vp9_short_iht8x8_add_c, 3)));
make_tuple(&vp9_short_fht8x8_c, &vp9_iht8x8_64_add_c, 0),
make_tuple(&vp9_short_fht8x8_c, &vp9_iht8x8_64_add_c, 1),
make_tuple(&vp9_short_fht8x8_c, &vp9_iht8x8_64_add_c, 2),
make_tuple(&vp9_short_fht8x8_c, &vp9_iht8x8_64_add_c, 3)));
#if HAVE_SSE2
INSTANTIATE_TEST_CASE_P(
@ -313,9 +313,9 @@ INSTANTIATE_TEST_CASE_P(
INSTANTIATE_TEST_CASE_P(
SSE2, FwdTrans8x8HT,
::testing::Values(
make_tuple(&vp9_short_fht8x8_sse2, &vp9_short_iht8x8_add_sse2, 0),
make_tuple(&vp9_short_fht8x8_sse2, &vp9_short_iht8x8_add_sse2, 1),
make_tuple(&vp9_short_fht8x8_sse2, &vp9_short_iht8x8_add_sse2, 2),
make_tuple(&vp9_short_fht8x8_sse2, &vp9_short_iht8x8_add_sse2, 3)));
make_tuple(&vp9_short_fht8x8_sse2, &vp9_iht8x8_64_add_sse2, 0),
make_tuple(&vp9_short_fht8x8_sse2, &vp9_iht8x8_64_add_sse2, 1),
make_tuple(&vp9_short_fht8x8_sse2, &vp9_iht8x8_64_add_sse2, 2),
make_tuple(&vp9_short_fht8x8_sse2, &vp9_iht8x8_64_add_sse2, 3)));
#endif
} // namespace

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@ -8,7 +8,7 @@
; be found in the AUTHORS file in the root of the source tree.
;
EXPORT |vp9_short_iht4x4_add_neon|
EXPORT |vp9_iht4x4_16_add_neon|
ARM
REQUIRE8
PRESERVE8
@ -139,7 +139,7 @@
MEND
AREA Block, CODE, READONLY ; name this block of code
;void vp9_short_iht4x4_add_neon(int16_t *input, uint8_t *dest,
;void vp9_iht4x4_16_add_neon(int16_t *input, uint8_t *dest,
; int dest_stride, int tx_type)
;
; r0 int16_t input
@ -147,7 +147,7 @@
; r2 int dest_stride
; r3 int tx_type)
; This function will only handle tx_type of 1,2,3.
|vp9_short_iht4x4_add_neon| PROC
|vp9_iht4x4_16_add_neon| PROC
; load the inputs into d16-d19
vld1.s16 {q8,q9}, [r0]!
@ -175,7 +175,7 @@ iadst_idct
; then transform columns
IADST4x4_1D
b end_vp9_short_iht4x4_add_neon
b end_vp9_iht4x4_16_add_neon
idct_iadst
; generate constants
@ -191,7 +191,7 @@ idct_iadst
; then transform columns
IDCT4x4_1D
b end_vp9_short_iht4x4_add_neon
b end_vp9_iht4x4_16_add_neon
iadst_iadst
; generate constants
@ -206,7 +206,7 @@ iadst_iadst
; then transform columns
IADST4x4_1D
end_vp9_short_iht4x4_add_neon
end_vp9_iht4x4_16_add_neon
; ROUND_POWER_OF_TWO(temp_out[j], 4)
vrshr.s16 q8, q8, #4
vrshr.s16 q9, q9, #4
@ -232,6 +232,6 @@ end_vp9_short_iht4x4_add_neon
vst1.32 {d26[1]}, [r1], r2
vst1.32 {d26[0]}, [r1] ; no post-increment
bx lr
ENDP ; |vp9_short_iht4x4_add_neon|
ENDP ; |vp9_iht4x4_16_add_neon|
END

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@ -8,7 +8,7 @@
; be found in the AUTHORS file in the root of the source tree.
;
EXPORT |vp9_short_iht8x8_add_neon|
EXPORT |vp9_iht8x8_64_add_neon|
ARM
REQUIRE8
PRESERVE8
@ -559,7 +559,7 @@
AREA Block, CODE, READONLY ; name this block of code
;void vp9_short_iht8x8_add_neon(int16_t *input, uint8_t *dest,
;void vp9_iht8x8_64_add_neon(int16_t *input, uint8_t *dest,
; int dest_stride, int tx_type)
;
; r0 int16_t input
@ -567,7 +567,7 @@
; r2 int dest_stride
; r3 int tx_type)
; This function will only handle tx_type of 1,2,3.
|vp9_short_iht8x8_add_neon| PROC
|vp9_iht8x8_64_add_neon| PROC
; load the inputs into d16-d19
vld1.s16 {q8,q9}, [r0]!
@ -602,7 +602,7 @@ iadst_idct
; then transform columns
IADST8X8_1D
b end_vp9_short_iht8x8_add_neon
b end_vp9_iht8x8_64_add_neon
idct_iadst
; generate IADST constants
@ -620,7 +620,7 @@ idct_iadst
; then transform columns
IDCT8x8_1D
b end_vp9_short_iht8x8_add_neon
b end_vp9_iht8x8_64_add_neon
iadst_iadst
; generate IADST constants
@ -635,7 +635,7 @@ iadst_iadst
; then transform columns
IADST8X8_1D
end_vp9_short_iht8x8_add_neon
end_vp9_iht8x8_64_add_neon
pop {r0-r10}
; ROUND_POWER_OF_TWO(temp_out[j], 5)
@ -691,6 +691,6 @@ end_vp9_short_iht8x8_add_neon
vst1.64 {d6}, [r0], r2
vst1.64 {d7}, [r0], r2
bx lr
ENDP ; |vp9_short_iht8x8_add_neon|
ENDP ; |vp9_iht8x8_64_add_neon|
END

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@ -280,7 +280,7 @@ static void iadst4_1d(const int16_t *input, int16_t *output) {
output[3] = dct_const_round_shift(s3);
}
void vp9_short_iht4x4_add_c(int16_t *input, uint8_t *dest, int dest_stride,
void vp9_iht4x4_16_add_c(int16_t *input, uint8_t *dest, int dest_stride,
int tx_type) {
const transform_2d IHT_4[] = {
{ idct4_1d, idct4_1d }, // DCT_DCT = 0
@ -395,7 +395,7 @@ static const transform_2d IHT_8[] = {
{ iadst8_1d, iadst8_1d } // ADST_ADST = 3
};
void vp9_short_iht8x8_add_c(int16_t *input, uint8_t *dest, int dest_stride,
void vp9_iht8x8_64_add_c(int16_t *input, uint8_t *dest, int dest_stride,
int tx_type) {
int i, j;
int16_t out[8 * 8];
@ -813,7 +813,7 @@ static const transform_2d IHT_16[] = {
{ iadst16_1d, iadst16_1d } // ADST_ADST = 3
};
void vp9_short_iht16x16_add_c(int16_t *input, uint8_t *dest, int dest_stride,
void vp9_iht16x16_256_add_c(int16_t *input, uint8_t *dest, int dest_stride,
int tx_type) {
int i, j;
int16_t out[16 * 16];
@ -1362,7 +1362,7 @@ void vp9_iht_add(TX_TYPE tx_type, int16_t *input, uint8_t *dest, int stride,
if (tx_type == DCT_DCT)
vp9_idct4x4_add(input, dest, stride, eob);
else
vp9_short_iht4x4_add(input, dest, stride, tx_type);
vp9_iht4x4_16_add(input, dest, stride, tx_type);
}
void vp9_iht_add_8x8(TX_TYPE tx_type, int16_t *input, uint8_t *dest,
@ -1371,7 +1371,7 @@ void vp9_iht_add_8x8(TX_TYPE tx_type, int16_t *input, uint8_t *dest,
vp9_idct8x8_add(input, dest, stride, eob);
} else {
if (eob > 0) {
vp9_short_iht8x8_add(input, dest, stride, tx_type);
vp9_iht8x8_64_add(input, dest, stride, tx_type);
}
}
}
@ -1382,7 +1382,7 @@ void vp9_iht_add_16x16(TX_TYPE tx_type, int16_t *input, uint8_t *dest,
vp9_idct16x16_add(input, dest, stride, eob);
} else {
if (eob > 0) {
vp9_short_iht16x16_add(input, dest, stride, tx_type);
vp9_iht16x16_256_add(input, dest, stride, tx_type);
}
}
}

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@ -297,14 +297,14 @@ specialize vp9_idct32x32_1024_add sse2 neon
prototype void vp9_idct32x32_1_add "int16_t *input, uint8_t *dest, int dest_stride"
specialize vp9_idct32x32_1_add sse2
prototype void vp9_short_iht4x4_add "int16_t *input, uint8_t *dest, int dest_stride, int tx_type"
specialize vp9_short_iht4x4_add sse2 neon
prototype void vp9_iht4x4_16_add "int16_t *input, uint8_t *dest, int dest_stride, int tx_type"
specialize vp9_iht4x4_16_add sse2 neon
prototype void vp9_short_iht8x8_add "int16_t *input, uint8_t *dest, int dest_stride, int tx_type"
specialize vp9_short_iht8x8_add sse2 neon
prototype void vp9_iht8x8_64_add "int16_t *input, uint8_t *dest, int dest_stride, int tx_type"
specialize vp9_iht8x8_64_add sse2 neon
prototype void vp9_short_iht16x16_add "int16_t *input, uint8_t *output, int pitch, int tx_type"
specialize vp9_short_iht16x16_add sse2
prototype void vp9_iht16x16_256_add "int16_t *input, uint8_t *output, int pitch, int tx_type"
specialize vp9_iht16x16_256_add sse2
# dct and add

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@ -264,7 +264,7 @@ static void iadst4_1d_sse2(__m128i *in) {
in[3] = _mm_unpackhi_epi64(in[1], in[1]);
}
void vp9_short_iht4x4_add_sse2(int16_t *input, uint8_t *dest, int stride,
void vp9_iht4x4_16_add_sse2(int16_t *input, uint8_t *dest, int stride,
int tx_type) {
__m128i in[4];
const __m128i zero = _mm_setzero_si128();
@ -883,7 +883,7 @@ static void iadst8_1d_sse2(__m128i *in) {
}
void vp9_short_iht8x8_add_sse2(int16_t *input, uint8_t *dest, int stride,
void vp9_iht8x8_64_add_sse2(int16_t *input, uint8_t *dest, int stride,
int tx_type) {
__m128i in[8];
const __m128i zero = _mm_setzero_si128();
@ -2386,7 +2386,7 @@ static INLINE void write_buffer_8x16(uint8_t *dest, __m128i *in, int stride) {
RECON_AND_STORE(dest, in[15]);
}
void vp9_short_iht16x16_add_sse2(int16_t *input, uint8_t *dest, int stride,
void vp9_iht16x16_256_add_sse2(int16_t *input, uint8_t *dest, int stride,
int tx_type) {
__m128i in0[16], in1[16];

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@ -623,7 +623,7 @@ void vp9_encode_block_intra(int plane, int block, BLOCK_SIZE plane_bsize,
// case.
xd->itxm_add(dqcoeff, dst, pd->dst.stride, *eob);
else
vp9_short_iht4x4_add(dqcoeff, dst, pd->dst.stride, tx_type);
vp9_iht4x4_16_add(dqcoeff, dst, pd->dst.stride, tx_type);
}
break;
default:

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@ -1109,7 +1109,7 @@ static int64_t rd_pick_intra4x4block(VP9_COMP *cpi, MACROBLOCK *x, int ib,
goto next;
if (tx_type != DCT_DCT)
vp9_short_iht4x4_add(BLOCK_OFFSET(pd->dqcoeff, block),
vp9_iht4x4_16_add(BLOCK_OFFSET(pd->dqcoeff, block),
dst, pd->dst.stride, tx_type);
else
xd->itxm_add(BLOCK_OFFSET(pd->dqcoeff, block), dst, pd->dst.stride,