Add multiple of 8 copies
Change-Id: I8fb710b767a986c898fbef9e329f30bfb0a22dad
This commit is contained in:
Родитель
68f3c3bb04
Коммит
131a0d5519
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@ -633,8 +633,8 @@ if (aom_config("CONFIG_CDEF") eq "yes") {
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add_proto qw/void copy_4x4_16bit_to_8bit/, "uint8_t *dst, int dstride, const uint16_t *src, int sstride";
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add_proto qw/void copy_8x8_16bit_to_16bit/, "uint16_t *dst, int dstride, const uint16_t *src, int sstride";
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add_proto qw/void copy_4x4_16bit_to_16bit/, "uint16_t *dst, int dstride, const uint16_t *src, int sstride";
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add_proto qw/void copy_nxm_8bit_to_16bit/, "uint16_t *dst, int dstride, const uint8_t *src, int sstride, int n, int m";
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add_proto qw/void copy_nxm_16bit_to_16bit/, "uint16_t *dst, int dstride, const uint16_t *src, int sstride, int n, int m";
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add_proto qw/void copy_rect8_8bit_to_16bit/, "uint16_t *dst, int dstride, const uint8_t *src, int sstride, int v, int h";
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add_proto qw/void copy_rect8_16bit_to_16bit/, "uint16_t *dst, int dstride, const uint16_t *src, int sstride, int v, int h";
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# VS compiling for 32 bit targets does not support vector types in
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# structs as arguments, which makes the v256 type of the intrinsics
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@ -652,8 +652,8 @@ if (aom_config("CONFIG_CDEF") eq "yes") {
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specialize qw/copy_4x4_16bit_to_8bit sse2 ssse3 sse4_1 neon/;
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specialize qw/copy_8x8_16bit_to_16bit sse2 ssse3 sse4_1 neon/;
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specialize qw/copy_4x4_16bit_to_16bit sse2 ssse3 sse4_1 neon/;
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specialize qw/copy_nxm_8bit_to_16bit sse2 ssse3 sse4_1 neon/;
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specialize qw/copy_nxm_16bit_to_16bit sse2 ssse3 sse4_1 neon/;
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specialize qw/copy_rect8_8bit_to_16bit sse2 ssse3 sse4_1 neon/;
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specialize qw/copy_rect8_16bit_to_16bit sse2 ssse3 sse4_1 neon/;
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}
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}
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@ -91,21 +91,24 @@ int sb_compute_dering_list(const AV1_COMMON *const cm, int mi_row, int mi_col,
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return count;
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}
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void copy_nxm_8bit_to_16bit_c(uint16_t *dst, int dstride, const uint8_t *src,
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int sstride, int n, int m) {
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void copy_rect8_8bit_to_16bit_c(uint16_t *dst, int dstride, const uint8_t *src,
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int sstride, int v, int h) {
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int i, j;
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for (i = 0; i < m; i++) {
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for (j = 0; j < n; j++) {
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OD_ASSERT((h & 0x7) == 0);
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for (i = 0; i < v; i++) {
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for (j = 0; j < h; j++) {
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dst[i * dstride + j] = src[i * sstride + j];
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}
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}
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}
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void copy_nxm_16bit_to_16bit_c(uint16_t *dst, int dstride, const uint16_t *src,
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int sstride, int n, int m) {
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void copy_rect8_16bit_to_16bit_c(uint16_t *dst, int dstride,
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const uint16_t *src, int sstride, int v,
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int h) {
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int i, j;
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for (i = 0; i < m; i++) {
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for (j = 0; j < n; j++) {
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OD_ASSERT((h & 0x7) == 0);
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for (i = 0; i < v; i++) {
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for (j = 0; j < h; j++) {
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dst[i * dstride + j] = src[i * sstride + j];
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}
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}
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@ -118,11 +121,11 @@ void copy_sb8_16(UNUSED AV1_COMMON *cm, uint16_t *dst, int dstride,
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if (cm->use_highbitdepth) {
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const uint16_t *base =
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&CONVERT_TO_SHORTPTR(src)[src_voffset * sstride + src_hoffset];
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copy_nxm_16bit_to_16bit(dst, dstride, base, sstride, hsize, vsize);
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copy_rect8_16bit_to_16bit(dst, dstride, base, sstride, vsize, hsize);
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} else {
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#endif
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const uint8_t *base = &src[src_voffset * sstride + src_hoffset];
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copy_nxm_8bit_to_16bit(dst, dstride, base, sstride, hsize, vsize);
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copy_rect8_8bit_to_16bit(dst, dstride, base, sstride, vsize, hsize);
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#if CONFIG_AOM_HIGHBITDEPTH
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}
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#endif
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@ -405,32 +405,28 @@ void SIMD_FUNC(copy_4x4_16bit_to_16bit)(uint16_t *dst, int dstride,
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}
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}
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void SIMD_FUNC(copy_nxm_8bit_to_16bit)(uint16_t *dst, int dstride,
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const uint8_t *src, int sstride, int n,
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int m) {
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void SIMD_FUNC(copy_rect8_8bit_to_16bit)(uint16_t *dst, int dstride,
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const uint8_t *src, int sstride, int v,
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int h) {
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int i, j;
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for (i = 0; i < m; i++) {
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for (j = 0; j < (n & ~0x7); j += 8) {
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OD_ASSERT((h & 0x7) == 0);
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for (i = 0; i < v; i++) {
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for (j = 0; j < h; j += 8) {
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v64 row = v64_load_unaligned(&src[i * sstride + j]);
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v128_store_unaligned(&dst[i * dstride + j], v128_unpack_u8_s16(row));
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}
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for (; j < n; j++) {
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dst[i * dstride + j] = src[i * sstride + j];
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}
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}
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}
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void SIMD_FUNC(copy_nxm_16bit_to_16bit)(uint16_t *dst, int dstride,
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const uint16_t *src, int sstride, int n,
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int m) {
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void SIMD_FUNC(copy_rect8_16bit_to_16bit)(uint16_t *dst, int dstride,
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const uint16_t *src, int sstride,
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int v, int h) {
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int i, j;
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for (i = 0; i < m; i++) {
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for (j = 0; j < (n & ~0x7); j += 8) {
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OD_ASSERT((h & 0x7) == 0);
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for (i = 0; i < v; i++) {
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for (j = 0; j < h; j += 8) {
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v128 row = v128_load_unaligned(&src[i * sstride + j]);
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v128_store_unaligned(&dst[i * dstride + j], row);
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}
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for (; j < n; j++) {
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dst[i * dstride + j] = src[i * sstride + j];
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}
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}
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}
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