Improvements on segment mask
Adds a few options to make the compound mask lightly dependent on the the two predictors. Also adds high bit depth support Change-Id: If57b6e8ddd140e0c00fd9d4738927d37225091cb
This commit is contained in:
Родитель
b2ff17f30a
Коммит
1edf9a303f
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@ -41,19 +41,35 @@ extern "C" {
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#if CONFIG_EXT_INTER
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// Should we try rectangular interintra predictions?
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#define USE_RECT_INTERINTRA 1
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#if CONFIG_COMPOUND_SEGMENT
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#define MAX_SEG_MASK_BITS 3
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#if CONFIG_COMPOUND_SEGMENT
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// Set COMPOUND_SEGMENT_TYPE to one of the three
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// 0: Uniform
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// 1: Difference weighted
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#define COMPOUND_SEGMENT_TYPE 1
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#if COMPOUND_SEGMENT_TYPE == 0
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#define MAX_SEG_MASK_BITS 1
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// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
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typedef enum {
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UNIFORM_45 = 0,
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UNIFORM_45_INV,
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UNIFORM_55,
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UNIFORM_55_INV,
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SEG_MASK_TYPES,
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} SEG_MASK_TYPE;
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#elif COMPOUND_SEGMENT_TYPE == 1
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#define MAX_SEG_MASK_BITS 1
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// SEG_MASK_TYPES should not surpass 1 << MAX_SEG_MASK_BITS
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typedef enum {
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DIFFWTD_45 = 0,
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DIFFWTD_45_INV,
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SEG_MASK_TYPES,
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} SEG_MASK_TYPE;
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#endif // COMPOUND_SEGMENT_TYPE
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#endif // CONFIG_COMPOUND_SEGMENT
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#endif
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#endif // CONFIG_EXT_INTER
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typedef enum {
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KEY_FRAME = 0,
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@ -299,8 +299,9 @@ const uint8_t *av1_get_compound_type_mask(
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}
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#if CONFIG_COMPOUND_SEGMENT
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void uniform_mask(uint8_t *mask, int which_inverse, BLOCK_SIZE sb_type, int h,
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int w, int mask_val) {
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#if COMPOUND_SEGMENT_TYPE == 0
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static void uniform_mask(uint8_t *mask, int which_inverse, BLOCK_SIZE sb_type,
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int h, int w, int mask_val) {
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int i, j;
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int block_stride = block_size_wide[sb_type];
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for (i = 0; i < h; ++i)
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@ -321,11 +322,103 @@ void build_compound_seg_mask(uint8_t *mask, SEG_MASK_TYPE mask_type,
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switch (mask_type) {
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case UNIFORM_45: uniform_mask(mask, 0, sb_type, h, w, 45); break;
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case UNIFORM_45_INV: uniform_mask(mask, 1, sb_type, h, w, 45); break;
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case UNIFORM_55: uniform_mask(mask, 0, sb_type, h, w, 55); break;
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case UNIFORM_55_INV: uniform_mask(mask, 1, sb_type, h, w, 55); break;
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default: assert(0);
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}
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}
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#if CONFIG_AOM_HIGHBITDEPTH
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void build_compound_seg_mask_highbd(uint8_t *mask, SEG_MASK_TYPE mask_type,
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const uint8_t *src0, int src0_stride,
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const uint8_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w, int bd) {
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(void)src0;
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(void)src1;
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(void)src0_stride;
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(void)src1_stride;
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(void)bd;
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switch (mask_type) {
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case UNIFORM_45: uniform_mask(mask, 0, sb_type, h, w, 45); break;
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case UNIFORM_45_INV: uniform_mask(mask, 1, sb_type, h, w, 45); break;
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default: assert(0);
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}
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}
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#endif // CONFIG_AOM_HIGHBITDEPTH
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#elif COMPOUND_SEGMENT_TYPE == 1
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#define DIFF_FACTOR 16
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static void diffwtd_mask(uint8_t *mask, int which_inverse, int mask_base,
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const uint8_t *src0, int src0_stride,
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const uint8_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w) {
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int i, j, m, diff;
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int block_stride = block_size_wide[sb_type];
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for (i = 0; i < h; ++i) {
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for (j = 0; j < w; ++j) {
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diff =
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abs((int)src0[i * src0_stride + j] - (int)src1[i * src1_stride + j]);
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m = clamp(mask_base + (diff / DIFF_FACTOR), 0, AOM_BLEND_A64_MAX_ALPHA);
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mask[i * block_stride + j] =
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which_inverse ? AOM_BLEND_A64_MAX_ALPHA - m : m;
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}
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}
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}
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void build_compound_seg_mask(uint8_t *mask, SEG_MASK_TYPE mask_type,
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const uint8_t *src0, int src0_stride,
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const uint8_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w) {
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switch (mask_type) {
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case DIFFWTD_45:
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diffwtd_mask(mask, 0, 47, src0, src0_stride, src1, src1_stride, sb_type,
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h, w);
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break;
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case DIFFWTD_45_INV:
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diffwtd_mask(mask, 1, 47, src0, src0_stride, src1, src1_stride, sb_type,
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h, w);
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break;
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default: assert(0);
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}
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}
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#if CONFIG_AOM_HIGHBITDEPTH
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static void diffwtd_mask_highbd(uint8_t *mask, int which_inverse, int mask_base,
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const uint16_t *src0, int src0_stride,
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const uint16_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w, int bd) {
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int i, j, m, diff;
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int block_stride = block_size_wide[sb_type];
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for (i = 0; i < h; ++i) {
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for (j = 0; j < w; ++j) {
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diff = abs((int)src0[i * src0_stride + j] -
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(int)src1[i * src1_stride + j]) >>
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(bd - 8);
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m = clamp(mask_base + (diff / DIFF_FACTOR), 0, AOM_BLEND_A64_MAX_ALPHA);
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mask[i * block_stride + j] =
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which_inverse ? AOM_BLEND_A64_MAX_ALPHA - m : m;
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}
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}
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}
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void build_compound_seg_mask_highbd(uint8_t *mask, SEG_MASK_TYPE mask_type,
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const uint8_t *src0, int src0_stride,
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const uint8_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w, int bd) {
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switch (mask_type) {
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case DIFFWTD_42:
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diffwtd_mask_highbd(mask, 0, 42, CONVERT_TO_SHORTPTR(src0), src0_stride,
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CONVERT_TO_SHORTPTR(src1), src1_stride, sb_type, h, w,
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bd);
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break;
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case DIFFWTD_42_INV:
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diffwtd_mask_highbd(mask, 1, 42, CONVERT_TO_SHORTPTR(src0), src0_stride,
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CONVERT_TO_SHORTPTR(src1), src1_stride, sb_type, h, w,
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bd);
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break;
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default: assert(0);
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}
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}
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#endif // CONFIG_AOM_HIGHBITDEPTH
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#endif // COMPOUND_SEGMENT_TYPE
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#endif // CONFIG_COMPOUND_SEGMENT
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static void init_wedge_master_masks() {
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@ -470,16 +563,18 @@ static void build_masked_compound(
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}
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#if CONFIG_AOM_HIGHBITDEPTH
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static void build_masked_compound_wedge_highbd(
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static void build_masked_compound_highbd(
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uint8_t *dst_8, int dst_stride, const uint8_t *src0_8, int src0_stride,
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const uint8_t *src1_8, int src1_stride, int wedge_index, int wedge_sign,
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BLOCK_SIZE sb_type, int h, int w, int bd) {
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const uint8_t *src1_8, int src1_stride,
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const INTERINTER_COMPOUND_DATA *const comp_data, BLOCK_SIZE sb_type, int h,
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int w, int bd) {
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// Derive subsampling from h and w passed in. May be refactored to
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// pass in subsampling factors directly.
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const int subh = (2 << b_height_log2_lookup[sb_type]) == h;
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const int subw = (2 << b_width_log2_lookup[sb_type]) == w;
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const uint8_t *mask =
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av1_get_contiguous_soft_mask(wedge_index, wedge_sign, sb_type);
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const uint8_t *mask = av1_get_compound_type_mask(comp_data, sb_type);
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// const uint8_t *mask =
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// av1_get_contiguous_soft_mask(wedge_index, wedge_sign, sb_type);
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aom_highbd_blend_a64_mask(dst_8, dst_stride, src0_8, src0_stride, src1_8,
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src1_stride, mask, block_size_wide[sb_type], h, w,
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subh, subw, bd);
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@ -534,10 +629,21 @@ void av1_make_masked_inter_predictor(const uint8_t *pre, int pre_stride,
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comp_data->wedge_index, comp_data->wedge_sign, mi->mbmi.sb_type,
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wedge_offset_x, wedge_offset_y, h, w);
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#else
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#if CONFIG_COMPOUND_SEGMENT
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if (!plane && comp_data->type == COMPOUND_SEG) {
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH)
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build_masked_compound_wedge_highbd(
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dst, dst_stride, dst, dst_stride, tmp_dst, MAX_SB_SIZE,
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comp_data->wedge_index, comp_data->wedge_sign, mi->mbmi.sb_type, h, w,
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build_compound_seg_mask_highbd(comp_data->seg_mask, comp_data->mask_type,
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dst, dst_stride, tmp_dst, MAX_SB_SIZE,
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mi->mbmi.sb_type, h, w, xd->bd);
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else
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build_compound_seg_mask(comp_data->seg_mask, comp_data->mask_type, dst,
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dst_stride, tmp_dst, MAX_SB_SIZE,
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mi->mbmi.sb_type, h, w);
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}
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#endif // CONFIG_COMPOUND_SEGMENT
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH)
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build_masked_compound_highbd(dst, dst_stride, dst, dst_stride, tmp_dst,
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MAX_SB_SIZE, comp_data, mi->mbmi.sb_type, h, w,
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xd->bd);
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else
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build_masked_compound(dst, dst_stride, dst, dst_stride, tmp_dst,
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@ -2707,17 +2813,32 @@ static void build_wedge_inter_predictor_from_buf(
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if (is_compound &&
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is_masked_compound_type(mbmi->interinter_compound_data.type)) {
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#if CONFIG_COMPOUND_SEGMENT
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#if CONFIG_AOM_HIGHBITDEPTH
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if (!plane && comp_data->type == COMPOUND_SEG) {
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH)
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build_compound_seg_mask_highbd(
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comp_data->seg_mask, comp_data->mask_type,
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CONVERT_TO_BYTEPTR(ext_dst0), ext_dst_stride0,
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CONVERT_TO_BYTEPTR(ext_dst1), ext_dst_stride1, mbmi->sb_type, h, w,
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xd->bd);
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else
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build_compound_seg_mask(comp_data->seg_mask, comp_data->mask_type,
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ext_dst0, ext_dst_stride0, ext_dst1,
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ext_dst_stride1, mbmi->sb_type, h, w);
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}
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#else
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if (!plane && comp_data->type == COMPOUND_SEG)
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build_compound_seg_mask(comp_data->seg_mask, comp_data->mask_type,
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ext_dst0, ext_dst_stride0, ext_dst1,
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ext_dst_stride1, mbmi->sb_type, h, w);
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#endif // CONFIG_AOM_HIGHBITDEPTH
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#endif // CONFIG_COMPOUND_SEGMENT
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#if CONFIG_AOM_HIGHBITDEPTH
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if (xd->cur_buf->flags & YV12_FLAG_HIGHBITDEPTH)
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build_masked_compound_wedge_highbd(
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build_masked_compound_highbd(
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dst, dst_buf->stride, CONVERT_TO_BYTEPTR(ext_dst0), ext_dst_stride0,
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CONVERT_TO_BYTEPTR(ext_dst1), ext_dst_stride1, comp_data->wedge_index,
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comp_data->wedge_sign, mbmi->sb_type, h, w, xd->bd);
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CONVERT_TO_BYTEPTR(ext_dst1), ext_dst_stride1, comp_data,
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mbmi->sb_type, h, w, xd->bd);
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else
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#endif // CONFIG_AOM_HIGHBITDEPTH
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build_masked_compound(dst, dst_buf->stride, ext_dst0, ext_dst_stride0,
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@ -196,6 +196,12 @@ void build_compound_seg_mask(uint8_t *mask, SEG_MASK_TYPE mask_type,
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const uint8_t *src0, int src0_stride,
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const uint8_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w);
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#if CONFIG_AOM_HIGHBITDEPTH
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void build_compound_seg_mask_highbd(uint8_t *mask, SEG_MASK_TYPE mask_type,
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const uint8_t *src0, int src0_stride,
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const uint8_t *src1, int src1_stride,
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BLOCK_SIZE sb_type, int h, int w, int bd);
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#endif // CONFIG_AOM_HIGHBITDEPTH
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#endif // CONFIG_COMPOUND_SEGMENT
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#endif // CONFIG_EXT_INTER
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@ -6853,8 +6853,15 @@ static int64_t pick_interinter_seg_mask(const AV1_COMP *const cpi,
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// try each mask type and its inverse
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for (cur_mask_type = 0; cur_mask_type < SEG_MASK_TYPES; cur_mask_type++) {
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// build mask and inverse
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build_compound_seg_mask(comp_data->seg_mask, cur_mask_type, p0, bw, p1, bw,
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bsize, bh, bw);
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#if CONFIG_AOM_HIGHBITDEPTH
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if (hbd)
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build_compound_seg_mask_highbd(
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comp_data->seg_mask, cur_mask_type, CONVERT_TO_BYTEPTR(p0), bw,
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CONVERT_TO_BYTEPTR(p1), bw, bsize, bh, bw, xd->bd);
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else
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#endif // CONFIG_AOM_HIGHBITDEPTH
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build_compound_seg_mask(comp_data->seg_mask, cur_mask_type, p0, bw, p1,
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bw, bsize, bh, bw);
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// compute rd for mask
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sse = av1_wedge_sse_from_residuals(r1, d10, comp_data->seg_mask, N);
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@ -6871,8 +6878,15 @@ static int64_t pick_interinter_seg_mask(const AV1_COMP *const cpi,
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// make final mask
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comp_data->mask_type = best_mask_type;
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build_compound_seg_mask(comp_data->seg_mask, comp_data->mask_type, p0, bw, p1,
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bw, bsize, bh, bw);
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#if CONFIG_AOM_HIGHBITDEPTH
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if (hbd)
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build_compound_seg_mask_highbd(
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comp_data->seg_mask, comp_data->mask_type, CONVERT_TO_BYTEPTR(p0), bw,
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CONVERT_TO_BYTEPTR(p1), bw, bsize, bh, bw, xd->bd);
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else
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#endif // CONFIG_AOM_HIGHBITDEPTH
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build_compound_seg_mask(comp_data->seg_mask, comp_data->mask_type, p0, bw,
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p1, bw, bsize, bh, bw);
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return best_rd;
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}
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