Merge "HBD hybrid transform 4x4 SSE4.1 optimization" into nextgenv2
This commit is contained in:
Yi Luo
Gerrit Code Review
Коммит
333ff883e1
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@ -25,9 +25,9 @@ using libvpx_test::ACMRandom;
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namespace {
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typedef void (*IhtFunc)(const tran_low_t *in, uint8_t *out, int stride,
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int tx_type);
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using std::tr1::tuple;
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using libvpx_test::FhtFunc;
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typedef std::tr1::tuple<FhtFunc, IhtFunc, int, vpx_bit_depth_t, int> Ht4x4Param;
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typedef tuple<FhtFunc, IhtFunc, int, vpx_bit_depth_t, int> Ht4x4Param;
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void fht4x4_ref(const int16_t *in, tran_low_t *out, int stride,
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int tx_type) {
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@ -37,13 +37,14 @@ void fht4x4_ref(const int16_t *in, tran_low_t *out, int stride,
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#if CONFIG_VP9_HIGHBITDEPTH
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typedef void (*IhighbdHtFunc)(const tran_low_t *in, uint8_t *out, int stride,
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int tx_type, int bd);
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typedef void (*HBDFhtFunc)(const int16_t *input, int32_t *output, int stride,
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int tx_type, int bd);
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// Target optimized function, tx_type, bit depth
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typedef tuple<HBDFhtFunc, int, int> HighbdHt4x4Param;
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typedef std::tr1::tuple<FhtFunc, IhighbdHtFunc, int, vpx_bit_depth_t, int>
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HighbdHt4x4Param;
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void highbe_fht4x4_ref(const int16_t *in, tran_low_t *out, int stride,
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int tx_type) {
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vp10_highbd_fht4x4_c(in, out, stride, tx_type);
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void highbe_fht4x4_ref(const int16_t *in, int32_t *out, int stride,
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int tx_type, int bd) {
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vp10_fwd_txfm2d_4x4_c(in, out, stride, tx_type, bd);
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}
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#endif // CONFIG_VP9_HIGHBITDEPTH
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@ -83,98 +84,76 @@ TEST_P(VP10Trans4x4HT, CoeffCheck) {
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}
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#if CONFIG_VP9_HIGHBITDEPTH
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class VP10HighbdTrans4x4HT
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: public libvpx_test::TransformTestBase,
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public ::testing::TestWithParam<HighbdHt4x4Param> {
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class VP10HighbdTrans4x4HT : public ::testing::TestWithParam<HighbdHt4x4Param> {
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public:
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virtual ~VP10HighbdTrans4x4HT() {}
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virtual void SetUp() {
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fwd_txfm_ = GET_PARAM(0);
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inv_txfm_ = GET_PARAM(1);
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tx_type_ = GET_PARAM(2);
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pitch_ = 4;
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fwd_txfm_ref = highbe_fht4x4_ref;
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bit_depth_ = GET_PARAM(3);
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fwd_txfm_ref_ = highbe_fht4x4_ref;
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tx_type_ = GET_PARAM(1);
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bit_depth_ = GET_PARAM(2);
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mask_ = (1 << bit_depth_) - 1;
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num_coeffs_ = GET_PARAM(4);
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num_coeffs_ = 16;
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input_ = reinterpret_cast<int16_t *>
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(vpx_memalign(16, sizeof(int16_t) * num_coeffs_));
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output_ = reinterpret_cast<int32_t *>
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(vpx_memalign(16, sizeof(int32_t) * num_coeffs_));
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output_ref_ = reinterpret_cast<int32_t *>
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(vpx_memalign(16, sizeof(int32_t) * num_coeffs_));
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}
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virtual void TearDown() {
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vpx_free(input_);
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vpx_free(output_);
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vpx_free(output_ref_);
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libvpx_test::ClearSystemState();
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}
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virtual void TearDown() { libvpx_test::ClearSystemState(); }
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protected:
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void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
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fwd_txfm_(in, out, stride, tx_type_);
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}
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void RunBitexactCheck();
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void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
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inv_txfm_(out, dst, stride, tx_type_, bit_depth_);
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}
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FhtFunc fwd_txfm_;
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IhighbdHtFunc inv_txfm_;
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private:
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HBDFhtFunc fwd_txfm_;
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HBDFhtFunc fwd_txfm_ref_;
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int tx_type_;
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int bit_depth_;
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int mask_;
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int num_coeffs_;
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int16_t *input_;
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int32_t *output_;
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int32_t *output_ref_;
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};
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void VP10HighbdTrans4x4HT::RunBitexactCheck() {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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int i, j;
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const int stride = 4;
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const int num_tests = 200000;
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const int num_coeffs = 16;
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for (i = 0; i < num_tests; ++i) {
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for (j = 0; j < num_coeffs; ++j) {
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input_[j] = (rnd.Rand16() & mask_) - (rnd.Rand16() & mask_);
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}
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fwd_txfm_ref_(input_, output_ref_, stride, tx_type_, bit_depth_);
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fwd_txfm_(input_, output_, stride, tx_type_, bit_depth_);
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for (j = 0; j < num_coeffs; ++j) {
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EXPECT_EQ(output_[j], output_ref_[j])
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<< "Not bit-exact result at index: " << j
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<< " at test block: " << i;
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}
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}
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}
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TEST_P(VP10HighbdTrans4x4HT, HighbdCoeffCheck) {
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RunCoeffCheck();
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RunBitexactCheck();
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}
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#endif // CONFIG_VP9_HIGHBITDEPTH
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#define SPEED_TEST (0)
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#if SPEED_TEST
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#if CONFIG_EXT_TX
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TEST(VP10Trans4x4HTSpeedTest, C_version) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 200000;
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int bit_depth = 8;
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int mask = (1 << bit_depth) - 1;
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const int num_coeffs = 16;
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int16_t *input = new int16_t[num_coeffs];
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tran_low_t *output = new tran_low_t[num_coeffs];
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const int stride = 4;
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int tx_type;
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for (int j = 0; j < num_coeffs; ++j) {
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input[j] = (rnd.Rand8() & mask) - (rnd.Rand8() & mask);
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}
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for (int i = 0; i < count_test_block; ++i) {
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for (tx_type = V_DCT; tx_type <= H_FLIPADST; ++tx_type) {
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vp10_fht4x4_c(input, output, stride, tx_type);
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}
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}
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delete[] input;
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delete[] output;
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}
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#endif // CONFIG_EXT_TX
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#if HAVE_SSE2 && CONFIG_EXT_TX
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TEST(VP10Trans4x4HTSpeedTest, SSE2_version) {
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ACMRandom rnd(ACMRandom::DeterministicSeed());
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const int count_test_block = 200000;
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int bit_depth = 8;
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int mask = (1 << bit_depth) - 1;
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const int num_coeffs = 16;
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int16_t *input = new int16_t[num_coeffs];
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tran_low_t *output = reinterpret_cast<tran_low_t *>(
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vpx_memalign(16, num_coeffs * sizeof(tran_low_t)));
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const int stride = 4;
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int tx_type;
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for (int j = 0; j < num_coeffs; ++j) {
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input[j] = (rnd.Rand8() & mask) - (rnd.Rand8() & mask);
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}
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for (int i = 0; i < count_test_block; ++i) {
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for (tx_type = V_DCT; tx_type <= H_FLIPADST; ++tx_type) {
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vp10_fht4x4_sse2(input, output, stride, tx_type);
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}
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}
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delete[] input;
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vpx_free(output);
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}
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#endif // HAVE_SSE2 && CONFIG_EXT_TX
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#endif // SPEED_TEST
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using std::tr1::make_tuple;
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#if HAVE_SSE2
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@ -229,83 +208,23 @@ INSTANTIATE_TEST_CASE_P(
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SSE4_1, VP10HighbdTrans4x4HT,
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::testing::Values(
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#if !CONFIG_EXT_TX
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// make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
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// VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 3,
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VPX_BITS_10, 16),
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// make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
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// VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 3,
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VPX_BITS_12, 16)));
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 0, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 0, 12),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 1, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 1, 12),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 2, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 2, 12),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 3, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 3, 12)));
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#else
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// make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
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// VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 3,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 4,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 5,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 6,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 7,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 8,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 10,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 11,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 12,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 13,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 14,
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VPX_BITS_10, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 15,
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VPX_BITS_10, 16),
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// make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 0,
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// VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 1,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 2,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 3,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 4,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 5,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 6,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 7,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 8,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 10,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 11,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 12,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 13,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 14,
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VPX_BITS_12, 16),
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make_tuple(&vp10_highbd_fht4x4_sse4_1, &vp10_highbd_iht4x4_16_add_c, 15,
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VPX_BITS_12, 16)));
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 0, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 0, 12),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 1, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 1, 12),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 2, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 2, 12),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 3, 10),
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make_tuple(&vp10_fwd_txfm2d_4x4_sse4_1, 3, 12)));
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#endif // !CONFIG_EXT_TX
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#endif // HAVE_SSE4_1 && CONFIG_VP9_HIGHBITDEPTH
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015 The WebM project authors. All Rights Reserved.
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* Copyright (c) 2016 The WebM project authors. All Rights Reserved.
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*
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* Use of this source code is governed by a BSD-style license
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* that can be found in the LICENSE file in the root of the source
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@ -87,15 +87,6 @@ static inline void fwd_txfm2d_sse4_1(const int16_t *input, int32_t *output,
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transpose_32(txfm_size, buf_128, out_128);
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}
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void vp10_fwd_txfm2d_4x4_sse4_1(const int16_t *input, int32_t *output,
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const int stride, int tx_type,
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const int bd) {
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int32_t txfm_buf[16];
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const TXFM_2D_CFG* cfg = vp10_get_txfm_4x4_cfg(tx_type);
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(void)bd;
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fwd_txfm2d_sse4_1(input, output, stride, cfg, txfm_buf);
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}
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void vp10_fwd_txfm2d_8x8_sse4_1(const int16_t *input, int32_t *output,
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const int stride, int tx_type,
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const int bd) {
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@ -111,52 +111,136 @@ static void fdct4x4_sse4_1(__m128i *in, int bit) {
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in[3] = _mm_unpackhi_epi64(v1, v3);
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}
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static INLINE void write_buffer_4x4(tran_low_t *output, __m128i *res) {
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static INLINE void write_buffer_4x4(__m128i *res, tran_low_t *output) {
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_mm_store_si128((__m128i *)(output + 0 * 4), res[0]);
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_mm_store_si128((__m128i *)(output + 1 * 4), res[1]);
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_mm_store_si128((__m128i *)(output + 2 * 4), res[2]);
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_mm_store_si128((__m128i *)(output + 3 * 4), res[3]);
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}
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// Note:
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// We implement vp10_fwd_txfm2d_4x4(). This function is kept here since
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// vp10_highbd_fht4x4_c() is not removed yet
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void vp10_highbd_fht4x4_sse4_1(const int16_t *input, tran_low_t *output,
|
||||
int stride, int tx_type) {
|
||||
(void)input;
|
||||
(void)output;
|
||||
(void)stride;
|
||||
(void)tx_type;
|
||||
assert(0);
|
||||
}
|
||||
|
||||
static void fadst4x4_sse4_1(__m128i *in, int bit) {
|
||||
const int32_t *cospi = cospi_arr[bit - cos_bit_min];
|
||||
const __m128i cospi8 = _mm_set1_epi32(cospi[8]);
|
||||
const __m128i cospi56 = _mm_set1_epi32(cospi[56]);
|
||||
const __m128i cospi40 = _mm_set1_epi32(cospi[40]);
|
||||
const __m128i cospi24 = _mm_set1_epi32(cospi[24]);
|
||||
const __m128i cospi32 = _mm_set1_epi32(cospi[32]);
|
||||
const __m128i rnding = _mm_set1_epi32(1 << (bit - 1));
|
||||
const __m128i kZero = _mm_setzero_si128();
|
||||
__m128i s0, s1, s2, s3;
|
||||
__m128i u0, u1, u2, u3;
|
||||
__m128i v0, v1, v2, v3;
|
||||
|
||||
// stage 0
|
||||
// stage 1
|
||||
// stage 2
|
||||
u0 = _mm_mullo_epi32(in[3], cospi8);
|
||||
u1 = _mm_mullo_epi32(in[0], cospi56);
|
||||
u2 = _mm_add_epi32(u0, u1);
|
||||
s0 = _mm_add_epi32(u2, rnding);
|
||||
s0 = _mm_srai_epi32(s0, bit);
|
||||
|
||||
v0 = _mm_mullo_epi32(in[3], cospi56);
|
||||
v1 = _mm_mullo_epi32(in[0], cospi8);
|
||||
v2 = _mm_sub_epi32(v0, v1);
|
||||
s1 = _mm_add_epi32(v2, rnding);
|
||||
s1 = _mm_srai_epi32(s1, bit);
|
||||
|
||||
u0 = _mm_mullo_epi32(in[1], cospi40);
|
||||
u1 = _mm_mullo_epi32(in[2], cospi24);
|
||||
u2 = _mm_add_epi32(u0, u1);
|
||||
s2 = _mm_add_epi32(u2, rnding);
|
||||
s2 = _mm_srai_epi32(s2, bit);
|
||||
|
||||
v0 = _mm_mullo_epi32(in[1], cospi24);
|
||||
v1 = _mm_mullo_epi32(in[2], cospi40);
|
||||
v2 = _mm_sub_epi32(v0, v1);
|
||||
s3 = _mm_add_epi32(v2, rnding);
|
||||
s3 = _mm_srai_epi32(s3, bit);
|
||||
|
||||
// stage 3
|
||||
u0 = _mm_add_epi32(s0, s2);
|
||||
u2 = _mm_sub_epi32(s0, s2);
|
||||
u1 = _mm_add_epi32(s1, s3);
|
||||
u3 = _mm_sub_epi32(s1, s3);
|
||||
|
||||
// stage 4
|
||||
v0 = _mm_mullo_epi32(u2, cospi32);
|
||||
v1 = _mm_mullo_epi32(u3, cospi32);
|
||||
v2 = _mm_add_epi32(v0, v1);
|
||||
s2 = _mm_add_epi32(v2, rnding);
|
||||
u2 = _mm_srai_epi32(s2, bit);
|
||||
|
||||
v2 = _mm_sub_epi32(v0, v1);
|
||||
s3 = _mm_add_epi32(v2, rnding);
|
||||
u3 = _mm_srai_epi32(s3, bit);
|
||||
|
||||
// u0, u1, u2, u3
|
||||
u2 = _mm_sub_epi32(kZero, u2);
|
||||
u1 = _mm_sub_epi32(kZero, u1);
|
||||
|
||||
// u0, u2, u3, u1
|
||||
// Transpose 4x4 32-bit
|
||||
v0 = _mm_unpacklo_epi32(u0, u2);
|
||||
v1 = _mm_unpackhi_epi32(u0, u2);
|
||||
v2 = _mm_unpacklo_epi32(u3, u1);
|
||||
v3 = _mm_unpackhi_epi32(u3, u1);
|
||||
|
||||
in[0] = _mm_unpacklo_epi64(v0, v2);
|
||||
in[1] = _mm_unpackhi_epi64(v0, v2);
|
||||
in[2] = _mm_unpacklo_epi64(v1, v3);
|
||||
in[3] = _mm_unpackhi_epi64(v1, v3);
|
||||
}
|
||||
|
||||
void vp10_fwd_txfm2d_4x4_sse4_1(const int16_t *input, tran_low_t *coeff,
|
||||
int input_stride, int tx_type,
|
||||
const int bd) {
|
||||
__m128i in[4];
|
||||
const TXFM_2D_CFG *cfg;
|
||||
int bit;
|
||||
const TXFM_2D_CFG *cfg = NULL;
|
||||
|
||||
switch (tx_type) {
|
||||
case DCT_DCT:
|
||||
cfg = &fwd_txfm_2d_cfg_dct_dct_4;
|
||||
load_buffer_4x4(input, in, stride, 0, 0, cfg->shift[0]);
|
||||
bit = cfg->cos_bit_col[2];
|
||||
fdct4x4_sse4_1(in, bit);
|
||||
bit = cfg->cos_bit_row[2];
|
||||
fdct4x4_sse4_1(in, bit);
|
||||
write_buffer_4x4(output, in);
|
||||
load_buffer_4x4(input, in, input_stride, 0, 0, cfg->shift[0]);
|
||||
fdct4x4_sse4_1(in, cfg->cos_bit_col[2]);
|
||||
fdct4x4_sse4_1(in, cfg->cos_bit_row[2]);
|
||||
write_buffer_4x4(in, coeff);
|
||||
break;
|
||||
case ADST_DCT:
|
||||
cfg = &fwd_txfm_2d_cfg_adst_dct_4;
|
||||
load_buffer_4x4(input, in, input_stride, 0, 0, cfg->shift[0]);
|
||||
fadst4x4_sse4_1(in, cfg->cos_bit_col[2]);
|
||||
fdct4x4_sse4_1(in, cfg->cos_bit_row[2]);
|
||||
write_buffer_4x4(in, coeff);
|
||||
break;
|
||||
case DCT_ADST:
|
||||
cfg = &fwd_txfm_2d_cfg_dct_adst_4;
|
||||
load_buffer_4x4(input, in, input_stride, 0, 0, cfg->shift[0]);
|
||||
fdct4x4_sse4_1(in, cfg->cos_bit_col[2]);
|
||||
fadst4x4_sse4_1(in, cfg->cos_bit_row[2]);
|
||||
write_buffer_4x4(in, coeff);
|
||||
break;
|
||||
case ADST_ADST:
|
||||
vp10_highbd_fht4x4_c(input, output, stride, tx_type);
|
||||
cfg = &fwd_txfm_2d_cfg_adst_adst_4;
|
||||
load_buffer_4x4(input, in, input_stride, 0, 0, cfg->shift[0]);
|
||||
fadst4x4_sse4_1(in, cfg->cos_bit_col[2]);
|
||||
fadst4x4_sse4_1(in, cfg->cos_bit_row[2]);
|
||||
write_buffer_4x4(in, coeff);
|
||||
break;
|
||||
#if CONFIG_EXT_TX
|
||||
case FLIPADST_DCT:
|
||||
case DCT_FLIPADST:
|
||||
case FLIPADST_FLIPADST:
|
||||
case ADST_FLIPADST:
|
||||
case FLIPADST_ADST:
|
||||
vp10_highbd_fht4x4_c(input, output, stride, tx_type);
|
||||
break;
|
||||
case V_DCT:
|
||||
case H_DCT:
|
||||
case V_ADST:
|
||||
case H_ADST:
|
||||
case V_FLIPADST:
|
||||
case H_FLIPADST:
|
||||
vp10_highbd_fht4x4_c(input, output, stride, tx_type);
|
||||
break;
|
||||
#endif // CONFIG_EXT_TX
|
||||
default:
|
||||
assert(0);
|
||||
}
|
||||
(void)bd;
|
||||
}
|
||||
|
|
|
|||
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