High bit depth 32x32 inverse DCT_DCT transform, AVX2
- Witness the follow user-level speedup on AV1 baseline: Encoding time reduction: 4.26% Decoding time reduction: 25.35% Change-Id: Ideaf3cd473ad45ed9256c80d5a5daed0a6e098cf
This commit is contained in:
Yi Luo
Родитель
b2d26453dc
Коммит
3bd8377533
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@ -144,6 +144,8 @@ AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/av1_fwd_txfm2d_sse4.c
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endif
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ifeq ($(CONFIG_AOM_HIGHBITDEPTH),yes)
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AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/highbd_txfm_utility_sse4.h
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AV1_COMMON_SRCS-$(HAVE_SSE4_1) += common/x86/highbd_inv_txfm_sse4.c
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AV1_COMMON_SRCS-$(HAVE_AVX2) += common/x86/highbd_inv_txfm_avx2.c
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endif
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ifneq ($(CONFIG_AOM_HIGHBITDEPTH),yes)
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@ -140,7 +140,6 @@ AV1_CX_SRCS-$(HAVE_SSSE3) += encoder/x86/dct_ssse3.c
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AV1_CX_SRCS-$(HAVE_AVX2) += encoder/x86/hybrid_fwd_txfm_avx2.c
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ifeq ($(CONFIG_AOM_HIGHBITDEPTH),yes)
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AV1_CX_SRCS-$(HAVE_SSE4_1) += encoder/x86/highbd_fwd_txfm_sse4.c
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AV1_CX_SRCS-$(HAVE_SSE4_1) += common/x86/highbd_inv_txfm_sse4.c
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AV1_CX_SRCS-$(HAVE_SSE4_1) += encoder/x86/av1_highbd_quantize_sse4.c
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endif
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@ -565,7 +565,7 @@ if (aom_config("CONFIG_AOM_HIGHBITDEPTH") eq "yes") {
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add_proto qw/void av1_inv_txfm2d_add_16x16/, "const int32_t *input, uint16_t *output, int stride, int tx_type, int bd";
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specialize qw/av1_inv_txfm2d_add_16x16 sse4_1/;
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add_proto qw/void av1_inv_txfm2d_add_32x32/, "const int32_t *input, uint16_t *output, int stride, int tx_type, int bd";
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specialize qw/av1_inv_txfm2d_add_32x32/;
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specialize qw/av1_inv_txfm2d_add_32x32 avx2/;
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add_proto qw/void av1_inv_txfm2d_add_64x64/, "const int32_t *input, uint16_t *output, int stride, int tx_type, int bd";
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specialize qw/av1_inv_txfm2d_add_64x64/;
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}
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@ -0,0 +1,557 @@
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/*
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* Copyright (c) 2016, Alliance for Open Media. All rights reserved
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*
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* This source code is subject to the terms of the BSD 2 Clause License and
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* the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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* was not distributed with this source code in the LICENSE file, you can
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* obtain it at www.aomedia.org/license/software. If the Alliance for Open
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* Media Patent License 1.0 was not distributed with this source code in the
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* PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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*/
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#include <assert.h>
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#include <immintrin.h>
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#include "./av1_rtcd.h"
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#include "./aom_config.h"
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#include "av1/common/av1_inv_txfm2d_cfg.h"
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// Note:
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// Total 32x4 registers to represent 32x32 block coefficients.
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// For high bit depth, each coefficient is 4-byte.
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// Each __m256i register holds 8 coefficients.
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// So each "row" we needs 4 register. Totally 32 rows
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// Register layout:
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// v0, v1, v2, v3,
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// v4, v5, v6, v7,
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// ... ...
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// v124, v125, v126, v127
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static void transpose_32x32_8x8(const __m256i *in, __m256i *out) {
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__m256i u0, u1, u2, u3, u4, u5, u6, u7;
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__m256i x0, x1;
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u0 = _mm256_unpacklo_epi32(in[0], in[4]);
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u1 = _mm256_unpackhi_epi32(in[0], in[4]);
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u2 = _mm256_unpacklo_epi32(in[8], in[12]);
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u3 = _mm256_unpackhi_epi32(in[8], in[12]);
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u4 = _mm256_unpacklo_epi32(in[16], in[20]);
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u5 = _mm256_unpackhi_epi32(in[16], in[20]);
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u6 = _mm256_unpacklo_epi32(in[24], in[28]);
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u7 = _mm256_unpackhi_epi32(in[24], in[28]);
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x0 = _mm256_unpacklo_epi64(u0, u2);
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x1 = _mm256_unpacklo_epi64(u4, u6);
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out[0] = _mm256_permute2f128_si256(x0, x1, 0x20);
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out[16] = _mm256_permute2f128_si256(x0, x1, 0x31);
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x0 = _mm256_unpackhi_epi64(u0, u2);
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x1 = _mm256_unpackhi_epi64(u4, u6);
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out[4] = _mm256_permute2f128_si256(x0, x1, 0x20);
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out[20] = _mm256_permute2f128_si256(x0, x1, 0x31);
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x0 = _mm256_unpacklo_epi64(u1, u3);
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x1 = _mm256_unpacklo_epi64(u5, u7);
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out[8] = _mm256_permute2f128_si256(x0, x1, 0x20);
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out[24] = _mm256_permute2f128_si256(x0, x1, 0x31);
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x0 = _mm256_unpackhi_epi64(u1, u3);
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x1 = _mm256_unpackhi_epi64(u5, u7);
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out[12] = _mm256_permute2f128_si256(x0, x1, 0x20);
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out[28] = _mm256_permute2f128_si256(x0, x1, 0x31);
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}
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static void transpose_32x32_16x16(const __m256i *in, __m256i *out) {
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transpose_32x32_8x8(&in[0], &out[0]);
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transpose_32x32_8x8(&in[1], &out[32]);
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transpose_32x32_8x8(&in[32], &out[1]);
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transpose_32x32_8x8(&in[33], &out[33]);
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}
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static void transpose_32x32(const __m256i *in, __m256i *out) {
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transpose_32x32_16x16(&in[0], &out[0]);
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transpose_32x32_16x16(&in[2], &out[64]);
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transpose_32x32_16x16(&in[64], &out[2]);
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transpose_32x32_16x16(&in[66], &out[66]);
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}
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static void load_buffer_32x32(const int32_t *coeff, __m256i *in) {
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int i;
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for (i = 0; i < 128; ++i) {
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in[i] = _mm256_loadu_si256((const __m256i *)coeff);
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coeff += 8;
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}
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}
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static void round_shift_32x32(__m256i *in, int shift) {
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__m256i rnding = _mm256_set1_epi32(1 << (shift - 1));
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int i = 0;
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while (i < 128) {
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in[i] = _mm256_add_epi32(in[i], rnding);
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in[i] = _mm256_srai_epi32(in[i], shift);
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i++;
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}
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}
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static __m256i highbd_clamp_epi32(__m256i x, int bd) {
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const __m256i zero = _mm256_setzero_si256();
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const __m256i one = _mm256_set1_epi16(1);
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const __m256i max = _mm256_sub_epi16(_mm256_slli_epi16(one, bd), one);
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__m256i clamped, mask;
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mask = _mm256_cmpgt_epi16(x, max);
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clamped = _mm256_andnot_si256(mask, x);
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mask = _mm256_and_si256(mask, max);
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clamped = _mm256_or_si256(mask, clamped);
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mask = _mm256_cmpgt_epi16(clamped, zero);
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clamped = _mm256_and_si256(clamped, mask);
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return clamped;
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}
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static void write_buffer_32x32(__m256i *in, uint16_t *output, int stride,
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int fliplr, int flipud, int shift, int bd) {
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__m256i u0, u1, x0, x1, x2, x3, v0, v1, v2, v3;
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const __m256i zero = _mm256_setzero_si256();
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int i = 0;
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(void)fliplr;
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(void)flipud;
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round_shift_32x32(in, shift);
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while (i < 128) {
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u0 = _mm256_loadu_si256((const __m256i *)output);
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u1 = _mm256_loadu_si256((const __m256i *)(output + 16));
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x0 = _mm256_unpacklo_epi16(u0, zero);
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x1 = _mm256_unpackhi_epi16(u0, zero);
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x2 = _mm256_unpacklo_epi16(u1, zero);
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x3 = _mm256_unpackhi_epi16(u1, zero);
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v0 = _mm256_permute2f128_si256(in[i], in[i + 1], 0x20);
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v1 = _mm256_permute2f128_si256(in[i], in[i + 1], 0x31);
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v2 = _mm256_permute2f128_si256(in[i + 2], in[i + 3], 0x20);
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v3 = _mm256_permute2f128_si256(in[i + 2], in[i + 3], 0x31);
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v0 = _mm256_add_epi32(v0, x0);
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v1 = _mm256_add_epi32(v1, x1);
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v2 = _mm256_add_epi32(v2, x2);
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v3 = _mm256_add_epi32(v3, x3);
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v0 = _mm256_packus_epi32(v0, v1);
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v2 = _mm256_packus_epi32(v2, v3);
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v0 = highbd_clamp_epi32(v0, bd);
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v2 = highbd_clamp_epi32(v2, bd);
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_mm256_storeu_si256((__m256i *)output, v0);
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_mm256_storeu_si256((__m256i *)(output + 16), v2);
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output += stride;
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i += 4;
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}
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}
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static INLINE __m256i half_btf_avx2(__m256i w0, __m256i n0, __m256i w1,
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__m256i n1, __m256i rounding, int bit) {
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__m256i x, y;
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x = _mm256_mullo_epi32(w0, n0);
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y = _mm256_mullo_epi32(w1, n1);
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x = _mm256_add_epi32(x, y);
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x = _mm256_add_epi32(x, rounding);
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x = _mm256_srai_epi32(x, bit);
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return x;
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}
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static void idct32_avx2(__m256i *in, __m256i *out, int bit) {
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const int32_t *cospi = cospi_arr[bit - cos_bit_min];
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const __m256i cospi62 = _mm256_set1_epi32(cospi[62]);
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const __m256i cospi30 = _mm256_set1_epi32(cospi[30]);
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const __m256i cospi46 = _mm256_set1_epi32(cospi[46]);
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const __m256i cospi14 = _mm256_set1_epi32(cospi[14]);
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const __m256i cospi54 = _mm256_set1_epi32(cospi[54]);
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const __m256i cospi22 = _mm256_set1_epi32(cospi[22]);
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const __m256i cospi38 = _mm256_set1_epi32(cospi[38]);
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const __m256i cospi6 = _mm256_set1_epi32(cospi[6]);
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const __m256i cospi58 = _mm256_set1_epi32(cospi[58]);
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const __m256i cospi26 = _mm256_set1_epi32(cospi[26]);
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const __m256i cospi42 = _mm256_set1_epi32(cospi[42]);
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const __m256i cospi10 = _mm256_set1_epi32(cospi[10]);
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const __m256i cospi50 = _mm256_set1_epi32(cospi[50]);
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const __m256i cospi18 = _mm256_set1_epi32(cospi[18]);
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const __m256i cospi34 = _mm256_set1_epi32(cospi[34]);
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const __m256i cospi2 = _mm256_set1_epi32(cospi[2]);
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const __m256i cospim58 = _mm256_set1_epi32(-cospi[58]);
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const __m256i cospim26 = _mm256_set1_epi32(-cospi[26]);
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const __m256i cospim42 = _mm256_set1_epi32(-cospi[42]);
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const __m256i cospim10 = _mm256_set1_epi32(-cospi[10]);
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const __m256i cospim50 = _mm256_set1_epi32(-cospi[50]);
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const __m256i cospim18 = _mm256_set1_epi32(-cospi[18]);
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const __m256i cospim34 = _mm256_set1_epi32(-cospi[34]);
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const __m256i cospim2 = _mm256_set1_epi32(-cospi[2]);
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const __m256i cospi60 = _mm256_set1_epi32(cospi[60]);
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const __m256i cospi28 = _mm256_set1_epi32(cospi[28]);
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const __m256i cospi44 = _mm256_set1_epi32(cospi[44]);
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const __m256i cospi12 = _mm256_set1_epi32(cospi[12]);
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const __m256i cospi52 = _mm256_set1_epi32(cospi[52]);
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const __m256i cospi20 = _mm256_set1_epi32(cospi[20]);
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const __m256i cospi36 = _mm256_set1_epi32(cospi[36]);
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const __m256i cospi4 = _mm256_set1_epi32(cospi[4]);
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const __m256i cospim52 = _mm256_set1_epi32(-cospi[52]);
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const __m256i cospim20 = _mm256_set1_epi32(-cospi[20]);
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const __m256i cospim36 = _mm256_set1_epi32(-cospi[36]);
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const __m256i cospim4 = _mm256_set1_epi32(-cospi[4]);
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const __m256i cospi56 = _mm256_set1_epi32(cospi[56]);
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const __m256i cospi24 = _mm256_set1_epi32(cospi[24]);
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const __m256i cospi40 = _mm256_set1_epi32(cospi[40]);
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const __m256i cospi8 = _mm256_set1_epi32(cospi[8]);
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const __m256i cospim40 = _mm256_set1_epi32(-cospi[40]);
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const __m256i cospim8 = _mm256_set1_epi32(-cospi[8]);
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const __m256i cospim56 = _mm256_set1_epi32(-cospi[56]);
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const __m256i cospim24 = _mm256_set1_epi32(-cospi[24]);
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const __m256i cospi32 = _mm256_set1_epi32(cospi[32]);
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const __m256i cospim32 = _mm256_set1_epi32(-cospi[32]);
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const __m256i cospi48 = _mm256_set1_epi32(cospi[48]);
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const __m256i cospim48 = _mm256_set1_epi32(-cospi[48]);
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const __m256i cospi16 = _mm256_set1_epi32(cospi[16]);
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const __m256i cospim16 = _mm256_set1_epi32(-cospi[16]);
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const __m256i rounding = _mm256_set1_epi32(1 << (bit - 1));
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__m256i bf1[32], bf0[32];
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int col;
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for (col = 0; col < 4; ++col) {
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// stage 0
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// stage 1
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bf1[0] = in[0 * 4 + col];
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bf1[1] = in[16 * 4 + col];
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bf1[2] = in[8 * 4 + col];
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bf1[3] = in[24 * 4 + col];
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bf1[4] = in[4 * 4 + col];
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bf1[5] = in[20 * 4 + col];
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bf1[6] = in[12 * 4 + col];
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bf1[7] = in[28 * 4 + col];
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bf1[8] = in[2 * 4 + col];
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bf1[9] = in[18 * 4 + col];
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bf1[10] = in[10 * 4 + col];
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bf1[11] = in[26 * 4 + col];
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bf1[12] = in[6 * 4 + col];
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bf1[13] = in[22 * 4 + col];
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bf1[14] = in[14 * 4 + col];
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bf1[15] = in[30 * 4 + col];
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bf1[16] = in[1 * 4 + col];
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bf1[17] = in[17 * 4 + col];
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bf1[18] = in[9 * 4 + col];
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bf1[19] = in[25 * 4 + col];
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bf1[20] = in[5 * 4 + col];
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bf1[21] = in[21 * 4 + col];
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bf1[22] = in[13 * 4 + col];
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bf1[23] = in[29 * 4 + col];
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bf1[24] = in[3 * 4 + col];
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bf1[25] = in[19 * 4 + col];
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bf1[26] = in[11 * 4 + col];
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bf1[27] = in[27 * 4 + col];
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bf1[28] = in[7 * 4 + col];
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bf1[29] = in[23 * 4 + col];
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bf1[30] = in[15 * 4 + col];
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bf1[31] = in[31 * 4 + col];
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// stage 2
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bf0[0] = bf1[0];
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bf0[1] = bf1[1];
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bf0[2] = bf1[2];
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bf0[3] = bf1[3];
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bf0[4] = bf1[4];
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bf0[5] = bf1[5];
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bf0[6] = bf1[6];
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bf0[7] = bf1[7];
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bf0[8] = bf1[8];
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bf0[9] = bf1[9];
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bf0[10] = bf1[10];
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bf0[11] = bf1[11];
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bf0[12] = bf1[12];
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bf0[13] = bf1[13];
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bf0[14] = bf1[14];
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bf0[15] = bf1[15];
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bf0[16] = half_btf_avx2(cospi62, bf1[16], cospim2, bf1[31], rounding, bit);
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bf0[17] = half_btf_avx2(cospi30, bf1[17], cospim34, bf1[30], rounding, bit);
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bf0[18] = half_btf_avx2(cospi46, bf1[18], cospim18, bf1[29], rounding, bit);
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bf0[19] = half_btf_avx2(cospi14, bf1[19], cospim50, bf1[28], rounding, bit);
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bf0[20] = half_btf_avx2(cospi54, bf1[20], cospim10, bf1[27], rounding, bit);
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bf0[21] = half_btf_avx2(cospi22, bf1[21], cospim42, bf1[26], rounding, bit);
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bf0[22] = half_btf_avx2(cospi38, bf1[22], cospim26, bf1[25], rounding, bit);
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bf0[23] = half_btf_avx2(cospi6, bf1[23], cospim58, bf1[24], rounding, bit);
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bf0[24] = half_btf_avx2(cospi58, bf1[23], cospi6, bf1[24], rounding, bit);
|
||||
bf0[25] = half_btf_avx2(cospi26, bf1[22], cospi38, bf1[25], rounding, bit);
|
||||
bf0[26] = half_btf_avx2(cospi42, bf1[21], cospi22, bf1[26], rounding, bit);
|
||||
bf0[27] = half_btf_avx2(cospi10, bf1[20], cospi54, bf1[27], rounding, bit);
|
||||
bf0[28] = half_btf_avx2(cospi50, bf1[19], cospi14, bf1[28], rounding, bit);
|
||||
bf0[29] = half_btf_avx2(cospi18, bf1[18], cospi46, bf1[29], rounding, bit);
|
||||
bf0[30] = half_btf_avx2(cospi34, bf1[17], cospi30, bf1[30], rounding, bit);
|
||||
bf0[31] = half_btf_avx2(cospi2, bf1[16], cospi62, bf1[31], rounding, bit);
|
||||
|
||||
// stage 3
|
||||
bf1[0] = bf0[0];
|
||||
bf1[1] = bf0[1];
|
||||
bf1[2] = bf0[2];
|
||||
bf1[3] = bf0[3];
|
||||
bf1[4] = bf0[4];
|
||||
bf1[5] = bf0[5];
|
||||
bf1[6] = bf0[6];
|
||||
bf1[7] = bf0[7];
|
||||
bf1[8] = half_btf_avx2(cospi60, bf0[8], cospim4, bf0[15], rounding, bit);
|
||||
bf1[9] = half_btf_avx2(cospi28, bf0[9], cospim36, bf0[14], rounding, bit);
|
||||
bf1[10] = half_btf_avx2(cospi44, bf0[10], cospim20, bf0[13], rounding, bit);
|
||||
bf1[11] = half_btf_avx2(cospi12, bf0[11], cospim52, bf0[12], rounding, bit);
|
||||
bf1[12] = half_btf_avx2(cospi52, bf0[11], cospi12, bf0[12], rounding, bit);
|
||||
bf1[13] = half_btf_avx2(cospi20, bf0[10], cospi44, bf0[13], rounding, bit);
|
||||
bf1[14] = half_btf_avx2(cospi36, bf0[9], cospi28, bf0[14], rounding, bit);
|
||||
bf1[15] = half_btf_avx2(cospi4, bf0[8], cospi60, bf0[15], rounding, bit);
|
||||
bf1[16] = _mm256_add_epi32(bf0[16], bf0[17]);
|
||||
bf1[17] = _mm256_sub_epi32(bf0[16], bf0[17]);
|
||||
bf1[18] = _mm256_sub_epi32(bf0[19], bf0[18]);
|
||||
bf1[19] = _mm256_add_epi32(bf0[18], bf0[19]);
|
||||
bf1[20] = _mm256_add_epi32(bf0[20], bf0[21]);
|
||||
bf1[21] = _mm256_sub_epi32(bf0[20], bf0[21]);
|
||||
bf1[22] = _mm256_sub_epi32(bf0[23], bf0[22]);
|
||||
bf1[23] = _mm256_add_epi32(bf0[22], bf0[23]);
|
||||
bf1[24] = _mm256_add_epi32(bf0[24], bf0[25]);
|
||||
bf1[25] = _mm256_sub_epi32(bf0[24], bf0[25]);
|
||||
bf1[26] = _mm256_sub_epi32(bf0[27], bf0[26]);
|
||||
bf1[27] = _mm256_add_epi32(bf0[26], bf0[27]);
|
||||
bf1[28] = _mm256_add_epi32(bf0[28], bf0[29]);
|
||||
bf1[29] = _mm256_sub_epi32(bf0[28], bf0[29]);
|
||||
bf1[30] = _mm256_sub_epi32(bf0[31], bf0[30]);
|
||||
bf1[31] = _mm256_add_epi32(bf0[30], bf0[31]);
|
||||
|
||||
// stage 4
|
||||
bf0[0] = bf1[0];
|
||||
bf0[1] = bf1[1];
|
||||
bf0[2] = bf1[2];
|
||||
bf0[3] = bf1[3];
|
||||
bf0[4] = half_btf_avx2(cospi56, bf1[4], cospim8, bf1[7], rounding, bit);
|
||||
bf0[5] = half_btf_avx2(cospi24, bf1[5], cospim40, bf1[6], rounding, bit);
|
||||
bf0[6] = half_btf_avx2(cospi40, bf1[5], cospi24, bf1[6], rounding, bit);
|
||||
bf0[7] = half_btf_avx2(cospi8, bf1[4], cospi56, bf1[7], rounding, bit);
|
||||
bf0[8] = _mm256_add_epi32(bf1[8], bf1[9]);
|
||||
bf0[9] = _mm256_sub_epi32(bf1[8], bf1[9]);
|
||||
bf0[10] = _mm256_sub_epi32(bf1[11], bf1[10]);
|
||||
bf0[11] = _mm256_add_epi32(bf1[10], bf1[11]);
|
||||
bf0[12] = _mm256_add_epi32(bf1[12], bf1[13]);
|
||||
bf0[13] = _mm256_sub_epi32(bf1[12], bf1[13]);
|
||||
bf0[14] = _mm256_sub_epi32(bf1[15], bf1[14]);
|
||||
bf0[15] = _mm256_add_epi32(bf1[14], bf1[15]);
|
||||
bf0[16] = bf1[16];
|
||||
bf0[17] = half_btf_avx2(cospim8, bf1[17], cospi56, bf1[30], rounding, bit);
|
||||
bf0[18] = half_btf_avx2(cospim56, bf1[18], cospim8, bf1[29], rounding, bit);
|
||||
bf0[19] = bf1[19];
|
||||
bf0[20] = bf1[20];
|
||||
bf0[21] = half_btf_avx2(cospim40, bf1[21], cospi24, bf1[26], rounding, bit);
|
||||
bf0[22] =
|
||||
half_btf_avx2(cospim24, bf1[22], cospim40, bf1[25], rounding, bit);
|
||||
bf0[23] = bf1[23];
|
||||
bf0[24] = bf1[24];
|
||||
bf0[25] = half_btf_avx2(cospim40, bf1[22], cospi24, bf1[25], rounding, bit);
|
||||
bf0[26] = half_btf_avx2(cospi24, bf1[21], cospi40, bf1[26], rounding, bit);
|
||||
bf0[27] = bf1[27];
|
||||
bf0[28] = bf1[28];
|
||||
bf0[29] = half_btf_avx2(cospim8, bf1[18], cospi56, bf1[29], rounding, bit);
|
||||
bf0[30] = half_btf_avx2(cospi56, bf1[17], cospi8, bf1[30], rounding, bit);
|
||||
bf0[31] = bf1[31];
|
||||
|
||||
// stage 5
|
||||
bf1[0] = half_btf_avx2(cospi32, bf0[0], cospi32, bf0[1], rounding, bit);
|
||||
bf1[1] = half_btf_avx2(cospi32, bf0[0], cospim32, bf0[1], rounding, bit);
|
||||
bf1[2] = half_btf_avx2(cospi48, bf0[2], cospim16, bf0[3], rounding, bit);
|
||||
bf1[3] = half_btf_avx2(cospi16, bf0[2], cospi48, bf0[3], rounding, bit);
|
||||
bf1[4] = _mm256_add_epi32(bf0[4], bf0[5]);
|
||||
bf1[5] = _mm256_sub_epi32(bf0[4], bf0[5]);
|
||||
bf1[6] = _mm256_sub_epi32(bf0[7], bf0[6]);
|
||||
bf1[7] = _mm256_add_epi32(bf0[6], bf0[7]);
|
||||
bf1[8] = bf0[8];
|
||||
bf1[9] = half_btf_avx2(cospim16, bf0[9], cospi48, bf0[14], rounding, bit);
|
||||
bf1[10] =
|
||||
half_btf_avx2(cospim48, bf0[10], cospim16, bf0[13], rounding, bit);
|
||||
bf1[11] = bf0[11];
|
||||
bf1[12] = bf0[12];
|
||||
bf1[13] = half_btf_avx2(cospim16, bf0[10], cospi48, bf0[13], rounding, bit);
|
||||
bf1[14] = half_btf_avx2(cospi48, bf0[9], cospi16, bf0[14], rounding, bit);
|
||||
bf1[15] = bf0[15];
|
||||
bf1[16] = _mm256_add_epi32(bf0[16], bf0[19]);
|
||||
bf1[17] = _mm256_add_epi32(bf0[17], bf0[18]);
|
||||
bf1[18] = _mm256_sub_epi32(bf0[17], bf0[18]);
|
||||
bf1[19] = _mm256_sub_epi32(bf0[16], bf0[19]);
|
||||
bf1[20] = _mm256_sub_epi32(bf0[23], bf0[20]);
|
||||
bf1[21] = _mm256_sub_epi32(bf0[22], bf0[21]);
|
||||
bf1[22] = _mm256_add_epi32(bf0[21], bf0[22]);
|
||||
bf1[23] = _mm256_add_epi32(bf0[20], bf0[23]);
|
||||
bf1[24] = _mm256_add_epi32(bf0[24], bf0[27]);
|
||||
bf1[25] = _mm256_add_epi32(bf0[25], bf0[26]);
|
||||
bf1[26] = _mm256_sub_epi32(bf0[25], bf0[26]);
|
||||
bf1[27] = _mm256_sub_epi32(bf0[24], bf0[27]);
|
||||
bf1[28] = _mm256_sub_epi32(bf0[31], bf0[28]);
|
||||
bf1[29] = _mm256_sub_epi32(bf0[30], bf0[29]);
|
||||
bf1[30] = _mm256_add_epi32(bf0[29], bf0[30]);
|
||||
bf1[31] = _mm256_add_epi32(bf0[28], bf0[31]);
|
||||
|
||||
// stage 6
|
||||
bf0[0] = _mm256_add_epi32(bf1[0], bf1[3]);
|
||||
bf0[1] = _mm256_add_epi32(bf1[1], bf1[2]);
|
||||
bf0[2] = _mm256_sub_epi32(bf1[1], bf1[2]);
|
||||
bf0[3] = _mm256_sub_epi32(bf1[0], bf1[3]);
|
||||
bf0[4] = bf1[4];
|
||||
bf0[5] = half_btf_avx2(cospim32, bf1[5], cospi32, bf1[6], rounding, bit);
|
||||
bf0[6] = half_btf_avx2(cospi32, bf1[5], cospi32, bf1[6], rounding, bit);
|
||||
bf0[7] = bf1[7];
|
||||
bf0[8] = _mm256_add_epi32(bf1[8], bf1[11]);
|
||||
bf0[9] = _mm256_add_epi32(bf1[9], bf1[10]);
|
||||
bf0[10] = _mm256_sub_epi32(bf1[9], bf1[10]);
|
||||
bf0[11] = _mm256_sub_epi32(bf1[8], bf1[11]);
|
||||
bf0[12] = _mm256_sub_epi32(bf1[15], bf1[12]);
|
||||
bf0[13] = _mm256_sub_epi32(bf1[14], bf1[13]);
|
||||
bf0[14] = _mm256_add_epi32(bf1[13], bf1[14]);
|
||||
bf0[15] = _mm256_add_epi32(bf1[12], bf1[15]);
|
||||
bf0[16] = bf1[16];
|
||||
bf0[17] = bf1[17];
|
||||
bf0[18] = half_btf_avx2(cospim16, bf1[18], cospi48, bf1[29], rounding, bit);
|
||||
bf0[19] = half_btf_avx2(cospim16, bf1[19], cospi48, bf1[28], rounding, bit);
|
||||
bf0[20] =
|
||||
half_btf_avx2(cospim48, bf1[20], cospim16, bf1[27], rounding, bit);
|
||||
bf0[21] =
|
||||
half_btf_avx2(cospim48, bf1[21], cospim16, bf1[26], rounding, bit);
|
||||
bf0[22] = bf1[22];
|
||||
bf0[23] = bf1[23];
|
||||
bf0[24] = bf1[24];
|
||||
bf0[25] = bf1[25];
|
||||
bf0[26] = half_btf_avx2(cospim16, bf1[21], cospi48, bf1[26], rounding, bit);
|
||||
bf0[27] = half_btf_avx2(cospim16, bf1[20], cospi48, bf1[27], rounding, bit);
|
||||
bf0[28] = half_btf_avx2(cospi48, bf1[19], cospi16, bf1[28], rounding, bit);
|
||||
bf0[29] = half_btf_avx2(cospi48, bf1[18], cospi16, bf1[29], rounding, bit);
|
||||
bf0[30] = bf1[30];
|
||||
bf0[31] = bf1[31];
|
||||
|
||||
// stage 7
|
||||
bf1[0] = _mm256_add_epi32(bf0[0], bf0[7]);
|
||||
bf1[1] = _mm256_add_epi32(bf0[1], bf0[6]);
|
||||
bf1[2] = _mm256_add_epi32(bf0[2], bf0[5]);
|
||||
bf1[3] = _mm256_add_epi32(bf0[3], bf0[4]);
|
||||
bf1[4] = _mm256_sub_epi32(bf0[3], bf0[4]);
|
||||
bf1[5] = _mm256_sub_epi32(bf0[2], bf0[5]);
|
||||
bf1[6] = _mm256_sub_epi32(bf0[1], bf0[6]);
|
||||
bf1[7] = _mm256_sub_epi32(bf0[0], bf0[7]);
|
||||
bf1[8] = bf0[8];
|
||||
bf1[9] = bf0[9];
|
||||
bf1[10] = half_btf_avx2(cospim32, bf0[10], cospi32, bf0[13], rounding, bit);
|
||||
bf1[11] = half_btf_avx2(cospim32, bf0[11], cospi32, bf0[12], rounding, bit);
|
||||
bf1[12] = half_btf_avx2(cospi32, bf0[11], cospi32, bf0[12], rounding, bit);
|
||||
bf1[13] = half_btf_avx2(cospi32, bf0[10], cospi32, bf0[13], rounding, bit);
|
||||
bf1[14] = bf0[14];
|
||||
bf1[15] = bf0[15];
|
||||
bf1[16] = _mm256_add_epi32(bf0[16], bf0[23]);
|
||||
bf1[17] = _mm256_add_epi32(bf0[17], bf0[22]);
|
||||
bf1[18] = _mm256_add_epi32(bf0[18], bf0[21]);
|
||||
bf1[19] = _mm256_add_epi32(bf0[19], bf0[20]);
|
||||
bf1[20] = _mm256_sub_epi32(bf0[19], bf0[20]);
|
||||
bf1[21] = _mm256_sub_epi32(bf0[18], bf0[21]);
|
||||
bf1[22] = _mm256_sub_epi32(bf0[17], bf0[22]);
|
||||
bf1[23] = _mm256_sub_epi32(bf0[16], bf0[23]);
|
||||
bf1[24] = _mm256_sub_epi32(bf0[31], bf0[24]);
|
||||
bf1[25] = _mm256_sub_epi32(bf0[30], bf0[25]);
|
||||
bf1[26] = _mm256_sub_epi32(bf0[29], bf0[26]);
|
||||
bf1[27] = _mm256_sub_epi32(bf0[28], bf0[27]);
|
||||
bf1[28] = _mm256_add_epi32(bf0[27], bf0[28]);
|
||||
bf1[29] = _mm256_add_epi32(bf0[26], bf0[29]);
|
||||
bf1[30] = _mm256_add_epi32(bf0[25], bf0[30]);
|
||||
bf1[31] = _mm256_add_epi32(bf0[24], bf0[31]);
|
||||
|
||||
// stage 8
|
||||
bf0[0] = _mm256_add_epi32(bf1[0], bf1[15]);
|
||||
bf0[1] = _mm256_add_epi32(bf1[1], bf1[14]);
|
||||
bf0[2] = _mm256_add_epi32(bf1[2], bf1[13]);
|
||||
bf0[3] = _mm256_add_epi32(bf1[3], bf1[12]);
|
||||
bf0[4] = _mm256_add_epi32(bf1[4], bf1[11]);
|
||||
bf0[5] = _mm256_add_epi32(bf1[5], bf1[10]);
|
||||
bf0[6] = _mm256_add_epi32(bf1[6], bf1[9]);
|
||||
bf0[7] = _mm256_add_epi32(bf1[7], bf1[8]);
|
||||
bf0[8] = _mm256_sub_epi32(bf1[7], bf1[8]);
|
||||
bf0[9] = _mm256_sub_epi32(bf1[6], bf1[9]);
|
||||
bf0[10] = _mm256_sub_epi32(bf1[5], bf1[10]);
|
||||
bf0[11] = _mm256_sub_epi32(bf1[4], bf1[11]);
|
||||
bf0[12] = _mm256_sub_epi32(bf1[3], bf1[12]);
|
||||
bf0[13] = _mm256_sub_epi32(bf1[2], bf1[13]);
|
||||
bf0[14] = _mm256_sub_epi32(bf1[1], bf1[14]);
|
||||
bf0[15] = _mm256_sub_epi32(bf1[0], bf1[15]);
|
||||
bf0[16] = bf1[16];
|
||||
bf0[17] = bf1[17];
|
||||
bf0[18] = bf1[18];
|
||||
bf0[19] = bf1[19];
|
||||
bf0[20] = half_btf_avx2(cospim32, bf1[20], cospi32, bf1[27], rounding, bit);
|
||||
bf0[21] = half_btf_avx2(cospim32, bf1[21], cospi32, bf1[26], rounding, bit);
|
||||
bf0[22] = half_btf_avx2(cospim32, bf1[22], cospi32, bf1[25], rounding, bit);
|
||||
bf0[23] = half_btf_avx2(cospim32, bf1[23], cospi32, bf1[24], rounding, bit);
|
||||
bf0[24] = half_btf_avx2(cospi32, bf1[23], cospi32, bf1[24], rounding, bit);
|
||||
bf0[25] = half_btf_avx2(cospi32, bf1[22], cospi32, bf1[25], rounding, bit);
|
||||
bf0[26] = half_btf_avx2(cospi32, bf1[21], cospi32, bf1[26], rounding, bit);
|
||||
bf0[27] = half_btf_avx2(cospi32, bf1[20], cospi32, bf1[27], rounding, bit);
|
||||
bf0[28] = bf1[28];
|
||||
bf0[29] = bf1[29];
|
||||
bf0[30] = bf1[30];
|
||||
bf0[31] = bf1[31];
|
||||
|
||||
// stage 9
|
||||
out[0 * 4 + col] = _mm256_add_epi32(bf0[0], bf0[31]);
|
||||
out[1 * 4 + col] = _mm256_add_epi32(bf0[1], bf0[30]);
|
||||
out[2 * 4 + col] = _mm256_add_epi32(bf0[2], bf0[29]);
|
||||
out[3 * 4 + col] = _mm256_add_epi32(bf0[3], bf0[28]);
|
||||
out[4 * 4 + col] = _mm256_add_epi32(bf0[4], bf0[27]);
|
||||
out[5 * 4 + col] = _mm256_add_epi32(bf0[5], bf0[26]);
|
||||
out[6 * 4 + col] = _mm256_add_epi32(bf0[6], bf0[25]);
|
||||
out[7 * 4 + col] = _mm256_add_epi32(bf0[7], bf0[24]);
|
||||
out[8 * 4 + col] = _mm256_add_epi32(bf0[8], bf0[23]);
|
||||
out[9 * 4 + col] = _mm256_add_epi32(bf0[9], bf0[22]);
|
||||
out[10 * 4 + col] = _mm256_add_epi32(bf0[10], bf0[21]);
|
||||
out[11 * 4 + col] = _mm256_add_epi32(bf0[11], bf0[20]);
|
||||
out[12 * 4 + col] = _mm256_add_epi32(bf0[12], bf0[19]);
|
||||
out[13 * 4 + col] = _mm256_add_epi32(bf0[13], bf0[18]);
|
||||
out[14 * 4 + col] = _mm256_add_epi32(bf0[14], bf0[17]);
|
||||
out[15 * 4 + col] = _mm256_add_epi32(bf0[15], bf0[16]);
|
||||
out[16 * 4 + col] = _mm256_sub_epi32(bf0[15], bf0[16]);
|
||||
out[17 * 4 + col] = _mm256_sub_epi32(bf0[14], bf0[17]);
|
||||
out[18 * 4 + col] = _mm256_sub_epi32(bf0[13], bf0[18]);
|
||||
out[19 * 4 + col] = _mm256_sub_epi32(bf0[12], bf0[19]);
|
||||
out[20 * 4 + col] = _mm256_sub_epi32(bf0[11], bf0[20]);
|
||||
out[21 * 4 + col] = _mm256_sub_epi32(bf0[10], bf0[21]);
|
||||
out[22 * 4 + col] = _mm256_sub_epi32(bf0[9], bf0[22]);
|
||||
out[23 * 4 + col] = _mm256_sub_epi32(bf0[8], bf0[23]);
|
||||
out[24 * 4 + col] = _mm256_sub_epi32(bf0[7], bf0[24]);
|
||||
out[25 * 4 + col] = _mm256_sub_epi32(bf0[6], bf0[25]);
|
||||
out[26 * 4 + col] = _mm256_sub_epi32(bf0[5], bf0[26]);
|
||||
out[27 * 4 + col] = _mm256_sub_epi32(bf0[4], bf0[27]);
|
||||
out[28 * 4 + col] = _mm256_sub_epi32(bf0[3], bf0[28]);
|
||||
out[29 * 4 + col] = _mm256_sub_epi32(bf0[2], bf0[29]);
|
||||
out[30 * 4 + col] = _mm256_sub_epi32(bf0[1], bf0[30]);
|
||||
out[31 * 4 + col] = _mm256_sub_epi32(bf0[0], bf0[31]);
|
||||
}
|
||||
}
|
||||
|
||||
void av1_inv_txfm2d_add_32x32_avx2(const int32_t *coeff, uint16_t *output,
|
||||
int stride, int tx_type, int bd) {
|
||||
__m256i in[128], out[128];
|
||||
const TXFM_2D_CFG *cfg = NULL;
|
||||
|
||||
switch (tx_type) {
|
||||
case DCT_DCT:
|
||||
cfg = &inv_txfm_2d_cfg_dct_dct_32;
|
||||
load_buffer_32x32(coeff, in);
|
||||
transpose_32x32(in, out);
|
||||
idct32_avx2(out, in, cfg->cos_bit_row[2]);
|
||||
round_shift_32x32(in, -cfg->shift[0]);
|
||||
transpose_32x32(in, out);
|
||||
idct32_avx2(out, in, cfg->cos_bit_col[2]);
|
||||
write_buffer_32x32(in, output, stride, 0, 0, -cfg->shift[1], bd);
|
||||
break;
|
||||
default: assert(0);
|
||||
}
|
||||
}
|
||||
|
|
@ -86,6 +86,8 @@ class AV1HighbdInvHTNxN : public ::testing::TestWithParam<IHbdHtParam> {
|
|||
return 8;
|
||||
} else if (256 == num_coeffs_) {
|
||||
return 16;
|
||||
} else if (1024 == num_coeffs_) {
|
||||
return 32;
|
||||
} else {
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -216,4 +218,19 @@ INSTANTIATE_TEST_CASE_P(SSE4_1, AV1HighbdInvHTNxN,
|
|||
::testing::ValuesIn(kArrayIhtParam));
|
||||
#endif // HAVE_SSE4_1 && CONFIG_AOM_HIGHBITDEPTH
|
||||
|
||||
#if HAVE_AVX2 && CONFIG_AOM_HIGHBITDEPTH
|
||||
#define PARAM_LIST_32X32 \
|
||||
&av1_fwd_txfm2d_32x32_c, &av1_inv_txfm2d_add_32x32_avx2, \
|
||||
&av1_inv_txfm2d_add_32x32_c, 1024
|
||||
|
||||
const IHbdHtParam kArrayIhtParam32x32[] = {
|
||||
// 32x32
|
||||
make_tuple(PARAM_LIST_32X32, DCT_DCT, 10),
|
||||
make_tuple(PARAM_LIST_32X32, DCT_DCT, 12),
|
||||
};
|
||||
|
||||
INSTANTIATE_TEST_CASE_P(AVX2, AV1HighbdInvHTNxN,
|
||||
::testing::ValuesIn(kArrayIhtParam32x32));
|
||||
|
||||
#endif // HAVE_AVX2 && CONFIG_AOM_HIGHBITDEPTH
|
||||
} // namespace
|
||||
|
|
|
|||
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