SSSE3 implementation of full inverse 8x8 2D-DCT
This commit enables SSSE3 version full inverse 8x8 2D-DCT and reconstruction. It makes the runtime of vp9_idct8x8_64_add down from 256 cycles (SSE2) to 246 cycles. Change-Id: I0600feac894d6a443a3c9d18daf34156d4e225c3
This commit is contained in:
Jingning Han
Родитель
56186c2540
Коммит
52ae97b6aa
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@ -310,7 +310,7 @@ add_proto qw/void vp9_idct8x8_1_add/, "const int16_t *input, uint8_t *dest, int
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specialize qw/vp9_idct8x8_1_add sse2 neon dspr2/;
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add_proto qw/void vp9_idct8x8_64_add/, "const int16_t *input, uint8_t *dest, int dest_stride";
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specialize qw/vp9_idct8x8_64_add sse2 neon dspr2/;
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specialize qw/vp9_idct8x8_64_add sse2 neon dspr2/, "$ssse3_x86_64";
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add_proto qw/void vp9_idct8x8_10_add/, "const int16_t *input, uint8_t *dest, int dest_stride";
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specialize qw/vp9_idct8x8_10_add sse2 neon dspr2/;
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@ -0,0 +1,162 @@
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;
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; Copyright (c) 2014 The WebM project authors. All Rights Reserved.
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;
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; Use of this source code is governed by a BSD-style license
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; that can be found in the LICENSE file in the root of the source
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; tree. An additional intellectual property rights grant can be found
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; in the file PATENTS. All contributing project authors may
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; be found in the AUTHORS file in the root of the source tree.
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;
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%include "third_party/x86inc/x86inc.asm"
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; This file provides SSSE3 version of the inverse transformation. Part
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; of the functions are originally derived from the ffmpeg project.
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; Note that the current version applies to x86 64-bit only.
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SECTION_RODATA
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pw_11585x2: times 8 dw 23170
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pd_8192: times 4 dd 8192
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pw_16: times 8 dw 16
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%macro TRANSFORM_COEFFS 2
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pw_%1_%2: dw %1, %2, %1, %2, %1, %2, %1, %2
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pw_m%2_%1: dw -%2, %1, -%2, %1, -%2, %1, -%2, %1
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%endmacro
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TRANSFORM_COEFFS 6270, 15137
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TRANSFORM_COEFFS 3196, 16069
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TRANSFORM_COEFFS 13623, 9102
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SECTION .text
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%if ARCH_X86_64
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%macro SUM_SUB 3
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psubw m%3, m%1, m%2
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paddw m%1, m%2
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SWAP %2, %3
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%endmacro
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; butterfly operation
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%macro MUL_ADD_2X 6 ; dst1, dst2, src, round, coefs1, coefs2
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pmaddwd m%1, m%3, %5
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pmaddwd m%2, m%3, %6
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paddd m%1, %4
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paddd m%2, %4
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psrad m%1, 14
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psrad m%2, 14
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%endmacro
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%macro BUTTERFLY_4X 7 ; dst1, dst2, coef1, coef2, round, tmp1, tmp2
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punpckhwd m%6, m%2, m%1
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MUL_ADD_2X %7, %6, %6, %5, [pw_m%4_%3], [pw_%3_%4]
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punpcklwd m%2, m%1
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MUL_ADD_2X %1, %2, %2, %5, [pw_m%4_%3], [pw_%3_%4]
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packssdw m%1, m%7
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packssdw m%2, m%6
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%endmacro
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; matrix transpose
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%macro INTERLEAVE_2X 4
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punpckh%1 m%4, m%2, m%3
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punpckl%1 m%2, m%3
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SWAP %3, %4
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%endmacro
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%macro TRANSPOSE8X8 9
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INTERLEAVE_2X wd, %1, %2, %9
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INTERLEAVE_2X wd, %3, %4, %9
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INTERLEAVE_2X wd, %5, %6, %9
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INTERLEAVE_2X wd, %7, %8, %9
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INTERLEAVE_2X dq, %1, %3, %9
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INTERLEAVE_2X dq, %2, %4, %9
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INTERLEAVE_2X dq, %5, %7, %9
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INTERLEAVE_2X dq, %6, %8, %9
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INTERLEAVE_2X qdq, %1, %5, %9
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INTERLEAVE_2X qdq, %3, %7, %9
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INTERLEAVE_2X qdq, %2, %6, %9
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INTERLEAVE_2X qdq, %4, %8, %9
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SWAP %2, %5
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SWAP %4, %7
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%endmacro
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%macro IDCT8_1D 0
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SUM_SUB 0, 4, 9
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BUTTERFLY_4X 2, 6, 6270, 15137, m8, 9, 10
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pmulhrsw m0, m12
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pmulhrsw m4, m12
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BUTTERFLY_4X 1, 7, 3196, 16069, m8, 9, 10
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BUTTERFLY_4X 5, 3, 13623, 9102, m8, 9, 10
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SUM_SUB 1, 5, 9
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SUM_SUB 7, 3, 9
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SUM_SUB 0, 6, 9
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SUM_SUB 4, 2, 9
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SUM_SUB 3, 5, 9
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pmulhrsw m3, m12
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pmulhrsw m5, m12
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SUM_SUB 0, 7, 9
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SUM_SUB 4, 3, 9
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SUM_SUB 2, 5, 9
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SUM_SUB 6, 1, 9
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SWAP 3, 6
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SWAP 1, 4
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%endmacro
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; This macro handles 8 pixels per line
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%macro ADD_STORE_8P_2X 5; src1, src2, tmp1, tmp2, zero
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paddw m%1, m11
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paddw m%2, m11
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psraw m%1, 5
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psraw m%2, 5
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movh m%3, [outputq]
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movh m%4, [outputq + strideq]
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punpcklbw m%3, m%5
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punpcklbw m%4, m%5
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paddw m%3, m%1
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paddw m%4, m%2
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packuswb m%3, m%5
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packuswb m%4, m%5
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movh [outputq], m%3
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movh [outputq + strideq], m%4
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%endmacro
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INIT_XMM ssse3
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cglobal idct8x8_64_add, 3, 5, 13, input, output, stride
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mova m8, [pd_8192]
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mova m11, [pw_16]
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mova m12, [pw_11585x2]
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lea r3, [2 * strideq]
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mova m0, [inputq + 0]
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mova m1, [inputq + 16]
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mova m2, [inputq + 32]
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mova m3, [inputq + 48]
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mova m4, [inputq + 64]
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mova m5, [inputq + 80]
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mova m6, [inputq + 96]
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mova m7, [inputq + 112]
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TRANSPOSE8X8 0, 1, 2, 3, 4, 5, 6, 7, 9
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IDCT8_1D
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TRANSPOSE8X8 0, 1, 2, 3, 4, 5, 6, 7, 9
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IDCT8_1D
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pxor m12, m12
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ADD_STORE_8P_2X 0, 1, 9, 10, 12
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lea outputq, [outputq + r3]
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ADD_STORE_8P_2X 2, 3, 9, 10, 12
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lea outputq, [outputq + r3]
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ADD_STORE_8P_2X 4, 5, 9, 10, 12
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lea outputq, [outputq + r3]
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ADD_STORE_8P_2X 6, 7, 9, 10, 12
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RET
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%endif
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@ -10,7 +10,7 @@
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%include "third_party/x86inc/x86inc.asm"
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; This file provides SSSE3 version of the forward transformation. Part
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; of the macro definitions are originally derived from ffmpeg project.
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; of the macro definitions are originally derived from the ffmpeg project.
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; The current version applies to x86 64-bit only.
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SECTION_RODATA
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@ -120,6 +120,10 @@ VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_mblpf_vert_loopfilter_ds
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VP9_COMMON_SRCS-$(HAVE_SSE2) += common/x86/vp9_idct_intrin_sse2.c
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ifeq ($(ARCH_X86_64), yes)
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VP9_COMMON_SRCS-$(HAVE_SSSE3) += common/x86/vp9_idct_ssse3.asm
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endif
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VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_convolve_neon.c
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VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_idct16x16_neon.c
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VP9_COMMON_SRCS-$(HAVE_NEON) += common/arm/neon/vp9_loopfilter_16_neon.c
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