Moving set_rd_speed_thresholds{,_sub8x8} to vp9_rdopt.{h, c}.
Change-Id: I983364b33e8f103b43a0448821e890989176f1cc
This commit is contained in:
Dmitry Kovalev
Родитель
07f86d0944
Коммит
76d58ba414
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@ -373,122 +373,6 @@ static void update_reference_segmentation_map(VP9_COMP *cpi) {
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}
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}
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}
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}
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static void set_rd_speed_thresholds(VP9_COMP *cpi) {
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int i;
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RD_OPT *const rd = &cpi->rd;
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// Set baseline threshold values
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for (i = 0; i < MAX_MODES; ++i)
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rd->thresh_mult[i] = is_best_mode(cpi->oxcf.mode) ? -500 : 0;
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rd->thresh_mult[THR_NEARESTMV] = 0;
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rd->thresh_mult[THR_NEARESTG] = 0;
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rd->thresh_mult[THR_NEARESTA] = 0;
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rd->thresh_mult[THR_DC] += 1000;
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rd->thresh_mult[THR_NEWMV] += 1000;
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rd->thresh_mult[THR_NEWA] += 1000;
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rd->thresh_mult[THR_NEWG] += 1000;
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rd->thresh_mult[THR_NEARMV] += 1000;
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rd->thresh_mult[THR_NEARA] += 1000;
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rd->thresh_mult[THR_COMP_NEARESTLA] += 1000;
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rd->thresh_mult[THR_COMP_NEARESTGA] += 1000;
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rd->thresh_mult[THR_TM] += 1000;
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rd->thresh_mult[THR_COMP_NEARLA] += 1500;
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rd->thresh_mult[THR_COMP_NEWLA] += 2000;
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rd->thresh_mult[THR_NEARG] += 1000;
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rd->thresh_mult[THR_COMP_NEARGA] += 1500;
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rd->thresh_mult[THR_COMP_NEWGA] += 2000;
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rd->thresh_mult[THR_ZEROMV] += 2000;
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rd->thresh_mult[THR_ZEROG] += 2000;
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rd->thresh_mult[THR_ZEROA] += 2000;
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rd->thresh_mult[THR_COMP_ZEROLA] += 2500;
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rd->thresh_mult[THR_COMP_ZEROGA] += 2500;
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rd->thresh_mult[THR_H_PRED] += 2000;
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rd->thresh_mult[THR_V_PRED] += 2000;
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rd->thresh_mult[THR_D45_PRED ] += 2500;
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rd->thresh_mult[THR_D135_PRED] += 2500;
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rd->thresh_mult[THR_D117_PRED] += 2500;
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rd->thresh_mult[THR_D153_PRED] += 2500;
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rd->thresh_mult[THR_D207_PRED] += 2500;
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rd->thresh_mult[THR_D63_PRED] += 2500;
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/* disable frame modes if flags not set */
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if (!(cpi->ref_frame_flags & VP9_LAST_FLAG)) {
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rd->thresh_mult[THR_NEWMV ] = INT_MAX;
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rd->thresh_mult[THR_NEARESTMV] = INT_MAX;
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rd->thresh_mult[THR_ZEROMV ] = INT_MAX;
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rd->thresh_mult[THR_NEARMV ] = INT_MAX;
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}
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if (!(cpi->ref_frame_flags & VP9_GOLD_FLAG)) {
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rd->thresh_mult[THR_NEARESTG ] = INT_MAX;
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rd->thresh_mult[THR_ZEROG ] = INT_MAX;
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rd->thresh_mult[THR_NEARG ] = INT_MAX;
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rd->thresh_mult[THR_NEWG ] = INT_MAX;
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}
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if (!(cpi->ref_frame_flags & VP9_ALT_FLAG)) {
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rd->thresh_mult[THR_NEARESTA ] = INT_MAX;
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rd->thresh_mult[THR_ZEROA ] = INT_MAX;
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rd->thresh_mult[THR_NEARA ] = INT_MAX;
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rd->thresh_mult[THR_NEWA ] = INT_MAX;
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}
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if ((cpi->ref_frame_flags & (VP9_LAST_FLAG | VP9_ALT_FLAG)) !=
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(VP9_LAST_FLAG | VP9_ALT_FLAG)) {
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rd->thresh_mult[THR_COMP_ZEROLA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARESTLA] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARLA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEWLA ] = INT_MAX;
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}
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if ((cpi->ref_frame_flags & (VP9_GOLD_FLAG | VP9_ALT_FLAG)) !=
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(VP9_GOLD_FLAG | VP9_ALT_FLAG)) {
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rd->thresh_mult[THR_COMP_ZEROGA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARESTGA] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARGA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEWGA ] = INT_MAX;
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}
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}
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static void set_rd_speed_thresholds_sub8x8(VP9_COMP *cpi) {
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const SPEED_FEATURES *const sf = &cpi->sf;
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RD_OPT *const rd = &cpi->rd;
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int i;
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for (i = 0; i < MAX_REFS; ++i)
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rd->thresh_mult_sub8x8[i] = is_best_mode(cpi->oxcf.mode) ? -500 : 0;
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rd->thresh_mult_sub8x8[THR_LAST] += 2500;
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rd->thresh_mult_sub8x8[THR_GOLD] += 2500;
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rd->thresh_mult_sub8x8[THR_ALTR] += 2500;
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rd->thresh_mult_sub8x8[THR_INTRA] += 2500;
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rd->thresh_mult_sub8x8[THR_COMP_LA] += 4500;
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rd->thresh_mult_sub8x8[THR_COMP_GA] += 4500;
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// Check for masked out split cases.
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for (i = 0; i < MAX_REFS; i++)
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if (sf->disable_split_mask & (1 << i))
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rd->thresh_mult_sub8x8[i] = INT_MAX;
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// disable mode test if frame flag is not set
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if (!(cpi->ref_frame_flags & VP9_LAST_FLAG))
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rd->thresh_mult_sub8x8[THR_LAST] = INT_MAX;
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if (!(cpi->ref_frame_flags & VP9_GOLD_FLAG))
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rd->thresh_mult_sub8x8[THR_GOLD] = INT_MAX;
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if (!(cpi->ref_frame_flags & VP9_ALT_FLAG))
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rd->thresh_mult_sub8x8[THR_ALTR] = INT_MAX;
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if ((cpi->ref_frame_flags & (VP9_LAST_FLAG | VP9_ALT_FLAG)) !=
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(VP9_LAST_FLAG | VP9_ALT_FLAG))
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rd->thresh_mult_sub8x8[THR_COMP_LA] = INT_MAX;
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if ((cpi->ref_frame_flags & (VP9_GOLD_FLAG | VP9_ALT_FLAG)) !=
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(VP9_GOLD_FLAG | VP9_ALT_FLAG))
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rd->thresh_mult_sub8x8[THR_COMP_GA] = INT_MAX;
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}
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static void set_speed_features(VP9_COMP *cpi) {
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static void set_speed_features(VP9_COMP *cpi) {
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#if CONFIG_INTERNAL_STATS
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#if CONFIG_INTERNAL_STATS
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@ -500,8 +384,8 @@ static void set_speed_features(VP9_COMP *cpi) {
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vp9_set_speed_features(cpi);
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vp9_set_speed_features(cpi);
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// Set rd thresholds based on mode and speed setting
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// Set rd thresholds based on mode and speed setting
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set_rd_speed_thresholds(cpi);
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vp9_set_rd_speed_thresholds(cpi);
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set_rd_speed_thresholds_sub8x8(cpi);
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vp9_set_rd_speed_thresholds_sub8x8(cpi);
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cpi->mb.fwd_txm4x4 = vp9_fdct4x4;
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cpi->mb.fwd_txm4x4 = vp9_fdct4x4;
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if (cpi->oxcf.lossless || cpi->mb.e_mbd.lossless) {
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if (cpi->oxcf.lossless || cpi->mb.e_mbd.lossless) {
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@ -567,7 +451,6 @@ void vp9_alloc_compressor_data(VP9_COMP *cpi) {
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vp9_setup_pc_tree(&cpi->common, &cpi->mb);
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vp9_setup_pc_tree(&cpi->common, &cpi->mb);
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}
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}
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static void update_frame_size(VP9_COMP *cpi) {
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static void update_frame_size(VP9_COMP *cpi) {
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VP9_COMMON *const cm = &cpi->common;
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VP9_COMMON *const cm = &cpi->common;
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MACROBLOCKD *const xd = &cpi->mb.e_mbd;
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MACROBLOCKD *const xd = &cpi->mb.e_mbd;
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@ -4374,3 +4374,120 @@ int64_t vp9_rd_pick_inter_mode_sub8x8(VP9_COMP *cpi, MACROBLOCK *x,
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return best_rd;
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return best_rd;
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}
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}
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void vp9_set_rd_speed_thresholds(VP9_COMP *cpi) {
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int i;
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RD_OPT *const rd = &cpi->rd;
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// Set baseline threshold values
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for (i = 0; i < MAX_MODES; ++i)
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rd->thresh_mult[i] = is_best_mode(cpi->oxcf.mode) ? -500 : 0;
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rd->thresh_mult[THR_NEARESTMV] = 0;
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rd->thresh_mult[THR_NEARESTG] = 0;
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rd->thresh_mult[THR_NEARESTA] = 0;
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rd->thresh_mult[THR_DC] += 1000;
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rd->thresh_mult[THR_NEWMV] += 1000;
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rd->thresh_mult[THR_NEWA] += 1000;
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rd->thresh_mult[THR_NEWG] += 1000;
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rd->thresh_mult[THR_NEARMV] += 1000;
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rd->thresh_mult[THR_NEARA] += 1000;
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rd->thresh_mult[THR_COMP_NEARESTLA] += 1000;
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rd->thresh_mult[THR_COMP_NEARESTGA] += 1000;
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rd->thresh_mult[THR_TM] += 1000;
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rd->thresh_mult[THR_COMP_NEARLA] += 1500;
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rd->thresh_mult[THR_COMP_NEWLA] += 2000;
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rd->thresh_mult[THR_NEARG] += 1000;
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rd->thresh_mult[THR_COMP_NEARGA] += 1500;
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rd->thresh_mult[THR_COMP_NEWGA] += 2000;
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rd->thresh_mult[THR_ZEROMV] += 2000;
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rd->thresh_mult[THR_ZEROG] += 2000;
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rd->thresh_mult[THR_ZEROA] += 2000;
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rd->thresh_mult[THR_COMP_ZEROLA] += 2500;
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rd->thresh_mult[THR_COMP_ZEROGA] += 2500;
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rd->thresh_mult[THR_H_PRED] += 2000;
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rd->thresh_mult[THR_V_PRED] += 2000;
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rd->thresh_mult[THR_D45_PRED ] += 2500;
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rd->thresh_mult[THR_D135_PRED] += 2500;
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rd->thresh_mult[THR_D117_PRED] += 2500;
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rd->thresh_mult[THR_D153_PRED] += 2500;
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rd->thresh_mult[THR_D207_PRED] += 2500;
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rd->thresh_mult[THR_D63_PRED] += 2500;
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/* disable frame modes if flags not set */
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if (!(cpi->ref_frame_flags & VP9_LAST_FLAG)) {
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rd->thresh_mult[THR_NEWMV ] = INT_MAX;
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rd->thresh_mult[THR_NEARESTMV] = INT_MAX;
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rd->thresh_mult[THR_ZEROMV ] = INT_MAX;
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rd->thresh_mult[THR_NEARMV ] = INT_MAX;
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}
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if (!(cpi->ref_frame_flags & VP9_GOLD_FLAG)) {
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rd->thresh_mult[THR_NEARESTG ] = INT_MAX;
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rd->thresh_mult[THR_ZEROG ] = INT_MAX;
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rd->thresh_mult[THR_NEARG ] = INT_MAX;
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rd->thresh_mult[THR_NEWG ] = INT_MAX;
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}
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if (!(cpi->ref_frame_flags & VP9_ALT_FLAG)) {
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rd->thresh_mult[THR_NEARESTA ] = INT_MAX;
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rd->thresh_mult[THR_ZEROA ] = INT_MAX;
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rd->thresh_mult[THR_NEARA ] = INT_MAX;
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rd->thresh_mult[THR_NEWA ] = INT_MAX;
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}
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if ((cpi->ref_frame_flags & (VP9_LAST_FLAG | VP9_ALT_FLAG)) !=
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(VP9_LAST_FLAG | VP9_ALT_FLAG)) {
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rd->thresh_mult[THR_COMP_ZEROLA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARESTLA] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARLA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEWLA ] = INT_MAX;
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}
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if ((cpi->ref_frame_flags & (VP9_GOLD_FLAG | VP9_ALT_FLAG)) !=
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(VP9_GOLD_FLAG | VP9_ALT_FLAG)) {
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rd->thresh_mult[THR_COMP_ZEROGA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARESTGA] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEARGA ] = INT_MAX;
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rd->thresh_mult[THR_COMP_NEWGA ] = INT_MAX;
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}
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}
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void vp9_set_rd_speed_thresholds_sub8x8(VP9_COMP *cpi) {
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const SPEED_FEATURES *const sf = &cpi->sf;
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RD_OPT *const rd = &cpi->rd;
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int i;
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for (i = 0; i < MAX_REFS; ++i)
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rd->thresh_mult_sub8x8[i] = is_best_mode(cpi->oxcf.mode) ? -500 : 0;
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rd->thresh_mult_sub8x8[THR_LAST] += 2500;
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rd->thresh_mult_sub8x8[THR_GOLD] += 2500;
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rd->thresh_mult_sub8x8[THR_ALTR] += 2500;
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rd->thresh_mult_sub8x8[THR_INTRA] += 2500;
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rd->thresh_mult_sub8x8[THR_COMP_LA] += 4500;
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rd->thresh_mult_sub8x8[THR_COMP_GA] += 4500;
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// Check for masked out split cases.
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for (i = 0; i < MAX_REFS; i++)
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if (sf->disable_split_mask & (1 << i))
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rd->thresh_mult_sub8x8[i] = INT_MAX;
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// disable mode test if frame flag is not set
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if (!(cpi->ref_frame_flags & VP9_LAST_FLAG))
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rd->thresh_mult_sub8x8[THR_LAST] = INT_MAX;
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if (!(cpi->ref_frame_flags & VP9_GOLD_FLAG))
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rd->thresh_mult_sub8x8[THR_GOLD] = INT_MAX;
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if (!(cpi->ref_frame_flags & VP9_ALT_FLAG))
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rd->thresh_mult_sub8x8[THR_ALTR] = INT_MAX;
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if ((cpi->ref_frame_flags & (VP9_LAST_FLAG | VP9_ALT_FLAG)) !=
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(VP9_LAST_FLAG | VP9_ALT_FLAG))
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rd->thresh_mult_sub8x8[THR_COMP_LA] = INT_MAX;
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if ((cpi->ref_frame_flags & (VP9_GOLD_FLAG | VP9_ALT_FLAG)) !=
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(VP9_GOLD_FLAG | VP9_ALT_FLAG))
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rd->thresh_mult_sub8x8[THR_COMP_GA] = INT_MAX;
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}
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@ -83,6 +83,10 @@ void vp9_get_entropy_contexts(BLOCK_SIZE bsize, TX_SIZE tx_size,
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ENTROPY_CONTEXT t_above[16],
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ENTROPY_CONTEXT t_above[16],
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ENTROPY_CONTEXT t_left[16]);
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ENTROPY_CONTEXT t_left[16]);
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void vp9_set_rd_speed_thresholds(VP9_COMP *cpi);
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void vp9_set_rd_speed_thresholds_sub8x8(VP9_COMP *cpi);
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#ifdef __cplusplus
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#ifdef __cplusplus
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} // extern "C"
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} // extern "C"
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#endif
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#endif
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