diff --git a/aom_dsp/aom_dsp.cmake b/aom_dsp/aom_dsp.cmake index 946fb93b4..bed72d2c1 100644 --- a/aom_dsp/aom_dsp.cmake +++ b/aom_dsp/aom_dsp.cmake @@ -119,6 +119,59 @@ if ("${AOM_TARGET_CPU}" STREQUAL "arm64") "${AOM_ROOT}/aom_dsp/arm/loopfilter_8_neon.c") endif () +set(AOM_DSP_COMMON_INTRIN_DSPR2 + "${AOM_ROOT}/aom_dsp/mips/common_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/common_dspr2.h" + "${AOM_ROOT}/aom_dsp/mips/convolve2_avg_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve2_avg_horiz_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve2_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve2_horiz_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve2_vert_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve8_avg_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve8_avg_horiz_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve8_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve8_horiz_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve8_vert_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/convolve_common_dspr2.h" + "${AOM_ROOT}/aom_dsp/mips/intrapred16_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/intrapred4_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/intrapred8_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/inv_txfm_dspr2.h" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_filters_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_filters_dspr2.h" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_macros_dspr2.h" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_masks_dspr2.h" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_mb_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_mb_horiz_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_mb_vert_dspr2.c") + +set(AOM_DSP_COMMON_INTRIN_MSA + "${AOM_ROOT}/aom_dsp/mips/add_noise_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve8_avg_horiz_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve8_avg_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve8_avg_vert_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve8_horiz_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve8_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve8_vert_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve_avg_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve_copy_msa.c" + "${AOM_ROOT}/aom_dsp/mips/aom_convolve_msa.h" + "${AOM_ROOT}/aom_dsp/mips/fwd_dct32x32_msa.c" + "${AOM_ROOT}/aom_dsp/mips/fwd_txfm_msa.c" + "${AOM_ROOT}/aom_dsp/mips/fwd_txfm_msa.h" + "${AOM_ROOT}/aom_dsp/mips/idct16x16_msa.c" + "${AOM_ROOT}/aom_dsp/mips/idct32x32_msa.c" + "${AOM_ROOT}/aom_dsp/mips/idct4x4_msa.c" + "${AOM_ROOT}/aom_dsp/mips/idct8x8_msa.c" + "${AOM_ROOT}/aom_dsp/mips/intrapred_msa.c" + "${AOM_ROOT}/aom_dsp/mips/inv_txfm_msa.h" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_16_msa.c" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_4_msa.c" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_8_msa.c" + "${AOM_ROOT}/aom_dsp/mips/loopfilter_msa.h" + "${AOM_ROOT}/aom_dsp/mips/macros_msa.h" + "${AOM_ROOT}/aom_dsp/mips/txfm_macros_msa.h") + if (CONFIG_HIGHBITDEPTH) set(AOM_DSP_COMMON_ASM_SSE2 ${AOM_DSP_COMMON_ASM_SSE2} @@ -127,6 +180,14 @@ if (CONFIG_HIGHBITDEPTH) set(AOM_DSP_COMMON_INTRIN_SSE2 ${AOM_DSP_COMMON_INTRIN_SSE2} "${AOM_ROOT}/aom_dsp/x86/highbd_loopfilter_sse2.c") +else () + set(AOM_DSP_COMMON_INTRIN_DSPR2 + ${AOM_DSP_COMMON_INTRIN_DSPR2} + "${AOM_ROOT}/aom_dsp/mips/itrans16_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/itrans32_cols_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/itrans32_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/itrans4_dspr2.c" + "${AOM_ROOT}/aom_dsp/mips/itrans8_dspr2.c") endif () if (CONFIG_ANS) @@ -263,6 +324,13 @@ if (CONFIG_ENCODERS) ${AOM_DSP_ENCODER_AVX_ASM_X86_64} "${AOM_ROOT}/aom_dsp/x86/quantize_avx_x86_64.asm") + set(AOM_DSP_ENCODER_INTRIN_MSA + "${AOM_ROOT}/aom_dsp/mips/avg_msa.c" + "${AOM_ROOT}/aom_dsp/mips/sad_msa.c" + "${AOM_ROOT}/aom_dsp/mips/subtract_msa.c" + "${AOM_ROOT}/aom_dsp/mips/variance_msa.c" + "${AOM_ROOT}/aom_dsp/mips/sub_pixel_variance_msa.c") + if (CONFIG_HIGHBITDEPTH) set(AOM_DSP_ENCODER_INTRIN_SSE2 ${AOM_DSP_ENCODER_INTRIN_SSE2} @@ -425,6 +493,21 @@ function (setup_aom_dsp_targets) add_intrinsics_object_library("${AOM_NEON_INTRIN_FLAG}" "neon" "aom_dsp_common" "AOM_DSP_COMMON_INTRIN_NEON") endif () + + if (HAVE_DSPR2) + add_intrinsics_object_library("" "dspr2" "aom_dsp_common" + "AOM_DSP_COMMON_INTRIN_DSPR2") + endif () + + if (HAVE_MSA) + add_intrinsics_object_library("" "msa" "aom_dsp_common" + "AOM_DSP_COMMON_INTRIN_MSA") + if (CONFIG_ENCODERS) + add_intrinsics_object_library("" "msa" "aom_dsp_encoder" + "AOM_DSP_ENCODER_INTRIN_MSA") + endif () + endif () + # Pass the new lib targets up to the parent scope instance of # $AOM_LIB_TARGETS. set(AOM_LIB_TARGETS ${AOM_LIB_TARGETS} PARENT_SCOPE) diff --git a/aom_scale/aom_scale.cmake b/aom_scale/aom_scale.cmake index 3124bc740..a6aa31afc 100644 --- a/aom_scale/aom_scale.cmake +++ b/aom_scale/aom_scale.cmake @@ -16,10 +16,19 @@ set(AOM_SCALE_SOURCES "${AOM_ROOT}/aom_scale/generic/yv12extend.c" "${AOM_ROOT}/aom_scale/yv12config.h") +set(AOM_SCALE_INTRIN_DSPR2 + "${AOM_ROOT}/aom_scale/mips/dspr2/yv12extend_dspr2.c") + # Creates the aom_scale build target and makes libaom depend on it. The libaom # target must exist before this function is called. function (setup_aom_scale_targets) add_library(aom_scale OBJECT ${AOM_SCALE_SOURCES}) - set(AOM_LIB_TARGETS ${AOM_LIB_TARGETS} aom_scale PARENT_SCOPE) target_sources(aom PUBLIC $) + + if (HAVE_DSPR2) + add_intrinsics_object_library("" "dspr2" "aom_scale" + "AOM_SCALE_INTRIN_DSPR2") + endif () + + set(AOM_LIB_TARGETS ${AOM_LIB_TARGETS} aom_scale PARENT_SCOPE) endfunction () diff --git a/av1/av1.cmake b/av1/av1.cmake index 219d8a330..8bab95a3e 100644 --- a/av1/av1.cmake +++ b/av1/av1.cmake @@ -165,6 +165,16 @@ set(AOM_AV1_COMMON_SSE4_1_INTRIN set(AOM_AV1_COMMON_AVX2_INTRIN "${AOM_ROOT}/av1/common/x86/hybrid_inv_txfm_avx2.c") +set(AOM_AV1_COMMON_DSPR2_INTRIN + "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans16_dspr2.c" + "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans4_dspr2.c" + "${AOM_ROOT}/av1/common/mips/dspr2/av1_itrans8_dspr2.c") + +set(AOM_AV1_COMMON_MSA_INTRIN + "${AOM_ROOT}/av1/common/mips/msa/av1_idct16x16_msa.c" + "${AOM_ROOT}/av1/common/mips/msa/av1_idct4x4_msa.c" + "${AOM_ROOT}/av1/common/mips/msa/av1_idct8x8_msa.c") + set(AOM_AV1_ENCODER_SSE2_ASM "${AOM_ROOT}/av1/encoder/x86/dct_sse2.asm" "${AOM_ROOT}/av1/encoder/x86/error_sse2.asm" @@ -188,6 +198,14 @@ set(AOM_AV1_ENCODER_AVX2_INTRIN set(AOM_AV1_ENCODER_NEON_INTRIN "${AOM_ROOT}/av1/encoder/arm/neon/quantize_neon.c") +set(AOM_AV1_ENCODER_MSA_INTRIN + "${AOM_ROOT}/av1/encoder/mips/msa/error_msa.c" + "${AOM_ROOT}/av1/encoder/mips/msa/fdct16x16_msa.c" + "${AOM_ROOT}/av1/encoder/mips/msa/fdct4x4_msa.c" + "${AOM_ROOT}/av1/encoder/mips/msa/fdct8x8_msa.c" + "${AOM_ROOT}/av1/encoder/mips/msa/fdct_msa.h" + "${AOM_ROOT}/av1/encoder/mips/msa/temporal_filter_msa.c") + if (CONFIG_ACCOUNTING) set(AOM_AV1_COMMON_SOURCES ${AOM_AV1_COMMON_SOURCES} @@ -471,6 +489,19 @@ function (setup_av1_targets) "AOM_AV1_ENCODER_NEON_INTRIN") endif () endif () + + if (HAVE_DSPR2) + add_intrinsics_object_library("" "dspr2" "aom_av1_common" + "AOM_AV1_COMMON_DSPR2_INTRIN") + endif () + + if (HAVE_MSA) + add_intrinsics_object_library("" "msa" "aom_av1_common" + "AOM_AV1_COMMON_MSA_INTRIN") + add_intrinsics_object_library("" "msa" "aom_av1_encoder" + "AOM_AV1_ENCODER_MSA_INTRIN") + endif () + # Pass the new lib targets up to the parent scope instance of # $AOM_LIB_TARGETS. set(AOM_LIB_TARGETS ${AOM_LIB_TARGETS} PARENT_SCOPE) diff --git a/build/cmake/aom_configure.cmake b/build/cmake/aom_configure.cmake index 1cf748fea..511b6c33b 100644 --- a/build/cmake/aom_configure.cmake +++ b/build/cmake/aom_configure.cmake @@ -57,7 +57,8 @@ if (NOT AOM_TARGET_CPU) elseif ("${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "i386" OR "${CMAKE_SYSTEM_PROCESSOR}" STREQUAL "x86") set(AOM_TARGET_CPU "x86") - elseif ("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "^arm") + elseif ("${CMAKE_SYSTEM_PROCESSOR}" MATCHES "^arm" OR + "${CMAKE_SYSTEM_PROCESSOR}" MATCHES "^mips") set(AOM_TARGET_CPU "${CMAKE_SYSTEM_PROCESSOR}") endif () endif () diff --git a/build/cmake/targets/mips32.cmake b/build/cmake/targets/mips32.cmake new file mode 100644 index 000000000..aad73d051 --- /dev/null +++ b/build/cmake/targets/mips32.cmake @@ -0,0 +1,32 @@ +## +## Copyright (c) 2017, Alliance for Open Media. All rights reserved +## +## This source code is subject to the terms of the BSD 2 Clause License and +## the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License +## was not distributed with this source code in the LICENSE file, you can +## obtain it at www.aomedia.org/license/software. If the Alliance for Open +## Media Patent License 1.0 was not distributed with this source code in the +## PATENTS file, you can obtain it at www.aomedia.org/license/patent. +## +set(AOM_ARCH "mips32") +set(ARCH_MIPS 1) + +# Assembly flavors available for the target. +set(HAVE_MIPS32 1) + +# RTCD versions of assembly flavor flags ("yes" means on in rtcd.pl, not 1). +set(RTCD_ARCH_MIPS "yes") + +if (HAVE_DSPR2) + set(RTCD_HAVE_DSPR2 "yes") +endif () + +if (HAVE_MSA) + set(RTCD_HAVE_MSA "yes") +endif () + +foreach (config_var ${AOM_CONFIG_VARS}) + if (${${config_var}}) + set(RTCD_${config_var} yes) + endif () +endforeach () diff --git a/build/cmake/targets/rtcd_templates/mips32.rtcd.cmake b/build/cmake/targets/rtcd_templates/mips32.rtcd.cmake new file mode 100644 index 000000000..9b96313e0 --- /dev/null +++ b/build/cmake/targets/rtcd_templates/mips32.rtcd.cmake @@ -0,0 +1,126 @@ +## +## Copyright (c) 2017, Alliance for Open Media. All rights reserved +## +## This source code is subject to the terms of the BSD 2 Clause License and +## the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License +## was not distributed with this source code in the LICENSE file, you can +## obtain it at www.aomedia.org/license/software. If the Alliance for Open +## Media Patent License 1.0 was not distributed with this source code in the +## PATENTS file, you can obtain it at www.aomedia.org/license/patent. +## +ARCH_MIPS=${RTCD_ARCH_MIPS} +HAVE_MIPS32=${RTCD_HAVE_MIPS32} +HAVE_DSPR2=${RTCD_HAVE_DSPR2} +HAVE_MSA=${RTCD_HAVE_MSA} + +CONFIG_ACCOUNTING=${RTCD_CONFIG_ACCOUNTING} +CONFIG_INSPECTION=${RTCD_CONFIG_INSPECTION} +CONFIG_ADAPT_SCAN=${RTCD_CONFIG_ADAPT_SCAN} +CONFIG_ALT_INTRA=${RTCD_CONFIG_ALT_INTRA} +CONFIG_ANS=${RTCD_CONFIG_ANS} +CONFIG_AOM_HIGHBITDEPTH=${RTCD_CONFIG_AOM_HIGHBITDEPTH} +CONFIG_AOM_QM=${RTCD_CONFIG_AOM_QM} +CONFIG_AV1=${RTCD_CONFIG_AV1} +CONFIG_AV1_DECODER=${RTCD_CONFIG_AV1_DECODER} +CONFIG_AV1_ENCODER=${RTCD_CONFIG_AV1_ENCODER} +CONFIG_BIG_ENDIAN=${RTCD_CONFIG_BIG_ENDIAN} +CONFIG_BITSTREAM_DEBUG=${RTCD_CONFIG_BITSTREAM_DEBUG} +CONFIG_CB4X4=${RTCD_CONFIG_CB4X4} +CONFIG_CDEF=${RTCD_CONFIG_CDEF} +CONFIG_CHROMA_2X2=${RTCD_CONFIG_CHROMA_2X2} +CONFIG_CODEC_SRCS=${RTCD_CONFIG_CODEC_SRCS} +CONFIG_COEFFICIENT_RANGE_CHECKING=${RTCD_CONFIG_COEFFICIENT_RANGE_CHECKING} +CONFIG_COEF_INTERLEAVE=${RTCD_CONFIG_COEF_INTERLEAVE} +CONFIG_COMPOUND_SEGMENT=${RTCD_CONFIG_COMPOUND_SEGMENT} +CONFIG_CONVOLVE_ROUND=${RTCD_CONFIG_CONVOLVE_ROUND} +CONFIG_DAALA_DIST=${RTCD_CONFIG_DAALA_DIST} +CONFIG_DAALA_EC=${RTCD_CONFIG_DAALA_EC} +CONFIG_DEBUG=${RTCD_CONFIG_DEBUG} +CONFIG_DEBUG_LIBS=${RTCD_CONFIG_DEBUG_LIBS} +CONFIG_DECODERS=${RTCD_CONFIG_DECODERS} +CONFIG_DECODE_PERF_TESTS=${RTCD_CONFIG_DECODE_PERF_TESTS} +CONFIG_DELTA_Q=${RTCD_CONFIG_DELTA_Q} +CONFIG_DEPENDENCY_TRACKING=${RTCD_CONFIG_DEPENDENCY_TRACKING} +CONFIG_DEPENDENT_HORZTILES=${RTCD_CONFIG_DEPENDENT_HORZTILES} +CONFIG_DUAL_FILTER=${RTCD_CONFIG_DUAL_FILTER} +CONFIG_EC_ADAPT=${RTCD_CONFIG_EC_ADAPT} +CONFIG_EC_MULTISYMBOL=${RTCD_CONFIG_EC_MULTISYMBOL} +CONFIG_EMULATE_HARDWARE=${RTCD_CONFIG_EMULATE_HARDWARE} +CONFIG_ENCODERS=${RTCD_CONFIG_ENCODERS} +CONFIG_ENCODE_PERF_TESTS=${RTCD_CONFIG_ENCODE_PERF_TESTS} +CONFIG_ENTROPY=${RTCD_CONFIG_ENTROPY} +CONFIG_ENTROPY_STATS=${RTCD_CONFIG_ENTROPY_STATS} +CONFIG_ERROR_CONCEALMENT=${RTCD_CONFIG_ERROR_CONCEALMENT} +CONFIG_EXPERIMENTAL=${RTCD_CONFIG_EXPERIMENTAL} +CONFIG_EXTERNAL_BUILD=${RTCD_CONFIG_EXTERNAL_BUILD} +CONFIG_EXT_INTER=${RTCD_CONFIG_EXT_INTER} +CONFIG_EXT_INTRA=${RTCD_CONFIG_EXT_INTRA} +CONFIG_EXT_PARTITION=${RTCD_CONFIG_EXT_PARTITION} +CONFIG_EXT_PARTITION_TYPES=${RTCD_CONFIG_EXT_PARTITION_TYPES} +CONFIG_EXT_REFS=${RTCD_CONFIG_EXT_REFS} +CONFIG_EXT_TILE=${RTCD_CONFIG_EXT_TILE} +CONFIG_EXT_TX=${RTCD_CONFIG_EXT_TX} +CONFIG_FILTER_7BIT=${RTCD_CONFIG_FILTER_7BIT} +CONFIG_FILTER_INTRA=${RTCD_CONFIG_FILTER_INTRA} +CONFIG_FP_MB_STATS=${RTCD_CONFIG_FP_MB_STATS} +CONFIG_FRAME_SIZE=${RTCD_CONFIG_FRAME_SIZE} +CONFIG_GCC=${RTCD_CONFIG_GCC} +CONFIG_GCOV=${RTCD_CONFIG_GCOV} +CONFIG_GLOBAL_MOTION=${RTCD_CONFIG_GLOBAL_MOTION} +CONFIG_GPROF=${RTCD_CONFIG_GPROF} +CONFIG_INSTALL_BINS=${RTCD_CONFIG_INSTALL_BINS} +CONFIG_INSTALL_DOCS=${RTCD_CONFIG_INSTALL_DOCS} +CONFIG_INSTALL_LIBS=${RTCD_CONFIG_INSTALL_LIBS} +CONFIG_INSTALL_SRCS=${RTCD_CONFIG_INSTALL_SRCS} +CONFIG_INTERNAL_STATS=${RTCD_CONFIG_INTERNAL_STATS} +CONFIG_INTRA_INTERP=${RTCD_CONFIG_INTRA_INTERP} +CONFIG_LIBYUV=${RTCD_CONFIG_LIBYUV} +CONFIG_LOOPFILTERING_ACROSS_TILES=${RTCD_CONFIG_LOOPFILTERING_ACROSS_TILES} +CONFIG_LOOP_RESTORATION=${RTCD_CONFIG_LOOP_RESTORATION} +CONFIG_LOWBITDEPTH=${RTCD_CONFIG_LOWBITDEPTH} +CONFIG_LV_MAP=${RTCD_CONFIG_LV_MAP} +CONFIG_MASKED_TX=${RTCD_CONFIG_MASKED_TX} +CONFIG_MOTION_VAR=${RTCD_CONFIG_MOTION_VAR} +CONFIG_MSVS=${RTCD_CONFIG_MSVS} +CONFIG_MULTITHREAD=${RTCD_CONFIG_MULTITHREAD} +CONFIG_MV_COMPRESS=${RTCD_CONFIG_MV_COMPRESS} +CONFIG_NCOBMC=${RTCD_CONFIG_NCOBMC} +CONFIG_NEW_QUANT=${RTCD_CONFIG_NEW_QUANT} +CONFIG_NEW_TOKENSET=${RTCD_CONFIG_NEW_TOKENSET} +CONFIG_ONTHEFLY_BITPACKING=${RTCD_CONFIG_ONTHEFLY_BITPACKING} +CONFIG_OS_SUPPORT=${RTCD_CONFIG_OS_SUPPORT} +CONFIG_PALETTE=${RTCD_CONFIG_PALETTE} +CONFIG_PALETTE_THROUGHPUT=${RTCD_CONFIG_PALETTE_THROUGHPUT} +CONFIG_PARALLEL_DEBLOCKING=${RTCD_CONFIG_PARALLEL_DEBLOCKING} +CONFIG_PIC=${RTCD_CONFIG_PIC} +CONFIG_POSTPROC=${RTCD_CONFIG_POSTPROC} +CONFIG_POSTPROC_VISUALIZER=${RTCD_CONFIG_POSTPROC_VISUALIZER} +CONFIG_PVQ=${RTCD_CONFIG_PVQ} +CONFIG_RAWBITS=${RTCD_CONFIG_RAWBITS} +CONFIG_RD_DEBUG=${RTCD_CONFIG_RD_DEBUG} +CONFIG_REALTIME_ONLY=${RTCD_CONFIG_REALTIME_ONLY} +CONFIG_RECT_TX=${RTCD_CONFIG_RECT_TX} +CONFIG_REFERENCE_BUFFER=${RTCD_CONFIG_REFERENCE_BUFFER} +CONFIG_REF_ADAPT=${RTCD_CONFIG_REF_ADAPT} +CONFIG_REF_MV=${RTCD_CONFIG_REF_MV} +CONFIG_RUNTIME_CPU_DETECT=${RTCD_CONFIG_RUNTIME_CPU_DETECT} +CONFIG_RVCT=${RTCD_CONFIG_RVCT} +CONFIG_SHARED=${RTCD_CONFIG_SHARED} +CONFIG_SIZE_LIMIT=${RTCD_CONFIG_SIZE_LIMIT} +CONFIG_SMALL=${RTCD_CONFIG_SMALL} +CONFIG_SPATIAL_RESAMPLING=${RTCD_CONFIG_SPATIAL_RESAMPLING} +CONFIG_STATIC=${RTCD_CONFIG_STATIC} +CONFIG_STATIC_MSVCRT=${RTCD_CONFIG_STATIC_MSVCRT} +CONFIG_SUB8X8_MC=${RTCD_CONFIG_SUB8X8_MC} +CONFIG_SUPERTX=${RTCD_CONFIG_SUPERTX} +CONFIG_TEMPMV_SIGNALING=${RTCD_CONFIG_TEMPMV_SIGNALING} +CONFIG_TILE_GROUPS=${RTCD_CONFIG_TILE_GROUPS} +CONFIG_TPL_MV=${RTCD_CONFIG_TPL_MV} +CONFIG_TRIPRED=${RTCD_CONFIG_TRIPRED} +CONFIG_TX64X64=${RTCD_CONFIG_TX64X64} +CONFIG_UNIT_TESTS=${RTCD_CONFIG_UNIT_TESTS} +CONFIG_UNPOISON_PARTITION_CTX=${RTCD_CONFIG_UNPOISON_PARTITION_CTX} +CONFIG_VAR_TX=${RTCD_CONFIG_VAR_TX} +CONFIG_WARPED_MOTION=${RTCD_CONFIG_WARPED_MOTION} +CONFIG_WEBM_IO=${RTCD_CONFIG_WEBM_IO} +CONFIG_XIPHRC=${RTCD_CONFIG_XIPHRC} diff --git a/build/cmake/toolchains/mips32-linux-gcc.cmake b/build/cmake/toolchains/mips32-linux-gcc.cmake new file mode 100644 index 000000000..7a0053437 --- /dev/null +++ b/build/cmake/toolchains/mips32-linux-gcc.cmake @@ -0,0 +1,69 @@ +## +## Copyright (c) 2017, Alliance for Open Media. All rights reserved +## +## This source code is subject to the terms of the BSD 2 Clause License and +## the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License +## was not distributed with this source code in the LICENSE file, you can +## obtain it at www.aomedia.org/license/software. If the Alliance for Open +## Media Patent License 1.0 was not distributed with this source code in the +## PATENTS file, you can obtain it at www.aomedia.org/license/patent. +## +if (NOT AOM_BUILD_CMAKE_TOOLCHAINS_MIPS32_LINUX_GCC_CMAKE_) +set(AOM_BUILD_CMAKE_TOOLCHAINS_MIPS32_LINUX_GCC_CMAKE_ 1) + +set(CMAKE_SYSTEM_NAME "Linux") + +if (ENABLE_DSPR2 AND ENABLE_MSA) + message(FATAL_ERROR "ENABLE_DSPR2 and ENABLE_MSA cannot be combined.") +endif () + +if (ENABLE_DSPR2) + set(HAVE_DSPR2 1 CACHE BOOL "" FORCE) + + if ("${CROSS}" STREQUAL "") + # Default the cross compiler prefix to something known to work. + set(CROSS mips-linux-gnu-) + endif () + + set(MIPS_CFLAGS "-mdspr2") + set(MIPS_CXXFLAGS "-mdspr2") +elseif (ENABLE_MSA) + set(HAVE_MSA 1 CACHE BOOL "" FORCE) + + if ("${CROSS}" STREQUAL "") + # Default the cross compiler prefix to something known to work. + set(CROSS mips-mti-linux-gnu-) + endif () + + set(MIPS_CFLAGS "-mmsa") + set(MIPS_CXXFLAGS "-mmsa") +endif () + +if ("${CROSS}" STREQUAL "") + # Default cross compiler prefix to something that might work for an + # unoptimized build. + set(CROSS mips-linux-gnu-) +endif () + +if ("${MIPS_CPU}" STREQUAL "") + set(MIPS_CFLAGS "${MIPS_CFLAGS} -mips32r2") + set(MIPS_CXXFLAGS "${MIPS_CXXFLAGS} -mips32r2") +elseif ("${MIPS_CPU}" STREQUAL "p5600") + set(P56_FLAGS + "-mips32r5 -mload-store-pairs -msched-weight -mhard-float -mfp64") + set(MIPS_CFLAGS "${MIPS_CFLAGS} ${P56_FLAGS}") + set(MIPS_CXXFLAGS "${MIPS_CXXFLAGS} ${P56_FLAGS}") + set(CMAKE_EXE_LINKER_FLAGS "-mfp64 ${CMAKE_EXE_LINKER_FLAGS}") +endif () + +set(CMAKE_C_COMPILER ${CROSS}gcc) +set(CMAKE_CXX_COMPILER ${CROSS}g++) +set(AS_EXECUTABLE ${CROSS}as) +set(CMAKE_C_COMPILER_ARG1 "-EL ${MIPS_CFLAGS}") +set(CMAKE_CXX_COMPILER_ARG1 "-EL ${MIPS_CXXFLAGS}") +set(CMAKE_SYSTEM_PROCESSOR "mips32") + +# No runtime cpu detect for mips32-linux-gcc. +set(CONFIG_RUNTIME_CPU_DETECT 0 CACHE BOOL "") + +endif () # AOM_BUILD_CMAKE_TOOLCHAINS_MIPS32_LINUX_GCC_CMAKE_