Merge "Adding 64x64 forward and inverse transforms" into nextgenv2
This commit is contained in:
Debargha Mukherjee
Gerrit Code Review
Коммит
deef66db01
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@ -109,7 +109,7 @@ static const TXFM_2D_CFG fwd_txfm_2d_cfg_dct_dct_32 = {
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}; // .txfm_type_row
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// ---------------- config fwd_dct_dct_64 ----------------
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static const int8_t fwd_shift_dct_dct_64[3] = { 2, -2, -2 };
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static const int8_t fwd_shift_dct_dct_64[3] = { 0, -2, -2 };
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static const int8_t fwd_stage_range_col_dct_dct_64[12] = {
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13, 14, 15, 16, 17, 18, 19, 19, 19, 19, 19, 19
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};
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@ -384,6 +384,11 @@ specialize qw/av1_fht16x16 sse2 avx2/;
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add_proto qw/void av1_fht32x32/, "const int16_t *input, tran_low_t *output, int stride, int tx_type";
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specialize qw/av1_fht32x32 avx2/;
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if (aom_config("CONFIG_TX64X64") eq "yes") {
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add_proto qw/void av1_fht64x64/, "const int16_t *input, tran_low_t *output, int stride, int tx_type";
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specialize qw/av1_fht64x64/;
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}
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if (aom_config("CONFIG_EXT_TX") eq "yes") {
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add_proto qw/void av1_fht4x8/, "const int16_t *input, tran_low_t *output, int stride, int tx_type";
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specialize qw/av1_fht4x8 sse2/;
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@ -526,6 +531,11 @@ if (aom_config("CONFIG_AOM_HIGHBITDEPTH") eq "yes") {
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add_proto qw/void av1_highbd_fht32x32/, "const int16_t *input, tran_low_t *output, int stride, int tx_type";
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specialize qw/av1_highbd_fht32x32/;
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if (aom_config("CONFIG_TX64X64") eq "yes") {
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add_proto qw/void av1_highbd_fht64x64/, "const int16_t *input, tran_low_t *output, int stride, int tx_type";
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specialize qw/av1_highbd_fht64x64/;
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}
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add_proto qw/void av1_highbd_fwht4x4/, "const int16_t *input, tran_low_t *output, int stride";
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specialize qw/av1_highbd_fwht4x4/;
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@ -75,6 +75,47 @@ static void ihalfright32_c(const tran_low_t *input, tran_low_t *output) {
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// Note overall scaling factor is 4 times orthogonal
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}
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#if CONFIG_TX64X64
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static void idct64_col_c(const tran_low_t *input, tran_low_t *output) {
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int32_t in[64], out[64];
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int i;
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for (i = 0; i < 64; ++i) in[i] = (int32_t)input[i];
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av1_idct64_new(in, out, inv_cos_bit_col_dct_dct_64,
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inv_stage_range_col_dct_dct_64);
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for (i = 0; i < 64; ++i) output[i] = (tran_low_t)out[i];
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}
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static void idct64_row_c(const tran_low_t *input, tran_low_t *output) {
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int32_t in[64], out[64];
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int i;
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for (i = 0; i < 64; ++i) in[i] = (int32_t)input[i];
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av1_idct64_new(in, out, inv_cos_bit_row_dct_dct_64,
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inv_stage_range_row_dct_dct_64);
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for (i = 0; i < 64; ++i) output[i] = (tran_low_t)out[i];
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}
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static void iidtx64_c(const tran_low_t *input, tran_low_t *output) {
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int i;
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for (i = 0; i < 64; ++i)
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output[i] = (tran_low_t)dct_const_round_shift(input[i] * 4 * Sqrt2);
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}
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// For use in lieu of ADST
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static void ihalfright64_c(const tran_low_t *input, tran_low_t *output) {
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int i;
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tran_low_t inputhalf[32];
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// Multiply input by sqrt(2)
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for (i = 0; i < 32; ++i) {
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inputhalf[i] = (tran_low_t)dct_const_round_shift(input[i] * Sqrt2);
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}
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for (i = 0; i < 32; ++i) {
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output[i] = (tran_low_t)dct_const_round_shift(input[32 + i] * 4 * Sqrt2);
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}
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aom_idct32_c(inputhalf, output + 32);
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// Note overall scaling factor is 4 * sqrt(2) times orthogonal
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}
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#endif // CONFIG_TX64X64
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#if CONFIG_AOM_HIGHBITDEPTH
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#if CONFIG_EXT_TX
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static void highbd_iidtx4_c(const tran_low_t *input, tran_low_t *output,
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@ -122,6 +163,56 @@ static void highbd_ihalfright32_c(const tran_low_t *input, tran_low_t *output,
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aom_highbd_idct16_c(inputhalf, output + 16, bd);
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// Note overall scaling factor is 4 times orthogonal
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}
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#if CONFIG_TX64X64
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static void highbd_iidtx64_c(const tran_low_t *input, tran_low_t *output,
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int bd) {
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int i;
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for (i = 0; i < 64; ++i)
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output[i] =
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HIGHBD_WRAPLOW(highbd_dct_const_round_shift(input[i] * 4 * Sqrt2), bd);
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}
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// For use in lieu of ADST
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static void highbd_ihalfright64_c(const tran_low_t *input, tran_low_t *output,
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int bd) {
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int i;
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tran_low_t inputhalf[32];
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// Multiply input by sqrt(2)
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for (i = 0; i < 32; ++i) {
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inputhalf[i] =
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HIGHBD_WRAPLOW(highbd_dct_const_round_shift(input[i] * Sqrt2), bd);
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}
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for (i = 0; i < 32; ++i) {
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output[i] = HIGHBD_WRAPLOW(
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highbd_dct_const_round_shift(input[32 + i] * 4 * Sqrt2), bd);
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}
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aom_highbd_idct32_c(inputhalf, output + 32, bd);
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// Note overall scaling factor is 4 * sqrt(2) times orthogonal
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}
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static void highbd_idct64_col_c(const tran_low_t *input, tran_low_t *output,
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int bd) {
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int32_t in[64], out[64];
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int i;
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(void)bd;
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for (i = 0; i < 64; ++i) in[i] = (int32_t)input[i];
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av1_idct64_new(in, out, inv_cos_bit_col_dct_dct_64,
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inv_stage_range_col_dct_dct_64);
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for (i = 0; i < 64; ++i) output[i] = (tran_low_t)out[i];
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}
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static void highbd_idct64_row_c(const tran_low_t *input, tran_low_t *output,
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int bd) {
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int32_t in[64], out[64];
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int i;
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(void)bd;
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for (i = 0; i < 64; ++i) in[i] = (int32_t)input[i];
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av1_idct64_new(in, out, inv_cos_bit_row_dct_dct_64,
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inv_stage_range_row_dct_dct_64);
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for (i = 0; i < 64; ++i) output[i] = (tran_low_t)out[i];
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}
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#endif // CONFIG_TX64X64
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#endif // CONFIG_EXT_TX
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#endif // CONFIG_AOM_HIGHBITDEPTH
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@ -793,10 +884,10 @@ void av1_iht32x32_1024_add_c(const tran_low_t *input, uint8_t *dest, int stride,
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{ iidtx32_c, iidtx32_c }, // IDTX
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{ aom_idct32_c, iidtx32_c }, // V_DCT
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{ iidtx32_c, aom_idct32_c }, // H_DCT
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{ ihalfright32_c, iidtx16_c }, // V_ADST
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{ iidtx16_c, ihalfright32_c }, // H_ADST
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{ ihalfright32_c, iidtx16_c }, // V_FLIPADST
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{ iidtx16_c, ihalfright32_c }, // H_FLIPADST
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{ ihalfright32_c, iidtx32_c }, // V_ADST
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{ iidtx32_c, ihalfright32_c }, // H_ADST
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{ ihalfright32_c, iidtx32_c }, // V_FLIPADST
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{ iidtx32_c, ihalfright32_c }, // H_FLIPADST
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};
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int i, j;
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@ -836,6 +927,68 @@ void av1_iht32x32_1024_add_c(const tran_low_t *input, uint8_t *dest, int stride,
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}
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}
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}
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#if CONFIG_TX64X64
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void av1_iht64x64_4096_add_c(const tran_low_t *input, uint8_t *dest, int stride,
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int tx_type) {
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static const transform_2d IHT_64[] = {
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{ idct64_col_c, idct64_row_c }, // DCT_DCT
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{ ihalfright64_c, idct64_row_c }, // ADST_DCT
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{ idct64_col_c, ihalfright64_c }, // DCT_ADST
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{ ihalfright64_c, ihalfright64_c }, // ADST_ADST
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{ ihalfright64_c, idct64_row_c }, // FLIPADST_DCT
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{ idct64_col_c, ihalfright64_c }, // DCT_FLIPADST
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{ ihalfright64_c, ihalfright64_c }, // FLIPADST_FLIPADST
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{ ihalfright64_c, ihalfright64_c }, // ADST_FLIPADST
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{ ihalfright64_c, ihalfright64_c }, // FLIPADST_ADST
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{ iidtx64_c, iidtx64_c }, // IDTX
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{ idct64_col_c, iidtx64_c }, // V_DCT
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{ iidtx64_c, idct64_row_c }, // H_DCT
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{ ihalfright64_c, iidtx64_c }, // V_ADST
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{ iidtx64_c, ihalfright64_c }, // H_ADST
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{ ihalfright64_c, iidtx64_c }, // V_FLIPADST
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{ iidtx64_c, ihalfright64_c }, // H_FLIPADST
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};
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int i, j;
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tran_low_t tmp;
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tran_low_t out[64][64];
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tran_low_t *outp = &out[0][0];
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int outstride = 64;
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// inverse transform row vectors
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for (i = 0; i < 64; ++i) {
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IHT_64[tx_type].rows(input, out[i]);
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for (j = 0; j < 64; ++j) out[i][j] = ROUND_POWER_OF_TWO(out[i][j], 1);
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input += 64;
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}
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// transpose
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for (i = 1; i < 64; i++) {
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for (j = 0; j < i; j++) {
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tmp = out[i][j];
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out[i][j] = out[j][i];
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out[j][i] = tmp;
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}
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}
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// inverse transform column vectors
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for (i = 0; i < 64; ++i) {
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IHT_64[tx_type].cols(out[i], out[i]);
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}
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maybe_flip_strides(&dest, &stride, &outp, &outstride, tx_type, 64, 64);
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// Sum with the destination
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for (i = 0; i < 64; ++i) {
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for (j = 0; j < 64; ++j) {
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int d = i * stride + j;
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int s = j * outstride + i;
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dest[d] = clip_pixel_add(dest[d], ROUND_POWER_OF_TWO(outp[s], 5));
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}
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}
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}
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#endif // CONFIG_TX64X64
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#endif // CONFIG_EXT_TX
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// idct
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@ -1658,6 +1811,71 @@ void av1_highbd_iht32x32_1024_add_c(const tran_low_t *input, uint8_t *dest8,
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}
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}
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}
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#if CONFIG_TX64X64
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void av1_highbd_iht64x64_4096_add_c(const tran_low_t *input, uint8_t *dest8,
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int stride, int tx_type, int bd) {
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static const highbd_transform_2d HIGH_IHT_64[] = {
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{ highbd_idct64_col_c, highbd_idct64_row_c }, // DCT_DCT
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{ highbd_ihalfright64_c, highbd_idct64_row_c }, // ADST_DCT
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{ highbd_idct64_col_c, highbd_ihalfright64_c }, // DCT_ADST
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{ highbd_ihalfright64_c, highbd_ihalfright64_c }, // ADST_ADST
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{ highbd_ihalfright64_c, highbd_idct64_row_c }, // FLIPADST_DCT
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{ highbd_idct64_col_c, highbd_ihalfright64_c }, // DCT_FLIPADST
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{ highbd_ihalfright64_c, highbd_ihalfright64_c }, // FLIPADST_FLIPADST
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{ highbd_ihalfright64_c, highbd_ihalfright64_c }, // ADST_FLIPADST
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{ highbd_ihalfright64_c, highbd_ihalfright64_c }, // FLIPADST_ADST
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{ highbd_iidtx64_c, highbd_iidtx64_c }, // IDTX
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{ highbd_idct64_col_c, highbd_iidtx64_c }, // V_DCT
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{ highbd_iidtx64_c, highbd_idct64_row_c }, // H_DCT
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{ highbd_ihalfright64_c, highbd_iidtx64_c }, // V_ADST
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{ highbd_iidtx64_c, highbd_ihalfright64_c }, // H_ADST
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{ highbd_ihalfright64_c, highbd_iidtx64_c }, // V_FLIPADST
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{ highbd_iidtx64_c, highbd_ihalfright64_c }, // H_FLIPADST
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};
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uint16_t *dest = CONVERT_TO_SHORTPTR(dest8);
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int i, j;
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tran_low_t tmp;
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tran_low_t out[64][64];
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tran_low_t *outp = &out[0][0];
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int outstride = 64;
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// inverse transform row vectors
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for (i = 0; i < 64; ++i) {
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HIGH_IHT_64[tx_type].rows(input, out[i], bd);
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for (j = 0; j < 64; ++j) out[i][j] = ROUND_POWER_OF_TWO(out[i][j], 1);
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input += 64;
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}
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// transpose
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for (i = 1; i < 64; i++) {
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for (j = 0; j < i; j++) {
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tmp = out[i][j];
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out[i][j] = out[j][i];
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out[j][i] = tmp;
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}
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}
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// inverse transform column vectors
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for (i = 0; i < 64; ++i) {
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HIGH_IHT_64[tx_type].cols(out[i], out[i], bd);
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}
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maybe_flip_strides16(&dest, &stride, &outp, &outstride, tx_type, 64, 64);
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// Sum with the destination
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for (i = 0; i < 64; ++i) {
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for (j = 0; j < 64; ++j) {
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int d = i * stride + j;
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int s = j * outstride + i;
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dest[d] =
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highbd_clip_pixel_add(dest[d], ROUND_POWER_OF_TWO(outp[s], 5), bd);
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}
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}
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}
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#endif // CONFIG_TX64X64
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#endif // CONFIG_EXT_TX
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// idct
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@ -18,6 +18,8 @@
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#include "aom_dsp/fwd_txfm.h"
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#include "aom_ports/mem.h"
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#include "av1/common/blockd.h"
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#include "av1/common/av1_fwd_txfm1d.h"
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#include "av1/common/av1_fwd_txfm2d_cfg.h"
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#include "av1/common/idct.h"
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static INLINE void range_check(const tran_low_t *input, const int size,
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@ -1874,12 +1876,103 @@ void av1_fht32x32_c(const int16_t *input, tran_low_t *output, int stride,
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}
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}
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#if CONFIG_TX64X64
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#if CONFIG_EXT_TX
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static void fidtx64(const tran_low_t *input, tran_low_t *output) {
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int i;
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for (i = 0; i < 64; ++i)
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output[i] = (tran_low_t)fdct_round_shift(input[i] * 4 * Sqrt2);
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}
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// For use in lieu of ADST
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static void fhalfright64(const tran_low_t *input, tran_low_t *output) {
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int i;
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tran_low_t inputhalf[32];
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for (i = 0; i < 32; ++i) {
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output[32 + i] = (tran_low_t)fdct_round_shift(input[i] * 4 * Sqrt2);
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}
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// Multiply input by sqrt(2)
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for (i = 0; i < 32; ++i) {
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inputhalf[i] = (tran_low_t)fdct_round_shift(input[i + 32] * Sqrt2);
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}
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fdct32(inputhalf, output);
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// Note overall scaling factor is 2 times unitary
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}
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#endif // CONFIG_EXT_TX
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static void fdct64_col(const tran_low_t *input, tran_low_t *output) {
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int32_t in[64], out[64];
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int i;
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for (i = 0; i < 64; ++i) in[i] = (int32_t)input[i];
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av1_fdct64_new(in, out, fwd_cos_bit_col_dct_dct_64,
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fwd_stage_range_col_dct_dct_64);
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for (i = 0; i < 64; ++i) output[i] = (tran_low_t)out[i];
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}
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static void fdct64_row(const tran_low_t *input, tran_low_t *output) {
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int32_t in[64], out[64];
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int i;
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for (i = 0; i < 64; ++i) in[i] = (int32_t)input[i];
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av1_fdct64_new(in, out, fwd_cos_bit_row_dct_dct_64,
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fwd_stage_range_row_dct_dct_64);
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for (i = 0; i < 64; ++i) output[i] = (tran_low_t)out[i];
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}
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void av1_fht64x64_c(const int16_t *input, tran_low_t *output, int stride,
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int tx_type) {
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static const transform_2d FHT[] = {
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{ fdct64_col, fdct64_row }, // DCT_DCT
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#if CONFIG_EXT_TX
|
||||
{ fhalfright64, fdct64_row }, // ADST_DCT
|
||||
{ fdct64_col, fhalfright64 }, // DCT_ADST
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||||
{ fhalfright64, fhalfright64 }, // ADST_ADST
|
||||
{ fhalfright64, fdct64_row }, // FLIPADST_DCT
|
||||
{ fdct64_col, fhalfright64 }, // DCT_FLIPADST
|
||||
{ fhalfright64, fhalfright64 }, // FLIPADST_FLIPADST
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||||
{ fhalfright64, fhalfright64 }, // ADST_FLIPADST
|
||||
{ fhalfright64, fhalfright64 }, // FLIPADST_ADST
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{ fidtx64, fidtx64 }, // IDTX
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||||
{ fdct64_col, fidtx64 }, // V_DCT
|
||||
{ fidtx64, fdct64_row }, // H_DCT
|
||||
{ fhalfright64, fidtx64 }, // V_ADST
|
||||
{ fidtx64, fhalfright64 }, // H_ADST
|
||||
{ fhalfright64, fidtx64 }, // V_FLIPADST
|
||||
{ fidtx64, fhalfright64 }, // H_FLIPADST
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||||
#endif
|
||||
};
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||||
const transform_2d ht = FHT[tx_type];
|
||||
tran_low_t out[4096];
|
||||
int i, j;
|
||||
tran_low_t temp_in[64], temp_out[64];
|
||||
#if CONFIG_EXT_TX
|
||||
int16_t flipped_input[64 * 64];
|
||||
maybe_flip_input(&input, &stride, 64, 64, flipped_input, tx_type);
|
||||
#endif
|
||||
// Columns
|
||||
for (i = 0; i < 64; ++i) {
|
||||
for (j = 0; j < 64; ++j) temp_in[j] = input[j * stride + i];
|
||||
ht.cols(temp_in, temp_out);
|
||||
for (j = 0; j < 64; ++j)
|
||||
out[j * 64 + i] = (temp_out[j] + 1 + (temp_out[j] > 0)) >> 2;
|
||||
}
|
||||
|
||||
// Rows
|
||||
for (i = 0; i < 64; ++i) {
|
||||
for (j = 0; j < 64; ++j) temp_in[j] = out[j + i * 64];
|
||||
ht.rows(temp_in, temp_out);
|
||||
for (j = 0; j < 64; ++j)
|
||||
output[j + i * 64] =
|
||||
(tran_low_t)((temp_out[j] + 1 + (temp_out[j] < 0)) >> 2);
|
||||
}
|
||||
}
|
||||
#endif // CONFIG_TX64X64
|
||||
|
||||
#if CONFIG_EXT_TX
|
||||
// Forward identity transform.
|
||||
void av1_fwd_idtx_c(const int16_t *src_diff, tran_low_t *coeff, int stride,
|
||||
int bs, int tx_type) {
|
||||
int r, c;
|
||||
const int shift = bs < 32 ? 3 : 2;
|
||||
const int shift = bs < 32 ? 3 : (bs < 64 ? 2 : 1);
|
||||
if (tx_type == IDTX) {
|
||||
for (r = 0; r < bs; ++r) {
|
||||
for (c = 0; c < bs; ++c) coeff[c] = src_diff[c] * (1 << shift);
|
||||
|
|
@ -1894,5 +1987,12 @@ void av1_highbd_fht32x32_c(const int16_t *input, tran_low_t *output, int stride,
|
|||
int tx_type) {
|
||||
av1_fht32x32_c(input, output, stride, tx_type);
|
||||
}
|
||||
|
||||
#if CONFIG_TX64X64
|
||||
void av1_highbd_fht64x64_c(const int16_t *input, tran_low_t *output, int stride,
|
||||
int tx_type) {
|
||||
av1_fht64x64_c(input, output, stride, tx_type);
|
||||
}
|
||||
#endif // CONFIG_TX64X64
|
||||
#endif // CONFIG_AOM_HIGHBITDEPTH
|
||||
#endif // CONFIG_EXT_TX
|
||||
|
|
|
|||
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