b1555c937b
Speed up CDEF parameter selection for cpu-used > 0
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High delay cpu-used=4
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
0.0579 | 0.1380 | -0.1975 | 0.0361 | 0.0226 | 0.0072 | 0.0470
Low delay cpu-used=4
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.1016 | -0.0695 | 0.1013 | -0.1324 | -0.0903 | -0.1260 | -0.1710
Change-Id: I5a66a1ffc2d1fb2a203065b7fbb2fd2bd2b281ad
2017-06-12 07:19:40 +00:00
70f0e5eb8b
Only filter the blocks we need to filter (rather than use threshold=0)
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Change-Id: Iddb2103452817e9624a28794cab923f00c3e9924
2017-04-14 05:59:49 +00:00
daab348db1
Restrict dering thresholds and add damping to RDO
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High latency, cpu-used=0:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.0947 | 0.0968 | 0.1203 | -0.0325 | -0.0648 | -0.0290 | -0.0099
Low latency, cpu-used=0:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.0635 | 0.1315 | -0.0771 | -0.0122 | -0.0598 | 0.0111 | -0.0362
High latency, cpu-used=4:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.1178 | 0.0026 | 0.1003 | -0.0609 | -0.1287 | -0.1119 | -0.1249
Low latency, cpu-used=4:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.0404 | 0.0547 | 0.0976 | 0.0042 | -0.0585 | -0.0234 | -0.0245
Change-Id: I48bcdb4d3d27512160ae1e1a36308dd62cf54c59
2017-04-07 04:49:00 +00:00
8ff52fccfa
CDEF: Add damping to dering
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high-latency, cpu-used=0:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.1650 | 0.2545 | 0.2977 | -0.0423 | -0.0947 | -0.0725 | -0.0365
low-latency, cpu-used=0:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.4006 | 0.0501 | -0.0108 | -0.1790 | -0.1660 | -0.1992 | -0.2135
low latency, cpu-used=4:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.5508 | -0.2445 | -0.2762 | -0.1981 | -0.2878 | -0.2228 | -0.3733
Change-Id: Ia20df28c8bbb6182215b02016053af33bd498145
2017-04-05 14:53:02 +00:00
233ef94776
Move dering strength mapping to od_dering()
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This patch also makes it easier to tune the mapping later.
Change-Id: I69f49b9dd1fddb306931599a354526abe0232eb8
2017-03-28 16:53:05 +00:00
e575977311
Avoid having to include cdef.h from onyxc_int.h
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Avoids having to forward declare AV1_COMMON which was causing problems.
Change-Id: Iab90e6b5683a737feeec0574e31cf4bd3e02a776
2017-03-24 00:29:33 +00:00
e9f7742437
Do real chroma RDO search for CDEF
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Chroma now has a list of strenghts too, with the superblock signalling
shared between luma and chroma.
low-latency, cpu=4:
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.0114 | -1.4626 | -1.4745 | -0.0423 | 0.0430 | -0.0001 | -0.7416
Change-Id: I389c77f1d80020f810e45f8502c656ad9d397c8c
2017-03-23 21:57:30 +00:00
5f5c132fef
Jointly optimizing deringing and clpf
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We now signal joint strengths and use a greedy algorithm for the search.
low-latency, cpu-used=4:
ll4-cdef@2017-03-22T03:42:10.815Z -> ll4-cdef-newsearch-var-header-newlambda-refine4@2017-03-22T15:56:46.471Z
PSNR | PSNR Cb | PSNR Cr | PSNR HVS | SSIM | MS SSIM | CIEDE 2000
-0.0792 | 0.3551 | 0.4393 | -0.0108 | -0.1338 | -0.0141 | 0.1452
Change-Id: I619ae1c7c7d7ec04fe993cabc5773b07c3f5b201
2017-03-22 20:59:34 +00:00
a9d41e88d2
Merge dering/clpf rdo and filtering
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* Dering and clpf were merged into a single pass.
* 32x32 and 128x128 filter block sizes for clpf were removed.
* RDO for dering and clpf merged and improved:
- "0" no longer required to be in the strength selection
- Dering strength can now be 0, 1 or 2 bits per block
LL HL
PSNR: -0.04 -0.01
PSNR HVS: -0.27 -0.18
SSIM: -0.15 +0.01
CIEDE 2000: -0.11 -0.03
APSNR: -0.03 -0.00
MS SSIM: -0.18 -0.11
Change-Id: I9f002a16ad218eab6007f90f1f176232443495f0
2017-03-17 19:06:20 +00:00
Steinar Midtskogen
Jean-Marc Valin